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llvm-project/clang/test/Driver/aarch64-cssc.c

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[AArch64][clang] implement 2022 General Data-Processing instructions This patch implements the 2022 Architecture General Data-Processing Instructions They include: Common Short Sequence Compression (CSSC) instructions - scalar comparison instructions SMAX, SMIN, UMAX, UMIN (32/64 bits) with or without immediate - ABS (absolute), CNT (count non-zero bits), CTZ (count trailing zeroes) - command-line options for CSSC Associated with these instructions in the documentation is the Range Prefetch Memory (RPRFM) instruction, which signals to the memory system that data memory accesses from a specified range of addresses are likely to occur in the near future. The instruction lies in hint space, and is made unconditional. Specs for the individual instructions can be found here: https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/ contributors to this patch: - Cullen Rhodes - Son Tuan Vu - Mark Murray - Tomas Matheson - Sam Elliott - Ties Stuij Reviewed By: lenary Differential Revision: https://reviews.llvm.org/D138488
2022-11-22 12:38:47 +00:00
// Test that target feature cssc is implemented and available correctly
[AArch64][Clang] Adjust default features for v8.9-A/v9.4-A in clang driver Update the clang driver to include the following features as default for the v8.9-A/v9.4-A architecture versions: * FEAT_SPECRES2 * FEAT_CSSC * FEAT_RASv2 Patch by Sam Elliott. Reviewed By: lenary, tmatheson Differential Revision: https://reviews.llvm.org/D141404
2022-12-21 16:45:38 +00:00
// FEAT_CSSC is a required part of v8.9a/v9.4a and optional from v8.7a/v9.3a onwards.
[Clang][Driver] Warn on invalid Arm or AArch64 baremetal target triple A common user mistake is specifying a target of aarch64-none-eabi or arm-none-elf whereas the correct names are aarch64-none-elf & arm-none-eabi. Currently if a target of aarch64-none-eabi is specified then the Generic_ELF toolchain is used, unlike aarch64-none-elf which will use the BareMetal toolchain. This is unlikely to be intended by the user so issue a warning that the target is invalid. The target parser is liberal in what input it accepts so invalid triples may yield behaviour that's sufficiently close to what the user intended. Therefore invalid triples were used in many tests. This change updates those tests to use valid triples. One test (gnu-mcount.c) relies on the Generic_ELF toolchain behaviour so change it to explicitly specify aarch64-unknown-none-gnu as the target. Reviewed By: peter.smith, DavidSpickett Differential Revision: https://reviews.llvm.org/D153430
2023-06-21 14:49:09 +01:00
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf %s 2>&1 | FileCheck %s --check-prefix=ABSENT_CSSC
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv8.7-a+cssc %s 2>&1 | FileCheck %s
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv8.9-a %s 2>&1 | FileCheck %s
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv8.9-a+cssc %s 2>&1 | FileCheck %s
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv8.9-a+nocssc %s 2>&1 | FileCheck %s --check-prefix=NO_CSSC
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv9.2-a+cssc %s 2>&1 | FileCheck %s
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv9.4-a %s 2>&1 | FileCheck %s
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv9.4-a+cssc %s 2>&1 | FileCheck %s
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv9.4-a+nocssc %s 2>&1 | FileCheck %s --check-prefix=NO_CSSC
[AArch64] Add the Ampere1B core (#81297) The Ampere1B is Ampere's third-generation core implementing a superscalar, out-of-order microarchitecture with nested virtualization, speculative side-channel mitigation and architectural support for defense against ROP/JOP style software attacks. Ampere1B is an ARMv8.7+ implementation, adding support for the FEAT WFxT, FEAT CSSC, FEAT PAN3 and FEAT AFP extensions. It also includes all features of the second-generation Ampere1A, such as the Memory Tagging Extension and SM3/SM4 cryptography instructions.
2024-02-09 15:22:09 -08:00
// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -mcpu=ampere1b %s 2>&1 | FileCheck %s
[AArch64][clang] implement 2022 General Data-Processing instructions This patch implements the 2022 Architecture General Data-Processing Instructions They include: Common Short Sequence Compression (CSSC) instructions - scalar comparison instructions SMAX, SMIN, UMAX, UMIN (32/64 bits) with or without immediate - ABS (absolute), CNT (count non-zero bits), CTZ (count trailing zeroes) - command-line options for CSSC Associated with these instructions in the documentation is the Range Prefetch Memory (RPRFM) instruction, which signals to the memory system that data memory accesses from a specified range of addresses are likely to occur in the near future. The instruction lies in hint space, and is made unconditional. Specs for the individual instructions can be found here: https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/ contributors to this patch: - Cullen Rhodes - Son Tuan Vu - Mark Murray - Tomas Matheson - Sam Elliott - Ties Stuij Reviewed By: lenary Differential Revision: https://reviews.llvm.org/D138488
2022-11-22 12:38:47 +00:00
[AArch64][Clang] Adjust default features for v8.9-A/v9.4-A in clang driver Update the clang driver to include the following features as default for the v8.9-A/v9.4-A architecture versions: * FEAT_SPECRES2 * FEAT_CSSC * FEAT_RASv2 Patch by Sam Elliott. Reviewed By: lenary, tmatheson Differential Revision: https://reviews.llvm.org/D141404
2022-12-21 16:45:38 +00:00
// CHECK: "target-features"="{{.*}},+cssc
// NO_CSSC: "target-features"="{{.*}},-cssc
// ABSENT_CSSC-NOT: "target-features"="{{.*}},+cssc
// ABSENT_CSSC-NOT: "target-features"="{{.*}},-cssc
void test() {}
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