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llvm-project/mlir/lib/Interfaces/MemorySlotInterfaces.cpp

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Reland "[mlir][mem2reg] Expose algorithm internals." This patch refactors the Mem2Reg infrastructure. It decouples analysis from promotion, allowing for more control over the execution of the logic. It also adjusts the interfaces to be less coupled to mem2reg and more general. This will be useful for an upcoming revision introducing generic SROA. This commit reverts f333977eb20a and relands 91cff8a71872. The original commit was reverted accidentally due to a misinterpretation of a bazel build bot failure. Reviewed By: gysit Differential Revision: https://reviews.llvm.org/D149825
2023-05-09 09:01:33 +00:00
//===-- MemorySlotInterfaces.cpp - MemorySlot interfaces --------*- C++ -*-===//
[mlir] Add a generic mem2reg implementation. This patch introduces a generic implementation of mem2reg on unstructured control-flow, along with a specialization for LLVM IR. This is achieved by defining three new interfaces, representing 1. allocating operations, 2. operations doing memory accesses, 3. operations that can be rewired and/or deleted to stop using a specific use. The file containing the core implementation of the algorithm (`Mem2Reg.cpp`) contains a detailed explanation of how the algorithm works. The contract for this pass is that given a memory slot with a single non-aliased pointer, the pass will either remove all the uses of the pointer or not change anything. To help review this patch, I recommend starting by looking at the interfaces defined in `Mem2Reg.td`, along with their reference implementation for LLVM IR defined in `LLVMMem2Reg.cpp`. Then, the core algorithm is implemented in `Mem2Reg.cpp`. If this is all good I also have an implementation of the interfaces for 0-dimensional memref promotion that I can upstream afterwards. Reviewed By: gysit Differential Revision: https://reviews.llvm.org/D148109
2023-04-27 06:00:39 +00:00
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
Reland "[mlir][mem2reg] Expose algorithm internals." This patch refactors the Mem2Reg infrastructure. It decouples analysis from promotion, allowing for more control over the execution of the logic. It also adjusts the interfaces to be less coupled to mem2reg and more general. This will be useful for an upcoming revision introducing generic SROA. This commit reverts f333977eb20a and relands 91cff8a71872. The original commit was reverted accidentally due to a misinterpretation of a bazel build bot failure. Reviewed By: gysit Differential Revision: https://reviews.llvm.org/D149825
2023-05-09 09:01:33 +00:00
#include "mlir/Interfaces/MemorySlotInterfaces.h"
[mlir] Add a generic mem2reg implementation. This patch introduces a generic implementation of mem2reg on unstructured control-flow, along with a specialization for LLVM IR. This is achieved by defining three new interfaces, representing 1. allocating operations, 2. operations doing memory accesses, 3. operations that can be rewired and/or deleted to stop using a specific use. The file containing the core implementation of the algorithm (`Mem2Reg.cpp`) contains a detailed explanation of how the algorithm works. The contract for this pass is that given a memory slot with a single non-aliased pointer, the pass will either remove all the uses of the pointer or not change anything. To help review this patch, I recommend starting by looking at the interfaces defined in `Mem2Reg.td`, along with their reference implementation for LLVM IR defined in `LLVMMem2Reg.cpp`. Then, the core algorithm is implemented in `Mem2Reg.cpp`. If this is all good I also have an implementation of the interfaces for 0-dimensional memref promotion that I can upstream afterwards. Reviewed By: gysit Differential Revision: https://reviews.llvm.org/D148109
2023-04-27 06:00:39 +00:00
Reland "[mlir][mem2reg] Expose algorithm internals." This patch refactors the Mem2Reg infrastructure. It decouples analysis from promotion, allowing for more control over the execution of the logic. It also adjusts the interfaces to be less coupled to mem2reg and more general. This will be useful for an upcoming revision introducing generic SROA. This commit reverts f333977eb20a and relands 91cff8a71872. The original commit was reverted accidentally due to a misinterpretation of a bazel build bot failure. Reviewed By: gysit Differential Revision: https://reviews.llvm.org/D149825
2023-05-09 09:01:33 +00:00
#include "mlir/Interfaces/MemorySlotOpInterfaces.cpp.inc"
[mlir] Add a generic SROA implementation. This revision introduces a generic implementation of Scalar Replacement Of Aggregates. In contrast to the implementation in LLVM, this focuses on the core of SROA: destructuring aggregates. By implementing interfaces on allocators and accessors, memory allocators can be destructured into smaller allocators, through the MemorySlot abstraction. This pass only works on aggregates that are accessed in a "type-safe" way, that is within the bounds and respecting the type of a given memory slot. The destructuring pattern and functions only peel off the first layer of aggregates and can safely be applied repeatedly. For convenience, the transformation is also available as a pass that will apply the pattern repeatedly. Depends on D149958 Reviewed By: gysit Differential Revision: https://reviews.llvm.org/D150186
2023-05-22 08:49:31 +00:00
#include "mlir/Interfaces/MemorySlotTypeInterfaces.cpp.inc"
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