2021-10-29 23:20:50 +02:00
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//===-- CodeGen.cpp -- bridge to lower to LLVM ----------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Coding style: https://mlir.llvm.org/getting_started/DeveloperGuide/
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//
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//===----------------------------------------------------------------------===//
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#include "flang/Optimizer/CodeGen/CodeGen.h"
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2022-08-31 10:16:29 +02:00
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2024-02-05 18:45:07 +01:00
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#include "flang/Optimizer/CodeGen/CodeGenOpenMP.h"
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2024-03-22 12:56:45 -07:00
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#include "flang/Optimizer/CodeGen/FIROpPatterns.h"
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#include "flang/Optimizer/CodeGen/TypeConverter.h"
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2021-11-11 15:00:18 +01:00
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#include "flang/Optimizer/Dialect/FIRAttr.h"
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2025-04-10 16:13:04 -07:00
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#include "flang/Optimizer/Dialect/FIRCG/CGOps.h"
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2025-02-24 09:27:48 -08:00
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#include "flang/Optimizer/Dialect/FIRDialect.h"
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2021-10-29 23:20:50 +02:00
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#include "flang/Optimizer/Dialect/FIROps.h"
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2023-03-07 16:09:23 -08:00
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#include "flang/Optimizer/Dialect/FIRType.h"
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2023-12-12 11:52:39 +01:00
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#include "flang/Optimizer/Support/DataLayout.h"
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2022-02-14 11:36:32 +01:00
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#include "flang/Optimizer/Support/InternalNames.h"
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2021-11-18 11:05:45 +01:00
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#include "flang/Optimizer/Support/TypeCode.h"
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2023-03-07 16:09:23 -08:00
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#include "flang/Optimizer/Support/Utils.h"
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2024-12-16 19:12:05 -08:00
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#include "flang/Runtime/CUDA/descriptor.h"
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2024-12-18 18:20:45 -08:00
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#include "flang/Runtime/CUDA/memory.h"
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2024-12-06 15:29:00 +01:00
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#include "flang/Runtime/allocator-registry-consts.h"
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#include "flang/Runtime/descriptor-consts.h"
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2022-02-14 11:36:32 +01:00
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#include "flang/Semantics/runtime-type-info.h"
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2022-11-09 15:18:50 -08:00
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#include "mlir/Conversion/ArithCommon/AttrToLLVMConverter.h"
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2022-09-29 11:55:17 -04:00
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#include "mlir/Conversion/ArithToLLVM/ArithToLLVM.h"
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2022-10-24 12:42:29 +00:00
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#include "mlir/Conversion/ComplexToLLVM/ComplexToLLVM.h"
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#include "mlir/Conversion/ComplexToStandard/ComplexToStandard.h"
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2022-02-03 20:59:43 -08:00
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#include "mlir/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.h"
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2022-03-01 14:53:41 -08:00
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#include "mlir/Conversion/FuncToLLVM/ConvertFuncToLLVM.h"
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2021-10-29 23:20:50 +02:00
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#include "mlir/Conversion/LLVMCommon/Pattern.h"
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2022-08-26 16:12:25 -07:00
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#include "mlir/Conversion/MathToFuncs/MathToFuncs.h"
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2022-06-22 14:41:02 -07:00
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#include "mlir/Conversion/MathToLLVM/MathToLLVM.h"
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#include "mlir/Conversion/MathToLibm/MathToLibm.h"
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2024-09-10 09:48:55 -04:00
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#include "mlir/Conversion/MathToROCDL/MathToROCDL.h"
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2022-03-21 14:09:47 +00:00
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#include "mlir/Conversion/OpenMPToLLVM/ConvertOpenMPToLLVM.h"
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2023-05-29 16:10:12 -04:00
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#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
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2023-10-31 16:15:13 +00:00
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#include "mlir/Dialect/Arith/IR/Arith.h"
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2023-12-12 11:52:39 +01:00
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#include "mlir/Dialect/DLTI/DLTI.h"
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2024-11-13 17:09:38 -08:00
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#include "mlir/Dialect/GPU/IR/GPUDialect.h"
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2024-03-18 11:17:32 -07:00
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#include "mlir/Dialect/LLVMIR/LLVMAttrs.h"
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2022-08-31 10:16:29 +02:00
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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2025-03-14 15:28:32 -07:00
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#include "mlir/Dialect/LLVMIR/NVVMDialect.h"
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2023-09-19 15:00:04 +01:00
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#include "mlir/Dialect/LLVMIR/Transforms/AddComdats.h"
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2023-04-10 14:29:58 -07:00
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#include "mlir/Dialect/OpenACC/OpenACC.h"
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2022-08-31 10:16:29 +02:00
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#include "mlir/Dialect/OpenMP/OpenMPDialect.h"
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2021-10-29 23:20:50 +02:00
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#include "mlir/IR/BuiltinTypes.h"
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2021-11-04 10:36:00 +01:00
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#include "mlir/IR/Matchers.h"
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2021-10-29 23:20:50 +02:00
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#include "mlir/Pass/Pass.h"
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2022-08-26 16:12:25 -07:00
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#include "mlir/Pass/PassManager.h"
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[Flang][MLIR] Add basic initial support for alloca and program address space handling in FIR->LLVMIR codegen (#77518)
This is a slightly more slimmed down and up-to-date version of the older
PR from here: https://reviews.llvm.org/D144203, written by @jsjodin,
which has already under gone some review.
This PR places allocas in the alloca address space specified by the
provided data layout (default is 0 for all address spaces, unless
explicitly specified by the layout), and then will cast these alloca's
to the program address space if this address space is different from the
allocation address space. For most architectures data layouts, this will
be a no-op, as they have a flat address space. But in the case of AMDGPU
it will result in allocas being placed in the correct address space (5,
private), and then casted into the correct program address space (0,
generic). This results in correct (partially, a follow up PR will be
forthcoming soon) generation of allocations inside of device code.
This PR is in addition to the work by @skatrak in this PR:
https://github.com/llvm/llvm-project/pull/69599 and adds seperate and
neccesary functionality of casting alloca's from their address space to
the program address space, both are independent PRs, although there is
some minor overlap e.g. this PR incorporates some of the useful helper
functions from 69599, so whichever lands first will need a minor rebase.
Co-author: jsjodin
2024-01-17 17:37:16 +01:00
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#include "mlir/Target/LLVMIR/Import.h"
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2022-01-24 14:14:49 +01:00
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#include "mlir/Target/LLVMIR/ModuleTranslation.h"
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2021-10-29 23:20:50 +02:00
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#include "llvm/ADT/ArrayRef.h"
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2022-10-21 14:34:37 +02:00
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#include "llvm/ADT/TypeSwitch.h"
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2021-10-29 23:20:50 +02:00
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2022-08-31 10:16:29 +02:00
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namespace fir {
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#define GEN_PASS_DEF_FIRTOLLVMLOWERING
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#include "flang/Optimizer/CodeGen/CGPasses.h.inc"
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} // namespace fir
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2021-10-29 23:20:50 +02:00
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#define DEBUG_TYPE "flang-codegen"
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2021-11-18 11:05:45 +01:00
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// TODO: This should really be recovered from the specified target.
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static constexpr unsigned defaultAlign = 8;
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2021-11-11 10:39:02 +01:00
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/// `fir.box` attribute values as defined for CFI_attribute_t in
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/// flang/ISO_Fortran_binding.h.
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static constexpr unsigned kAttrPointer = CFI_attribute_pointer;
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static constexpr unsigned kAttrAllocatable = CFI_attribute_allocatable;
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[Flang][MLIR] Add basic initial support for alloca and program address space handling in FIR->LLVMIR codegen (#77518)
This is a slightly more slimmed down and up-to-date version of the older
PR from here: https://reviews.llvm.org/D144203, written by @jsjodin,
which has already under gone some review.
This PR places allocas in the alloca address space specified by the
provided data layout (default is 0 for all address spaces, unless
explicitly specified by the layout), and then will cast these alloca's
to the program address space if this address space is different from the
allocation address space. For most architectures data layouts, this will
be a no-op, as they have a flat address space. But in the case of AMDGPU
it will result in allocas being placed in the correct address space (5,
private), and then casted into the correct program address space (0,
generic). This results in correct (partially, a follow up PR will be
forthcoming soon) generation of allocations inside of device code.
This PR is in addition to the work by @skatrak in this PR:
https://github.com/llvm/llvm-project/pull/69599 and adds seperate and
neccesary functionality of casting alloca's from their address space to
the program address space, both are independent PRs, although there is
some minor overlap e.g. this PR incorporates some of the useful helper
functions from 69599, so whichever lands first will need a minor rebase.
Co-author: jsjodin
2024-01-17 17:37:16 +01:00
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static inline mlir::Type getLlvmPtrType(mlir::MLIRContext *context,
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unsigned addressSpace = 0) {
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return mlir::LLVM::LLVMPointerType::get(context, addressSpace);
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2023-10-25 09:42:28 +02:00
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}
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static inline mlir::Type getI8Type(mlir::MLIRContext *context) {
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return mlir::IntegerType::get(context, 8);
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2021-12-07 13:01:28 +00:00
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}
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2021-11-08 10:59:48 +00:00
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static mlir::LLVM::ConstantOp
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genConstantIndex(mlir::Location loc, mlir::Type ity,
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mlir::ConversionPatternRewriter &rewriter,
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std::int64_t offset) {
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2022-08-09 16:10:21 -04:00
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auto cattr = rewriter.getI64IntegerAttr(offset);
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return rewriter.create<mlir::LLVM::ConstantOp>(loc, ity, cattr);
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2021-11-08 10:59:48 +00:00
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}
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2022-04-26 13:44:34 -07:00
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static mlir::Block *createBlock(mlir::ConversionPatternRewriter &rewriter,
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mlir::Block *insertBefore) {
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2021-11-11 15:00:18 +01:00
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assert(insertBefore && "expected valid insertion block");
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return rewriter.createBlock(insertBefore->getParent(),
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mlir::Region::iterator(insertBefore));
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}
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2023-03-27 19:28:36 -07:00
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/// Extract constant from a value that must be the result of one of the
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/// ConstantOp operations.
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static int64_t getConstantIntValue(mlir::Value val) {
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2024-04-05 12:39:24 +01:00
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if (auto constVal = fir::getIntIfConstant(val))
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2023-03-27 19:28:36 -07:00
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return *constVal;
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2022-07-12 09:26:16 +02:00
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fir::emitFatalError(val.getLoc(), "must be a constant");
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}
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2022-10-24 20:42:31 +02:00
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static unsigned getTypeDescFieldId(mlir::Type ty) {
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2024-04-28 22:01:42 +02:00
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auto isArray = mlir::isa<fir::SequenceType>(fir::dyn_cast_ptrOrBoxEleTy(ty));
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2022-10-24 20:42:31 +02:00
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return isArray ? kOptTypePtrPosInBox : kDimsPosInBox;
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}
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2024-02-16 08:51:03 +01:00
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static unsigned getLenParamFieldId(mlir::Type ty) {
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return getTypeDescFieldId(ty) + 1;
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}
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2022-10-24 20:42:31 +02:00
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2024-09-26 13:59:37 +08:00
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static llvm::SmallVector<mlir::NamedAttribute>
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addLLVMOpBundleAttrs(mlir::ConversionPatternRewriter &rewriter,
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llvm::ArrayRef<mlir::NamedAttribute> attrs,
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int32_t numCallOperands) {
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llvm::SmallVector<mlir::NamedAttribute> newAttrs;
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newAttrs.reserve(attrs.size() + 2);
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for (mlir::NamedAttribute attr : attrs) {
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if (attr.getName() != "operandSegmentSizes")
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newAttrs.push_back(attr);
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}
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newAttrs.push_back(rewriter.getNamedAttr(
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"operandSegmentSizes",
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rewriter.getDenseI32ArrayAttr({numCallOperands, 0})));
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newAttrs.push_back(rewriter.getNamedAttr("op_bundle_sizes",
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rewriter.getDenseI32ArrayAttr({})));
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return newAttrs;
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}
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2022-06-15 16:48:46 +02:00
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namespace {
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/// Lower `fir.address_of` operation to `llvm.address_of` operation.
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2024-03-22 12:56:45 -07:00
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struct AddrOfOpConversion : public fir::FIROpConversion<fir::AddrOfOp> {
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2021-10-29 23:20:50 +02:00
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using FIROpConversion::FIROpConversion;
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2024-07-02 10:42:33 +01:00
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llvm::LogicalResult
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2021-10-29 23:20:50 +02:00
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matchAndRewrite(fir::AddrOfOp addr, OpAdaptor adaptor,
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mlir::ConversionPatternRewriter &rewriter) const override {
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auto ty = convertType(addr.getType());
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rewriter.replaceOpWithNewOp<mlir::LLVM::AddressOfOp>(
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2022-02-15 20:35:46 +05:30
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addr, ty, addr.getSymbol().getRootReference().getValue());
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2022-04-26 13:44:34 -07:00
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return mlir::success();
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2021-10-29 23:20:50 +02:00
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}
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};
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2021-11-08 10:59:48 +00:00
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} // namespace
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/// Lookup the function to compute the memory size of this parametric derived
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/// type. The size of the object may depend on the LEN type parameters of the
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/// derived type.
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static mlir::LLVM::LLVMFuncOp
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getDependentTypeMemSizeFn(fir::RecordType recTy, fir::AllocaOp op,
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mlir::ConversionPatternRewriter &rewriter) {
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auto module = op->getParentOfType<mlir::ModuleOp>();
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std::string name = recTy.getName().str() + "P.mem.size";
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2022-06-15 16:48:46 +02:00
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if (auto memSizeFunc = module.lookupSymbol<mlir::LLVM::LLVMFuncOp>(name))
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return memSizeFunc;
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TODO(op.getLoc(), "did not find allocation function");
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2021-11-08 10:59:48 +00:00
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}
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2022-05-06 22:10:13 +08:00
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// Compute the alloc scale size (constant factors encoded in the array type).
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// We do this for arrays without a constant interior or arrays of character with
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// dynamic length arrays, since those are the only ones that get decayed to a
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// pointer to the element type.
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template <typename OP>
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static mlir::Value
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genAllocationScaleSize(OP op, mlir::Type ity,
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mlir::ConversionPatternRewriter &rewriter) {
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mlir::Location loc = op.getLoc();
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mlir::Type dataTy = op.getInType();
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2024-04-28 22:01:42 +02:00
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auto seqTy = mlir::dyn_cast<fir::SequenceType>(dataTy);
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2022-07-06 13:38:47 +01:00
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fir::SequenceType::Extent constSize = 1;
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if (seqTy) {
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int constRows = seqTy.getConstantRows();
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const fir::SequenceType::ShapeRef &shape = seqTy.getShape();
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if (constRows != static_cast<int>(shape.size())) {
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for (auto extent : shape) {
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if (constRows-- > 0)
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continue;
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if (extent != fir::SequenceType::getUnknownExtent())
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constSize *= extent;
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}
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2022-05-06 22:10:13 +08:00
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}
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}
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2022-07-06 13:38:47 +01:00
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if (constSize != 1) {
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mlir::Value constVal{
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genConstantIndex(loc, ity, rewriter, constSize).getResult()};
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return constVal;
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}
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2022-05-06 22:10:13 +08:00
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return nullptr;
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}
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2024-05-16 09:10:59 +01:00
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namespace {
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struct DeclareOpConversion : public fir::FIROpConversion<fir::cg::XDeclareOp> {
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public:
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using FIROpConversion::FIROpConversion;
|
2024-07-02 10:42:33 +01:00
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llvm::LogicalResult
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2024-05-16 09:10:59 +01:00
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matchAndRewrite(fir::cg::XDeclareOp declareOp, OpAdaptor adaptor,
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mlir::ConversionPatternRewriter &rewriter) const override {
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auto memRef = adaptor.getOperands()[0];
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if (auto fusedLoc = mlir::dyn_cast<mlir::FusedLoc>(declareOp.getLoc())) {
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if (auto varAttr =
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mlir::dyn_cast_or_null<mlir::LLVM::DILocalVariableAttr>(
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fusedLoc.getMetadata())) {
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rewriter.create<mlir::LLVM::DbgDeclareOp>(memRef.getLoc(), memRef,
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varAttr, nullptr);
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}
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}
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rewriter.replaceOp(declareOp, memRef);
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return mlir::success();
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}
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};
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} // namespace
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2021-11-08 10:59:48 +00:00
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namespace {
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/// convert to LLVM IR dialect `alloca`
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2024-03-22 12:56:45 -07:00
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struct AllocaOpConversion : public fir::FIROpConversion<fir::AllocaOp> {
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2021-11-08 10:59:48 +00:00
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using FIROpConversion::FIROpConversion;
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2024-07-02 10:42:33 +01:00
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llvm::LogicalResult
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2021-11-08 10:59:48 +00:00
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matchAndRewrite(fir::AllocaOp alloc, OpAdaptor adaptor,
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mlir::ConversionPatternRewriter &rewriter) const override {
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|
|
mlir::ValueRange operands = adaptor.getOperands();
|
|
|
|
auto loc = alloc.getLoc();
|
|
|
|
mlir::Type ity = lowerTy().indexType();
|
|
|
|
unsigned i = 0;
|
|
|
|
mlir::Value size = genConstantIndex(loc, ity, rewriter, 1).getResult();
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type firObjType = fir::unwrapRefType(alloc.getType());
|
|
|
|
mlir::Type llvmObjectType = convertObjectType(firObjType);
|
2021-11-08 10:59:48 +00:00
|
|
|
if (alloc.hasLenParams()) {
|
|
|
|
unsigned end = alloc.numLenParams();
|
|
|
|
llvm::SmallVector<mlir::Value> lenParams;
|
|
|
|
for (; i < end; ++i)
|
|
|
|
lenParams.push_back(operands[i]);
|
|
|
|
mlir::Type scalarType = fir::unwrapSequenceType(alloc.getInType());
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto chrTy = mlir::dyn_cast<fir::CharacterType>(scalarType)) {
|
2021-11-08 10:59:48 +00:00
|
|
|
fir::CharacterType rawCharTy = fir::CharacterType::getUnknownLen(
|
|
|
|
chrTy.getContext(), chrTy.getFKind());
|
2023-10-25 09:42:28 +02:00
|
|
|
llvmObjectType = convertType(rawCharTy);
|
2021-11-08 10:59:48 +00:00
|
|
|
assert(end == 1);
|
[Flang] Hoisting constant-sized allocas at flang codegen. (#95310)
This change modifies the `AllocaOpConversion` in flang codegen to insert
constant-sized LLVM allocas at the entry block of `LLVMFuncOp` or
OpenACC/OpenMP Op, rather than in-place at the `fir.alloca`. This
effectively hoists constant-sized FIR allocas to the proper block.
When compiling the example subroutine below with `flang-new`, we get a
llvm.stacksave/stackrestore pair around a constant-sized `fir.alloca
i32`.
```
subroutine test(n)
block
integer :: n
print *, n
end block
end subroutine test
```
Without the proposed change, downstream LLVM compilation cannot hoist
this constant-sized alloca out of the stacksave/stackrestore region
which may lead to missed downstream optimizations:
```
*** IR Dump After Safe Stack instrumentation pass (safe-stack) ***
define void @test_(ptr %0) !dbg !3 {
%2 = call ptr @llvm.stacksave.p0(), !dbg !7
%3 = alloca i32, i64 1, align 4, !dbg !8
%4 = call ptr @_FortranAioBeginExternalListOutput(i32 6, ptr @_QQclX62c91d05f046c7a656e7978eb13f2821, i32 4), !dbg !9
%5 = load i32, ptr %3, align 4, !dbg !10, !tbaa !11
%6 = call i1 @_FortranAioOutputInteger32(ptr %4, i32 %5), !dbg !10
%7 = call i32 @_FortranAioEndIoStatement(ptr %4), !dbg !9
call void @llvm.stackrestore.p0(ptr %2), !dbg !15
ret void, !dbg !16
}
```
With this change, the `llvm.alloca` is already hoisted out of the
stacksave/stackrestore region during flang codegen:
```
// -----// IR Dump After FIRToLLVMLowering (fir-to-llvm-ir) //----- //
llvm.func @test_(%arg0: !llvm.ptr {fir.bindc_name = "n"}) attributes {fir.internal_name = "_QPtest"} {
%0 = llvm.mlir.constant(4 : i32) : i32
%1 = llvm.mlir.constant(1 : i64) : i64
%2 = llvm.alloca %1 x i32 {bindc_name = "n"} : (i64) -> !llvm.ptr
%3 = llvm.mlir.constant(6 : i32) : i32
%4 = llvm.mlir.undef : i1
%5 = llvm.call @llvm.stacksave.p0() {fastmathFlags = #llvm.fastmath<contract>} : () -> !llvm.ptr
%6 = llvm.mlir.addressof @_QQclX62c91d05f046c7a656e7978eb13f2821 : !llvm.ptr
%7 = llvm.call @_FortranAioBeginExternalListOutput(%3, %6, %0) {fastmathFlags = #llvm.fastmath<contract>} : (i32, !llvm.ptr, i32) -> !llvm.ptr
%8 = llvm.load %2 {tbaa = [#tbaa_tag]} : !llvm.ptr -> i32
%9 = llvm.call @_FortranAioOutputInteger32(%7, %8) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr, i32) -> i1
%10 = llvm.call @_FortranAioEndIoStatement(%7) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> i32
llvm.call @llvm.stackrestore.p0(%5) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> ()
llvm.return
}
```
---------
Co-authored-by: Vijay Kandiah <vkandiah@sky6.pgi.net>
2024-06-14 11:36:05 -05:00
|
|
|
size = integerCast(loc, rewriter, ity, lenParams[0], /*fold=*/true);
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (auto recTy = mlir::dyn_cast<fir::RecordType>(scalarType)) {
|
2021-11-08 10:59:48 +00:00
|
|
|
mlir::LLVM::LLVMFuncOp memSizeFn =
|
|
|
|
getDependentTypeMemSizeFn(recTy, alloc, rewriter);
|
|
|
|
if (!memSizeFn)
|
|
|
|
emitError(loc, "did not find allocation function");
|
|
|
|
mlir::NamedAttribute attr = rewriter.getNamedAttr(
|
|
|
|
"callee", mlir::SymbolRefAttr::get(memSizeFn));
|
|
|
|
auto call = rewriter.create<mlir::LLVM::CallOp>(
|
2024-09-26 13:59:37 +08:00
|
|
|
loc, ity, lenParams,
|
|
|
|
addLLVMOpBundleAttrs(rewriter, {attr}, lenParams.size()));
|
2022-08-11 01:10:27 -04:00
|
|
|
size = call.getResult();
|
2023-10-25 09:42:28 +02:00
|
|
|
llvmObjectType = ::getI8Type(alloc.getContext());
|
2021-11-08 10:59:48 +00:00
|
|
|
} else {
|
|
|
|
return emitError(loc, "unexpected type ")
|
|
|
|
<< scalarType << " with type parameters";
|
|
|
|
}
|
|
|
|
}
|
2022-05-06 22:10:13 +08:00
|
|
|
if (auto scaleSize = genAllocationScaleSize(alloc, ity, rewriter))
|
[Flang] Hoisting constant-sized allocas at flang codegen. (#95310)
This change modifies the `AllocaOpConversion` in flang codegen to insert
constant-sized LLVM allocas at the entry block of `LLVMFuncOp` or
OpenACC/OpenMP Op, rather than in-place at the `fir.alloca`. This
effectively hoists constant-sized FIR allocas to the proper block.
When compiling the example subroutine below with `flang-new`, we get a
llvm.stacksave/stackrestore pair around a constant-sized `fir.alloca
i32`.
```
subroutine test(n)
block
integer :: n
print *, n
end block
end subroutine test
```
Without the proposed change, downstream LLVM compilation cannot hoist
this constant-sized alloca out of the stacksave/stackrestore region
which may lead to missed downstream optimizations:
```
*** IR Dump After Safe Stack instrumentation pass (safe-stack) ***
define void @test_(ptr %0) !dbg !3 {
%2 = call ptr @llvm.stacksave.p0(), !dbg !7
%3 = alloca i32, i64 1, align 4, !dbg !8
%4 = call ptr @_FortranAioBeginExternalListOutput(i32 6, ptr @_QQclX62c91d05f046c7a656e7978eb13f2821, i32 4), !dbg !9
%5 = load i32, ptr %3, align 4, !dbg !10, !tbaa !11
%6 = call i1 @_FortranAioOutputInteger32(ptr %4, i32 %5), !dbg !10
%7 = call i32 @_FortranAioEndIoStatement(ptr %4), !dbg !9
call void @llvm.stackrestore.p0(ptr %2), !dbg !15
ret void, !dbg !16
}
```
With this change, the `llvm.alloca` is already hoisted out of the
stacksave/stackrestore region during flang codegen:
```
// -----// IR Dump After FIRToLLVMLowering (fir-to-llvm-ir) //----- //
llvm.func @test_(%arg0: !llvm.ptr {fir.bindc_name = "n"}) attributes {fir.internal_name = "_QPtest"} {
%0 = llvm.mlir.constant(4 : i32) : i32
%1 = llvm.mlir.constant(1 : i64) : i64
%2 = llvm.alloca %1 x i32 {bindc_name = "n"} : (i64) -> !llvm.ptr
%3 = llvm.mlir.constant(6 : i32) : i32
%4 = llvm.mlir.undef : i1
%5 = llvm.call @llvm.stacksave.p0() {fastmathFlags = #llvm.fastmath<contract>} : () -> !llvm.ptr
%6 = llvm.mlir.addressof @_QQclX62c91d05f046c7a656e7978eb13f2821 : !llvm.ptr
%7 = llvm.call @_FortranAioBeginExternalListOutput(%3, %6, %0) {fastmathFlags = #llvm.fastmath<contract>} : (i32, !llvm.ptr, i32) -> !llvm.ptr
%8 = llvm.load %2 {tbaa = [#tbaa_tag]} : !llvm.ptr -> i32
%9 = llvm.call @_FortranAioOutputInteger32(%7, %8) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr, i32) -> i1
%10 = llvm.call @_FortranAioEndIoStatement(%7) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> i32
llvm.call @llvm.stackrestore.p0(%5) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> ()
llvm.return
}
```
---------
Co-authored-by: Vijay Kandiah <vkandiah@sky6.pgi.net>
2024-06-14 11:36:05 -05:00
|
|
|
size =
|
|
|
|
rewriter.createOrFold<mlir::LLVM::MulOp>(loc, ity, size, scaleSize);
|
2021-11-08 10:59:48 +00:00
|
|
|
if (alloc.hasShapeOperands()) {
|
|
|
|
unsigned end = operands.size();
|
|
|
|
for (; i < end; ++i)
|
[Flang] Hoisting constant-sized allocas at flang codegen. (#95310)
This change modifies the `AllocaOpConversion` in flang codegen to insert
constant-sized LLVM allocas at the entry block of `LLVMFuncOp` or
OpenACC/OpenMP Op, rather than in-place at the `fir.alloca`. This
effectively hoists constant-sized FIR allocas to the proper block.
When compiling the example subroutine below with `flang-new`, we get a
llvm.stacksave/stackrestore pair around a constant-sized `fir.alloca
i32`.
```
subroutine test(n)
block
integer :: n
print *, n
end block
end subroutine test
```
Without the proposed change, downstream LLVM compilation cannot hoist
this constant-sized alloca out of the stacksave/stackrestore region
which may lead to missed downstream optimizations:
```
*** IR Dump After Safe Stack instrumentation pass (safe-stack) ***
define void @test_(ptr %0) !dbg !3 {
%2 = call ptr @llvm.stacksave.p0(), !dbg !7
%3 = alloca i32, i64 1, align 4, !dbg !8
%4 = call ptr @_FortranAioBeginExternalListOutput(i32 6, ptr @_QQclX62c91d05f046c7a656e7978eb13f2821, i32 4), !dbg !9
%5 = load i32, ptr %3, align 4, !dbg !10, !tbaa !11
%6 = call i1 @_FortranAioOutputInteger32(ptr %4, i32 %5), !dbg !10
%7 = call i32 @_FortranAioEndIoStatement(ptr %4), !dbg !9
call void @llvm.stackrestore.p0(ptr %2), !dbg !15
ret void, !dbg !16
}
```
With this change, the `llvm.alloca` is already hoisted out of the
stacksave/stackrestore region during flang codegen:
```
// -----// IR Dump After FIRToLLVMLowering (fir-to-llvm-ir) //----- //
llvm.func @test_(%arg0: !llvm.ptr {fir.bindc_name = "n"}) attributes {fir.internal_name = "_QPtest"} {
%0 = llvm.mlir.constant(4 : i32) : i32
%1 = llvm.mlir.constant(1 : i64) : i64
%2 = llvm.alloca %1 x i32 {bindc_name = "n"} : (i64) -> !llvm.ptr
%3 = llvm.mlir.constant(6 : i32) : i32
%4 = llvm.mlir.undef : i1
%5 = llvm.call @llvm.stacksave.p0() {fastmathFlags = #llvm.fastmath<contract>} : () -> !llvm.ptr
%6 = llvm.mlir.addressof @_QQclX62c91d05f046c7a656e7978eb13f2821 : !llvm.ptr
%7 = llvm.call @_FortranAioBeginExternalListOutput(%3, %6, %0) {fastmathFlags = #llvm.fastmath<contract>} : (i32, !llvm.ptr, i32) -> !llvm.ptr
%8 = llvm.load %2 {tbaa = [#tbaa_tag]} : !llvm.ptr -> i32
%9 = llvm.call @_FortranAioOutputInteger32(%7, %8) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr, i32) -> i1
%10 = llvm.call @_FortranAioEndIoStatement(%7) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> i32
llvm.call @llvm.stackrestore.p0(%5) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> ()
llvm.return
}
```
---------
Co-authored-by: Vijay Kandiah <vkandiah@sky6.pgi.net>
2024-06-14 11:36:05 -05:00
|
|
|
size = rewriter.createOrFold<mlir::LLVM::MulOp>(
|
|
|
|
loc, ity, size,
|
|
|
|
integerCast(loc, rewriter, ity, operands[i], /*fold=*/true));
|
2021-11-08 10:59:48 +00:00
|
|
|
}
|
[Flang][MLIR] Add basic initial support for alloca and program address space handling in FIR->LLVMIR codegen (#77518)
This is a slightly more slimmed down and up-to-date version of the older
PR from here: https://reviews.llvm.org/D144203, written by @jsjodin,
which has already under gone some review.
This PR places allocas in the alloca address space specified by the
provided data layout (default is 0 for all address spaces, unless
explicitly specified by the layout), and then will cast these alloca's
to the program address space if this address space is different from the
allocation address space. For most architectures data layouts, this will
be a no-op, as they have a flat address space. But in the case of AMDGPU
it will result in allocas being placed in the correct address space (5,
private), and then casted into the correct program address space (0,
generic). This results in correct (partially, a follow up PR will be
forthcoming soon) generation of allocations inside of device code.
This PR is in addition to the work by @skatrak in this PR:
https://github.com/llvm/llvm-project/pull/69599 and adds seperate and
neccesary functionality of casting alloca's from their address space to
the program address space, both are independent PRs, although there is
some minor overlap e.g. this PR incorporates some of the useful helper
functions from 69599, so whichever lands first will need a minor rebase.
Co-author: jsjodin
2024-01-17 17:37:16 +01:00
|
|
|
|
|
|
|
unsigned allocaAs = getAllocaAddressSpace(rewriter);
|
|
|
|
unsigned programAs = getProgramAddressSpace(rewriter);
|
|
|
|
|
[Flang] Hoisting constant-sized allocas at flang codegen. (#95310)
This change modifies the `AllocaOpConversion` in flang codegen to insert
constant-sized LLVM allocas at the entry block of `LLVMFuncOp` or
OpenACC/OpenMP Op, rather than in-place at the `fir.alloca`. This
effectively hoists constant-sized FIR allocas to the proper block.
When compiling the example subroutine below with `flang-new`, we get a
llvm.stacksave/stackrestore pair around a constant-sized `fir.alloca
i32`.
```
subroutine test(n)
block
integer :: n
print *, n
end block
end subroutine test
```
Without the proposed change, downstream LLVM compilation cannot hoist
this constant-sized alloca out of the stacksave/stackrestore region
which may lead to missed downstream optimizations:
```
*** IR Dump After Safe Stack instrumentation pass (safe-stack) ***
define void @test_(ptr %0) !dbg !3 {
%2 = call ptr @llvm.stacksave.p0(), !dbg !7
%3 = alloca i32, i64 1, align 4, !dbg !8
%4 = call ptr @_FortranAioBeginExternalListOutput(i32 6, ptr @_QQclX62c91d05f046c7a656e7978eb13f2821, i32 4), !dbg !9
%5 = load i32, ptr %3, align 4, !dbg !10, !tbaa !11
%6 = call i1 @_FortranAioOutputInteger32(ptr %4, i32 %5), !dbg !10
%7 = call i32 @_FortranAioEndIoStatement(ptr %4), !dbg !9
call void @llvm.stackrestore.p0(ptr %2), !dbg !15
ret void, !dbg !16
}
```
With this change, the `llvm.alloca` is already hoisted out of the
stacksave/stackrestore region during flang codegen:
```
// -----// IR Dump After FIRToLLVMLowering (fir-to-llvm-ir) //----- //
llvm.func @test_(%arg0: !llvm.ptr {fir.bindc_name = "n"}) attributes {fir.internal_name = "_QPtest"} {
%0 = llvm.mlir.constant(4 : i32) : i32
%1 = llvm.mlir.constant(1 : i64) : i64
%2 = llvm.alloca %1 x i32 {bindc_name = "n"} : (i64) -> !llvm.ptr
%3 = llvm.mlir.constant(6 : i32) : i32
%4 = llvm.mlir.undef : i1
%5 = llvm.call @llvm.stacksave.p0() {fastmathFlags = #llvm.fastmath<contract>} : () -> !llvm.ptr
%6 = llvm.mlir.addressof @_QQclX62c91d05f046c7a656e7978eb13f2821 : !llvm.ptr
%7 = llvm.call @_FortranAioBeginExternalListOutput(%3, %6, %0) {fastmathFlags = #llvm.fastmath<contract>} : (i32, !llvm.ptr, i32) -> !llvm.ptr
%8 = llvm.load %2 {tbaa = [#tbaa_tag]} : !llvm.ptr -> i32
%9 = llvm.call @_FortranAioOutputInteger32(%7, %8) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr, i32) -> i1
%10 = llvm.call @_FortranAioEndIoStatement(%7) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> i32
llvm.call @llvm.stackrestore.p0(%5) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> ()
llvm.return
}
```
---------
Co-authored-by: Vijay Kandiah <vkandiah@sky6.pgi.net>
2024-06-14 11:36:05 -05:00
|
|
|
if (mlir::isa<mlir::LLVM::ConstantOp>(size.getDefiningOp())) {
|
|
|
|
// Set the Block in which the llvm alloca should be inserted.
|
|
|
|
mlir::Operation *parentOp = rewriter.getInsertionBlock()->getParentOp();
|
|
|
|
mlir::Region *parentRegion = rewriter.getInsertionBlock()->getParent();
|
|
|
|
mlir::Block *insertBlock =
|
|
|
|
getBlockForAllocaInsert(parentOp, parentRegion);
|
2024-11-15 10:31:20 +00:00
|
|
|
|
|
|
|
// The old size might have had multiple users, some at a broader scope
|
|
|
|
// than we can safely outline the alloca to. As it is only an
|
|
|
|
// llvm.constant operation, it is faster to clone it than to calculate the
|
|
|
|
// dominance to see if it really should be moved.
|
|
|
|
mlir::Operation *clonedSize = rewriter.clone(*size.getDefiningOp());
|
|
|
|
size = clonedSize->getResult(0);
|
|
|
|
clonedSize->moveBefore(&insertBlock->front());
|
[Flang] Hoisting constant-sized allocas at flang codegen. (#95310)
This change modifies the `AllocaOpConversion` in flang codegen to insert
constant-sized LLVM allocas at the entry block of `LLVMFuncOp` or
OpenACC/OpenMP Op, rather than in-place at the `fir.alloca`. This
effectively hoists constant-sized FIR allocas to the proper block.
When compiling the example subroutine below with `flang-new`, we get a
llvm.stacksave/stackrestore pair around a constant-sized `fir.alloca
i32`.
```
subroutine test(n)
block
integer :: n
print *, n
end block
end subroutine test
```
Without the proposed change, downstream LLVM compilation cannot hoist
this constant-sized alloca out of the stacksave/stackrestore region
which may lead to missed downstream optimizations:
```
*** IR Dump After Safe Stack instrumentation pass (safe-stack) ***
define void @test_(ptr %0) !dbg !3 {
%2 = call ptr @llvm.stacksave.p0(), !dbg !7
%3 = alloca i32, i64 1, align 4, !dbg !8
%4 = call ptr @_FortranAioBeginExternalListOutput(i32 6, ptr @_QQclX62c91d05f046c7a656e7978eb13f2821, i32 4), !dbg !9
%5 = load i32, ptr %3, align 4, !dbg !10, !tbaa !11
%6 = call i1 @_FortranAioOutputInteger32(ptr %4, i32 %5), !dbg !10
%7 = call i32 @_FortranAioEndIoStatement(ptr %4), !dbg !9
call void @llvm.stackrestore.p0(ptr %2), !dbg !15
ret void, !dbg !16
}
```
With this change, the `llvm.alloca` is already hoisted out of the
stacksave/stackrestore region during flang codegen:
```
// -----// IR Dump After FIRToLLVMLowering (fir-to-llvm-ir) //----- //
llvm.func @test_(%arg0: !llvm.ptr {fir.bindc_name = "n"}) attributes {fir.internal_name = "_QPtest"} {
%0 = llvm.mlir.constant(4 : i32) : i32
%1 = llvm.mlir.constant(1 : i64) : i64
%2 = llvm.alloca %1 x i32 {bindc_name = "n"} : (i64) -> !llvm.ptr
%3 = llvm.mlir.constant(6 : i32) : i32
%4 = llvm.mlir.undef : i1
%5 = llvm.call @llvm.stacksave.p0() {fastmathFlags = #llvm.fastmath<contract>} : () -> !llvm.ptr
%6 = llvm.mlir.addressof @_QQclX62c91d05f046c7a656e7978eb13f2821 : !llvm.ptr
%7 = llvm.call @_FortranAioBeginExternalListOutput(%3, %6, %0) {fastmathFlags = #llvm.fastmath<contract>} : (i32, !llvm.ptr, i32) -> !llvm.ptr
%8 = llvm.load %2 {tbaa = [#tbaa_tag]} : !llvm.ptr -> i32
%9 = llvm.call @_FortranAioOutputInteger32(%7, %8) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr, i32) -> i1
%10 = llvm.call @_FortranAioEndIoStatement(%7) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> i32
llvm.call @llvm.stackrestore.p0(%5) {fastmathFlags = #llvm.fastmath<contract>} : (!llvm.ptr) -> ()
llvm.return
}
```
---------
Co-authored-by: Vijay Kandiah <vkandiah@sky6.pgi.net>
2024-06-14 11:36:05 -05:00
|
|
|
rewriter.setInsertionPointAfter(size.getDefiningOp());
|
|
|
|
}
|
|
|
|
|
2023-10-25 09:42:28 +02:00
|
|
|
// NOTE: we used to pass alloc->getAttrs() in the builder for non opaque
|
|
|
|
// pointers! Only propagate pinned and bindc_name to help debugging, but
|
|
|
|
// this should have no functional purpose (and passing the operand segment
|
|
|
|
// attribute like before is certainly bad).
|
|
|
|
auto llvmAlloc = rewriter.create<mlir::LLVM::AllocaOp>(
|
[Flang][MLIR] Add basic initial support for alloca and program address space handling in FIR->LLVMIR codegen (#77518)
This is a slightly more slimmed down and up-to-date version of the older
PR from here: https://reviews.llvm.org/D144203, written by @jsjodin,
which has already under gone some review.
This PR places allocas in the alloca address space specified by the
provided data layout (default is 0 for all address spaces, unless
explicitly specified by the layout), and then will cast these alloca's
to the program address space if this address space is different from the
allocation address space. For most architectures data layouts, this will
be a no-op, as they have a flat address space. But in the case of AMDGPU
it will result in allocas being placed in the correct address space (5,
private), and then casted into the correct program address space (0,
generic). This results in correct (partially, a follow up PR will be
forthcoming soon) generation of allocations inside of device code.
This PR is in addition to the work by @skatrak in this PR:
https://github.com/llvm/llvm-project/pull/69599 and adds seperate and
neccesary functionality of casting alloca's from their address space to
the program address space, both are independent PRs, although there is
some minor overlap e.g. this PR incorporates some of the useful helper
functions from 69599, so whichever lands first will need a minor rebase.
Co-author: jsjodin
2024-01-17 17:37:16 +01:00
|
|
|
loc, ::getLlvmPtrType(alloc.getContext(), allocaAs), llvmObjectType,
|
|
|
|
size);
|
2023-10-25 09:42:28 +02:00
|
|
|
if (alloc.getPinned())
|
|
|
|
llvmAlloc->setDiscardableAttr(alloc.getPinnedAttrName(),
|
|
|
|
alloc.getPinnedAttr());
|
|
|
|
if (alloc.getBindcName())
|
|
|
|
llvmAlloc->setDiscardableAttr(alloc.getBindcNameAttrName(),
|
|
|
|
alloc.getBindcNameAttr());
|
[Flang][MLIR] Add basic initial support for alloca and program address space handling in FIR->LLVMIR codegen (#77518)
This is a slightly more slimmed down and up-to-date version of the older
PR from here: https://reviews.llvm.org/D144203, written by @jsjodin,
which has already under gone some review.
This PR places allocas in the alloca address space specified by the
provided data layout (default is 0 for all address spaces, unless
explicitly specified by the layout), and then will cast these alloca's
to the program address space if this address space is different from the
allocation address space. For most architectures data layouts, this will
be a no-op, as they have a flat address space. But in the case of AMDGPU
it will result in allocas being placed in the correct address space (5,
private), and then casted into the correct program address space (0,
generic). This results in correct (partially, a follow up PR will be
forthcoming soon) generation of allocations inside of device code.
This PR is in addition to the work by @skatrak in this PR:
https://github.com/llvm/llvm-project/pull/69599 and adds seperate and
neccesary functionality of casting alloca's from their address space to
the program address space, both are independent PRs, although there is
some minor overlap e.g. this PR incorporates some of the useful helper
functions from 69599, so whichever lands first will need a minor rebase.
Co-author: jsjodin
2024-01-17 17:37:16 +01:00
|
|
|
if (allocaAs == programAs) {
|
|
|
|
rewriter.replaceOp(alloc, llvmAlloc);
|
|
|
|
} else {
|
|
|
|
// if our allocation address space, is not the same as the program address
|
|
|
|
// space, then we must emit a cast to the program address space before
|
|
|
|
// use. An example case would be on AMDGPU, where the allocation address
|
|
|
|
// space is the numeric value 5 (private), and the program address space
|
|
|
|
// is 0 (generic).
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::AddrSpaceCastOp>(
|
|
|
|
alloc, ::getLlvmPtrType(alloc.getContext(), programAs), llvmAlloc);
|
|
|
|
}
|
2025-02-20 09:10:25 -08:00
|
|
|
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-08 10:59:48 +00:00
|
|
|
}
|
|
|
|
};
|
2022-03-02 11:22:07 +00:00
|
|
|
} // namespace
|
|
|
|
|
|
|
|
namespace {
|
2021-11-10 15:28:26 +01:00
|
|
|
/// Lower `fir.box_addr` to the sequence of operations to extract the first
|
|
|
|
/// element of the box.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxAddrOpConversion : public fir::FIROpConversion<fir::BoxAddrOp> {
|
2021-11-10 15:28:26 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-10 15:28:26 +01:00
|
|
|
matchAndRewrite(fir::BoxAddrOp boxaddr, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Value a = adaptor.getOperands()[0];
|
|
|
|
auto loc = boxaddr.getLoc();
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto argty =
|
|
|
|
mlir::dyn_cast<fir::BaseBoxType>(boxaddr.getVal().getType())) {
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(argty);
|
2023-01-17 09:08:43 -08:00
|
|
|
rewriter.replaceOp(boxaddr,
|
2023-10-25 09:42:28 +02:00
|
|
|
getBaseAddrFromBox(loc, boxTyPair, a, rewriter));
|
2021-11-10 15:28:26 +01:00
|
|
|
} else {
|
2022-08-09 22:07:35 -04:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ExtractValueOp>(boxaddr, a, 0);
|
2021-11-10 15:28:26 +01:00
|
|
|
}
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-10 15:28:26 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Convert `!fir.boxchar_len` to `!llvm.extractvalue` for the 2nd part of the
|
|
|
|
/// boxchar.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxCharLenOpConversion : public fir::FIROpConversion<fir::BoxCharLenOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::BoxCharLenOp boxCharLen, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Value boxChar = adaptor.getOperands()[0];
|
|
|
|
mlir::Location loc = boxChar.getLoc();
|
|
|
|
mlir::Type returnValTy = boxCharLen.getResult().getType();
|
|
|
|
|
|
|
|
constexpr int boxcharLenIdx = 1;
|
2022-08-09 22:07:35 -04:00
|
|
|
auto len = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, boxChar,
|
|
|
|
boxcharLenIdx);
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value lenAfterCast = integerCast(loc, rewriter, returnValTy, len);
|
|
|
|
rewriter.replaceOp(boxCharLen, lenAfterCast);
|
|
|
|
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2021-11-10 15:28:26 +01:00
|
|
|
/// Lower `fir.box_dims` to a sequence of operations to extract the requested
|
2023-01-17 09:08:43 -08:00
|
|
|
/// dimension information from the boxed value.
|
2021-11-10 15:28:26 +01:00
|
|
|
/// Result in a triple set of GEPs and loads.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxDimsOpConversion : public fir::FIROpConversion<fir::BoxDimsOp> {
|
2021-11-10 15:28:26 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-10 15:28:26 +01:00
|
|
|
matchAndRewrite(fir::BoxDimsOp boxdims, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-04-26 13:44:34 -07:00
|
|
|
llvm::SmallVector<mlir::Type, 3> resultTypes = {
|
2021-11-10 15:28:26 +01:00
|
|
|
convertType(boxdims.getResult(0).getType()),
|
|
|
|
convertType(boxdims.getResult(1).getType()),
|
|
|
|
convertType(boxdims.getResult(2).getType()),
|
|
|
|
};
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(boxdims.getVal().getType());
|
|
|
|
auto results = getDimsFromBox(boxdims.getLoc(), resultTypes, boxTyPair,
|
|
|
|
adaptor.getOperands()[0],
|
|
|
|
adaptor.getOperands()[1], rewriter);
|
2021-11-10 15:28:26 +01:00
|
|
|
rewriter.replaceOp(boxdims, results);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-10 15:28:26 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Lower `fir.box_elesize` to a sequence of operations ro extract the size of
|
|
|
|
/// an element in the boxed value.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxEleSizeOpConversion : public fir::FIROpConversion<fir::BoxEleSizeOp> {
|
2021-11-10 15:28:26 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-10 15:28:26 +01:00
|
|
|
matchAndRewrite(fir::BoxEleSizeOp boxelesz, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2023-01-17 09:08:43 -08:00
|
|
|
mlir::Value box = adaptor.getOperands()[0];
|
2021-11-10 15:28:26 +01:00
|
|
|
auto loc = boxelesz.getLoc();
|
|
|
|
auto ty = convertType(boxelesz.getType());
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(boxelesz.getVal().getType());
|
|
|
|
auto elemSize = getElementSizeFromBox(loc, ty, boxTyPair, box, rewriter);
|
2021-11-11 10:39:02 +01:00
|
|
|
rewriter.replaceOp(boxelesz, elemSize);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-11 10:39:02 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Lower `fir.box_isalloc` to a sequence of operations to determine if the
|
|
|
|
/// boxed value was from an ALLOCATABLE entity.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxIsAllocOpConversion : public fir::FIROpConversion<fir::BoxIsAllocOp> {
|
2021-11-11 10:39:02 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-11 10:39:02 +01:00
|
|
|
matchAndRewrite(fir::BoxIsAllocOp boxisalloc, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Value box = adaptor.getOperands()[0];
|
|
|
|
auto loc = boxisalloc.getLoc();
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(boxisalloc.getVal().getType());
|
|
|
|
mlir::Value check =
|
|
|
|
genBoxAttributeCheck(loc, boxTyPair, box, rewriter, kAttrAllocatable);
|
2021-11-11 10:39:02 +01:00
|
|
|
rewriter.replaceOp(boxisalloc, check);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-11 10:39:02 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Lower `fir.box_isarray` to a sequence of operations to determine if the
|
|
|
|
/// boxed is an array.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxIsArrayOpConversion : public fir::FIROpConversion<fir::BoxIsArrayOp> {
|
2021-11-11 10:39:02 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-11 10:39:02 +01:00
|
|
|
matchAndRewrite(fir::BoxIsArrayOp boxisarray, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Value a = adaptor.getOperands()[0];
|
|
|
|
auto loc = boxisarray.getLoc();
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(boxisarray.getVal().getType());
|
2024-05-28 17:32:27 +02:00
|
|
|
mlir::Value rank = getRankFromBox(loc, boxTyPair, a, rewriter);
|
|
|
|
mlir::Value c0 = genConstantIndex(loc, rank.getType(), rewriter, 0);
|
2021-11-11 10:39:02 +01:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ICmpOp>(
|
|
|
|
boxisarray, mlir::LLVM::ICmpPredicate::ne, rank, c0);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-11 10:39:02 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Lower `fir.box_isptr` to a sequence of operations to determined if the
|
|
|
|
/// boxed value was from a POINTER entity.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxIsPtrOpConversion : public fir::FIROpConversion<fir::BoxIsPtrOp> {
|
2021-11-11 10:39:02 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-11 10:39:02 +01:00
|
|
|
matchAndRewrite(fir::BoxIsPtrOp boxisptr, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Value box = adaptor.getOperands()[0];
|
|
|
|
auto loc = boxisptr.getLoc();
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(boxisptr.getVal().getType());
|
|
|
|
mlir::Value check =
|
|
|
|
genBoxAttributeCheck(loc, boxTyPair, box, rewriter, kAttrPointer);
|
2021-11-11 10:39:02 +01:00
|
|
|
rewriter.replaceOp(boxisptr, check);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-10 15:28:26 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Lower `fir.box_rank` to the sequence of operation to extract the rank from
|
|
|
|
/// the box.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxRankOpConversion : public fir::FIROpConversion<fir::BoxRankOp> {
|
2021-11-10 15:28:26 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-10 15:28:26 +01:00
|
|
|
matchAndRewrite(fir::BoxRankOp boxrank, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Value a = adaptor.getOperands()[0];
|
|
|
|
auto loc = boxrank.getLoc();
|
|
|
|
mlir::Type ty = convertType(boxrank.getType());
|
2024-05-30 11:02:09 +02:00
|
|
|
TypePair boxTyPair =
|
|
|
|
getBoxTypePair(fir::unwrapRefType(boxrank.getBox().getType()));
|
2024-05-28 17:32:27 +02:00
|
|
|
mlir::Value rank = getRankFromBox(loc, boxTyPair, a, rewriter);
|
|
|
|
mlir::Value result = integerCast(loc, rewriter, ty, rank);
|
2021-11-10 15:28:26 +01:00
|
|
|
rewriter.replaceOp(boxrank, result);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-10 15:28:26 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2021-11-18 11:26:53 +00:00
|
|
|
/// Lower `fir.boxproc_host` operation. Extracts the host pointer from the
|
|
|
|
/// boxproc.
|
|
|
|
/// TODO: Part of supporting Fortran 2003 procedure pointers.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxProcHostOpConversion
|
|
|
|
: public fir::FIROpConversion<fir::BoxProcHostOp> {
|
2021-11-18 11:26:53 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-18 11:26:53 +00:00
|
|
|
matchAndRewrite(fir::BoxProcHostOp boxprochost, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2021-12-01 22:12:12 +00:00
|
|
|
TODO(boxprochost.getLoc(), "fir.boxproc_host codegen");
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2021-11-18 11:26:53 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2021-11-17 12:01:57 +01:00
|
|
|
/// Lower `fir.box_tdesc` to the sequence of operations to extract the type
|
|
|
|
/// descriptor from the box.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxTypeDescOpConversion
|
|
|
|
: public fir::FIROpConversion<fir::BoxTypeDescOp> {
|
2021-11-17 12:01:57 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-17 12:01:57 +01:00
|
|
|
matchAndRewrite(fir::BoxTypeDescOp boxtypedesc, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Value box = adaptor.getOperands()[0];
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(boxtypedesc.getBox().getType());
|
|
|
|
auto typeDescAddr =
|
|
|
|
loadTypeDescAddress(boxtypedesc.getLoc(), boxTyPair, box, rewriter);
|
2022-10-26 14:16:43 +02:00
|
|
|
rewriter.replaceOp(boxtypedesc, typeDescAddr);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-17 12:01:57 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-11-14 10:50:56 +01:00
|
|
|
/// Lower `fir.box_typecode` to a sequence of operations to extract the type
|
|
|
|
/// code in the boxed value.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxTypeCodeOpConversion
|
|
|
|
: public fir::FIROpConversion<fir::BoxTypeCodeOp> {
|
2022-11-14 10:50:56 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-11-14 10:50:56 +01:00
|
|
|
matchAndRewrite(fir::BoxTypeCodeOp op, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Value box = adaptor.getOperands()[0];
|
|
|
|
auto loc = box.getLoc();
|
|
|
|
auto ty = convertType(op.getType());
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(op.getBox().getType());
|
|
|
|
auto typeCode =
|
|
|
|
getValueFromBox(loc, boxTyPair, box, ty, rewriter, kTypePosInBox);
|
2022-11-14 10:50:56 +01:00
|
|
|
rewriter.replaceOp(op, typeCode);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Lower `fir.string_lit` to LLVM IR dialect operation.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct StringLitOpConversion : public fir::FIROpConversion<fir::StringLitOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::StringLitOp constop, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
auto ty = convertType(constop.getType());
|
|
|
|
auto attr = constop.getValue();
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<mlir::StringAttr>(attr)) {
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ConstantOp>(constop, ty, attr);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
2024-04-28 22:01:42 +02:00
|
|
|
auto charTy = mlir::cast<fir::CharacterType>(constop.getType());
|
2022-03-02 11:22:07 +00:00
|
|
|
unsigned bits = lowerTy().characterBitsize(charTy);
|
|
|
|
mlir::Type intTy = rewriter.getIntegerType(bits);
|
2022-04-03 15:19:38 +02:00
|
|
|
mlir::Location loc = constop.getLoc();
|
|
|
|
mlir::Value cst = rewriter.create<mlir::LLVM::UndefOp>(loc, ty);
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto arr = mlir::dyn_cast<mlir::DenseElementsAttr>(attr)) {
|
2022-04-03 15:19:38 +02:00
|
|
|
cst = rewriter.create<mlir::LLVM::ConstantOp>(loc, ty, arr);
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (auto arr = mlir::dyn_cast<mlir::ArrayAttr>(attr)) {
|
2022-08-09 16:10:21 -04:00
|
|
|
for (auto a : llvm::enumerate(arr.getValue())) {
|
2022-04-03 15:19:38 +02:00
|
|
|
// convert each character to a precise bitsize
|
2022-08-09 16:10:21 -04:00
|
|
|
auto elemAttr = mlir::IntegerAttr::get(
|
|
|
|
intTy,
|
2024-04-28 22:01:42 +02:00
|
|
|
mlir::cast<mlir::IntegerAttr>(a.value()).getValue().zextOrTrunc(
|
|
|
|
bits));
|
2022-08-09 16:10:21 -04:00
|
|
|
auto elemCst =
|
|
|
|
rewriter.create<mlir::LLVM::ConstantOp>(loc, intTy, elemAttr);
|
2022-08-09 22:07:35 -04:00
|
|
|
cst = rewriter.create<mlir::LLVM::InsertValueOp>(loc, cst, elemCst,
|
|
|
|
a.index());
|
2022-04-03 15:19:38 +02:00
|
|
|
}
|
|
|
|
} else {
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2022-04-03 15:19:38 +02:00
|
|
|
}
|
|
|
|
rewriter.replaceOp(constop, cst);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-06-15 16:48:46 +02:00
|
|
|
/// `fir.call` -> `llvm.call`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct CallOpConversion : public fir::FIROpConversion<fir::CallOp> {
|
2021-11-05 13:41:39 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-05 13:41:39 +00:00
|
|
|
matchAndRewrite(fir::CallOp call, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-04-26 13:44:34 -07:00
|
|
|
llvm::SmallVector<mlir::Type> resultTys;
|
2025-02-24 09:27:48 -08:00
|
|
|
mlir::Attribute memAttr =
|
|
|
|
call->getAttr(fir::FIROpsDialect::getFirCallMemoryAttrName());
|
|
|
|
if (memAttr)
|
|
|
|
call->removeAttr(fir::FIROpsDialect::getFirCallMemoryAttrName());
|
|
|
|
|
2021-11-05 13:41:39 +00:00
|
|
|
for (auto r : call.getResults())
|
|
|
|
resultTys.push_back(convertType(r.getType()));
|
2022-11-09 15:18:50 -08:00
|
|
|
// Convert arith::FastMathFlagsAttr to LLVM::FastMathFlagsAttr.
|
|
|
|
mlir::arith::AttrConvertFastMathToLLVM<fir::CallOp, mlir::LLVM::CallOp>
|
|
|
|
attrConvert(call);
|
2025-02-12 09:49:52 +01:00
|
|
|
auto llvmCall = rewriter.replaceOpWithNewOp<mlir::LLVM::CallOp>(
|
2024-09-26 13:59:37 +08:00
|
|
|
call, resultTys, adaptor.getOperands(),
|
|
|
|
addLLVMOpBundleAttrs(rewriter, attrConvert.getAttrs(),
|
|
|
|
adaptor.getOperands().size()));
|
2025-02-12 17:31:34 +01:00
|
|
|
if (mlir::ArrayAttr argAttrsArray = call.getArgAttrsAttr()) {
|
|
|
|
// sret and byval type needs to be converted.
|
|
|
|
auto convertTypeAttr = [&](const mlir::NamedAttribute &attr) {
|
|
|
|
return mlir::TypeAttr::get(convertType(
|
|
|
|
llvm::cast<mlir::TypeAttr>(attr.getValue()).getValue()));
|
|
|
|
};
|
|
|
|
llvm::SmallVector<mlir::Attribute> newArgAttrsArray;
|
|
|
|
for (auto argAttrs : argAttrsArray) {
|
|
|
|
llvm::SmallVector<mlir::NamedAttribute> convertedAttrs;
|
|
|
|
for (const mlir::NamedAttribute &attr :
|
|
|
|
llvm::cast<mlir::DictionaryAttr>(argAttrs)) {
|
|
|
|
if (attr.getName().getValue() ==
|
|
|
|
mlir::LLVM::LLVMDialect::getByValAttrName()) {
|
|
|
|
convertedAttrs.push_back(rewriter.getNamedAttr(
|
|
|
|
mlir::LLVM::LLVMDialect::getByValAttrName(),
|
|
|
|
convertTypeAttr(attr)));
|
|
|
|
} else if (attr.getName().getValue() ==
|
|
|
|
mlir::LLVM::LLVMDialect::getStructRetAttrName()) {
|
|
|
|
convertedAttrs.push_back(rewriter.getNamedAttr(
|
|
|
|
mlir::LLVM::LLVMDialect::getStructRetAttrName(),
|
|
|
|
convertTypeAttr(attr)));
|
|
|
|
} else {
|
|
|
|
convertedAttrs.push_back(attr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
newArgAttrsArray.emplace_back(
|
|
|
|
mlir::DictionaryAttr::get(rewriter.getContext(), convertedAttrs));
|
|
|
|
}
|
|
|
|
llvmCall.setArgAttrsAttr(rewriter.getArrayAttr(newArgAttrsArray));
|
|
|
|
}
|
2025-02-12 09:49:52 +01:00
|
|
|
if (mlir::ArrayAttr resAttrs = call.getResAttrsAttr())
|
|
|
|
llvmCall.setResAttrsAttr(resAttrs);
|
2025-02-24 09:27:48 -08:00
|
|
|
|
|
|
|
if (memAttr)
|
|
|
|
llvmCall.setMemoryEffectsAttr(
|
|
|
|
mlir::cast<mlir::LLVM::MemoryEffectsAttr>(memAttr));
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-05 13:41:39 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-02 15:46:21 -06:00
|
|
|
} // namespace
|
2021-11-05 13:41:39 +00:00
|
|
|
|
2021-11-09 15:37:49 +01:00
|
|
|
static mlir::Type getComplexEleTy(mlir::Type complex) {
|
2024-10-04 09:57:03 +02:00
|
|
|
return mlir::cast<mlir::ComplexType>(complex).getElementType();
|
2021-11-09 15:37:49 +01:00
|
|
|
}
|
|
|
|
|
2021-11-02 15:46:21 -06:00
|
|
|
namespace {
|
2021-11-16 10:17:29 +00:00
|
|
|
/// Compare complex values
|
|
|
|
///
|
|
|
|
/// Per 10.1, the only comparisons available are .EQ. (oeq) and .NE. (une).
|
|
|
|
///
|
|
|
|
/// For completeness, all other comparison are done on the real component only.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct CmpcOpConversion : public fir::FIROpConversion<fir::CmpcOp> {
|
2021-11-16 10:17:29 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-16 10:17:29 +00:00
|
|
|
matchAndRewrite(fir::CmpcOp cmp, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
|
|
|
mlir::Type resTy = convertType(cmp.getType());
|
|
|
|
mlir::Location loc = cmp.getLoc();
|
2023-12-06 10:19:48 +00:00
|
|
|
mlir::LLVM::FastmathFlags fmf =
|
|
|
|
mlir::arith::convertArithFastMathFlagsToLLVM(cmp.getFastmath());
|
|
|
|
mlir::LLVM::FCmpPredicate pred =
|
|
|
|
static_cast<mlir::LLVM::FCmpPredicate>(cmp.getPredicate());
|
|
|
|
auto rcp = rewriter.create<mlir::LLVM::FCmpOp>(
|
|
|
|
loc, resTy, pred,
|
2022-08-09 22:07:35 -04:00
|
|
|
rewriter.create<mlir::LLVM::ExtractValueOp>(loc, operands[0], 0),
|
2023-12-06 10:19:48 +00:00
|
|
|
rewriter.create<mlir::LLVM::ExtractValueOp>(loc, operands[1], 0), fmf);
|
|
|
|
auto icp = rewriter.create<mlir::LLVM::FCmpOp>(
|
|
|
|
loc, resTy, pred,
|
2022-08-09 22:07:35 -04:00
|
|
|
rewriter.create<mlir::LLVM::ExtractValueOp>(loc, operands[0], 1),
|
2023-12-06 10:19:48 +00:00
|
|
|
rewriter.create<mlir::LLVM::ExtractValueOp>(loc, operands[1], 1), fmf);
|
2022-06-15 16:48:46 +02:00
|
|
|
llvm::SmallVector<mlir::Value, 2> cp = {rcp, icp};
|
2021-11-16 10:17:29 +00:00
|
|
|
switch (cmp.getPredicate()) {
|
|
|
|
case mlir::arith::CmpFPredicate::OEQ: // .EQ.
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::AndOp>(cmp, resTy, cp);
|
|
|
|
break;
|
|
|
|
case mlir::arith::CmpFPredicate::UNE: // .NE.
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::OrOp>(cmp, resTy, cp);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
rewriter.replaceOp(cmp, rcp.getResult());
|
|
|
|
break;
|
|
|
|
}
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-16 10:17:29 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2021-11-09 15:37:49 +01:00
|
|
|
/// convert value of from-type to value of to-type
|
2024-03-22 12:56:45 -07:00
|
|
|
struct ConvertOpConversion : public fir::FIROpConversion<fir::ConvertOp> {
|
2021-11-09 15:37:49 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
|
|
|
static bool isFloatingPointTy(mlir::Type ty) {
|
2024-04-28 22:01:42 +02:00
|
|
|
return mlir::isa<mlir::FloatType>(ty);
|
2021-11-09 15:37:49 +01:00
|
|
|
}
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-09 15:37:49 +01:00
|
|
|
matchAndRewrite(fir::ConvertOp convert, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-03-09 09:41:55 +01:00
|
|
|
auto fromFirTy = convert.getValue().getType();
|
|
|
|
auto toFirTy = convert.getRes().getType();
|
|
|
|
auto fromTy = convertType(fromFirTy);
|
|
|
|
auto toTy = convertType(toFirTy);
|
2021-11-09 15:37:49 +01:00
|
|
|
mlir::Value op0 = adaptor.getOperands()[0];
|
2023-03-27 19:28:36 -07:00
|
|
|
|
|
|
|
if (fromFirTy == toFirTy) {
|
2021-11-09 15:37:49 +01:00
|
|
|
rewriter.replaceOp(convert, op0);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-09 15:37:49 +01:00
|
|
|
}
|
2023-03-27 19:28:36 -07:00
|
|
|
|
2021-11-09 15:37:49 +01:00
|
|
|
auto loc = convert.getLoc();
|
2023-03-27 19:28:36 -07:00
|
|
|
auto i1Type = mlir::IntegerType::get(convert.getContext(), 1);
|
|
|
|
|
2024-10-09 10:37:46 -03:00
|
|
|
if (mlir::isa<fir::RecordType>(toFirTy)) {
|
|
|
|
// Convert to compatible BIND(C) record type.
|
|
|
|
// Double check that the record types are compatible (it should have
|
|
|
|
// already been checked by the verifier).
|
|
|
|
assert(mlir::cast<fir::RecordType>(fromFirTy).getTypeList() ==
|
|
|
|
mlir::cast<fir::RecordType>(toFirTy).getTypeList() &&
|
|
|
|
"incompatible record types");
|
|
|
|
|
|
|
|
auto toStTy = mlir::cast<mlir::LLVM::LLVMStructType>(toTy);
|
|
|
|
mlir::Value val = rewriter.create<mlir::LLVM::UndefOp>(loc, toStTy);
|
|
|
|
auto indexTypeMap = toStTy.getSubelementIndexMap();
|
|
|
|
assert(indexTypeMap.has_value() && "invalid record type");
|
|
|
|
|
|
|
|
for (auto [attr, type] : indexTypeMap.value()) {
|
|
|
|
int64_t index = mlir::cast<mlir::IntegerAttr>(attr).getInt();
|
|
|
|
auto extVal =
|
|
|
|
rewriter.create<mlir::LLVM::ExtractValueOp>(loc, op0, index);
|
|
|
|
val =
|
|
|
|
rewriter.create<mlir::LLVM::InsertValueOp>(loc, val, extVal, index);
|
|
|
|
}
|
|
|
|
|
|
|
|
rewriter.replaceOp(convert, val);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::LogicalType>(fromFirTy) ||
|
|
|
|
mlir::isa<fir::LogicalType>(toFirTy)) {
|
2023-03-27 19:28:36 -07:00
|
|
|
// By specification fir::LogicalType value may be any number,
|
|
|
|
// where non-zero value represents .true. and zero value represents
|
|
|
|
// .false.
|
|
|
|
//
|
|
|
|
// integer<->logical conversion requires value normalization.
|
|
|
|
// Conversion from wide logical to narrow logical must set the result
|
|
|
|
// to non-zero iff the input is non-zero - the easiest way to implement
|
|
|
|
// it is to compare the input agains zero and set the result to
|
|
|
|
// the canonical 0/1.
|
|
|
|
// Conversion from narrow logical to wide logical may be implemented
|
|
|
|
// as a zero or sign extension of the input, but it may use value
|
|
|
|
// normalization as well.
|
2024-04-28 22:01:42 +02:00
|
|
|
if (!mlir::isa<mlir::IntegerType>(fromTy) ||
|
|
|
|
!mlir::isa<mlir::IntegerType>(toTy))
|
2023-03-27 19:28:36 -07:00
|
|
|
return mlir::emitError(loc)
|
|
|
|
<< "unsupported types for logical conversion: " << fromTy
|
|
|
|
<< " -> " << toTy;
|
|
|
|
|
|
|
|
// Do folding for constant inputs.
|
2024-04-05 12:39:24 +01:00
|
|
|
if (auto constVal = fir::getIntIfConstant(op0)) {
|
2023-03-27 19:28:36 -07:00
|
|
|
mlir::Value normVal =
|
|
|
|
genConstantIndex(loc, toTy, rewriter, *constVal ? 1 : 0);
|
|
|
|
rewriter.replaceOp(convert, normVal);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
|
|
|
|
// If the input is i1, then we can just zero extend it, and
|
|
|
|
// the result will be normalized.
|
|
|
|
if (fromTy == i1Type) {
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ZExtOp>(convert, toTy, op0);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
|
|
|
|
// Compare the input with zero.
|
|
|
|
mlir::Value zero = genConstantIndex(loc, fromTy, rewriter, 0);
|
|
|
|
auto isTrue = rewriter.create<mlir::LLVM::ICmpOp>(
|
|
|
|
loc, mlir::LLVM::ICmpPredicate::ne, op0, zero);
|
|
|
|
|
|
|
|
// Zero extend the i1 isTrue result to the required type (unless it is i1
|
|
|
|
// itself).
|
|
|
|
if (toTy != i1Type)
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ZExtOp>(convert, toTy, isTrue);
|
|
|
|
else
|
|
|
|
rewriter.replaceOp(convert, isTrue.getResult());
|
|
|
|
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fromTy == toTy) {
|
|
|
|
rewriter.replaceOp(convert, op0);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
2021-11-09 15:37:49 +01:00
|
|
|
auto convertFpToFp = [&](mlir::Value val, unsigned fromBits,
|
|
|
|
unsigned toBits, mlir::Type toTy) -> mlir::Value {
|
|
|
|
if (fromBits == toBits) {
|
|
|
|
// TODO: Converting between two floating-point representations with the
|
|
|
|
// same bitwidth is not allowed for now.
|
|
|
|
mlir::emitError(loc,
|
|
|
|
"cannot implicitly convert between two floating-point "
|
|
|
|
"representations of the same bitwidth");
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
if (fromBits > toBits)
|
|
|
|
return rewriter.create<mlir::LLVM::FPTruncOp>(loc, toTy, val);
|
|
|
|
return rewriter.create<mlir::LLVM::FPExtOp>(loc, toTy, val);
|
|
|
|
};
|
|
|
|
// Complex to complex conversion.
|
2022-03-09 09:41:55 +01:00
|
|
|
if (fir::isa_complex(fromFirTy) && fir::isa_complex(toFirTy)) {
|
2021-11-09 15:37:49 +01:00
|
|
|
// Special case: handle the conversion of a complex such that both the
|
|
|
|
// real and imaginary parts are converted together.
|
2022-02-15 20:35:46 +05:30
|
|
|
auto ty = convertType(getComplexEleTy(convert.getValue().getType()));
|
2022-08-09 22:07:35 -04:00
|
|
|
auto rp = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, op0, 0);
|
|
|
|
auto ip = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, op0, 1);
|
2022-02-15 20:35:46 +05:30
|
|
|
auto nt = convertType(getComplexEleTy(convert.getRes().getType()));
|
2021-11-09 15:37:49 +01:00
|
|
|
auto fromBits = mlir::LLVM::getPrimitiveTypeSizeInBits(ty);
|
|
|
|
auto toBits = mlir::LLVM::getPrimitiveTypeSizeInBits(nt);
|
|
|
|
auto rc = convertFpToFp(rp, fromBits, toBits, nt);
|
|
|
|
auto ic = convertFpToFp(ip, fromBits, toBits, nt);
|
|
|
|
auto un = rewriter.create<mlir::LLVM::UndefOp>(loc, toTy);
|
2022-08-09 22:07:35 -04:00
|
|
|
auto i1 = rewriter.create<mlir::LLVM::InsertValueOp>(loc, un, rc, 0);
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::InsertValueOp>(convert, i1, ic,
|
|
|
|
1);
|
2021-11-09 15:37:49 +01:00
|
|
|
return mlir::success();
|
|
|
|
}
|
2022-03-09 09:41:55 +01:00
|
|
|
|
2021-11-09 15:37:49 +01:00
|
|
|
// Floating point to floating point conversion.
|
|
|
|
if (isFloatingPointTy(fromTy)) {
|
|
|
|
if (isFloatingPointTy(toTy)) {
|
|
|
|
auto fromBits = mlir::LLVM::getPrimitiveTypeSizeInBits(fromTy);
|
|
|
|
auto toBits = mlir::LLVM::getPrimitiveTypeSizeInBits(toTy);
|
|
|
|
auto v = convertFpToFp(op0, fromBits, toBits, toTy);
|
|
|
|
rewriter.replaceOp(convert, v);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<mlir::IntegerType>(toTy)) {
|
[flang] Use saturated intrinsics for floating point to integer conversions (#130686)
The saturated floating point conversion intrinsics match the semantics in the standard more closely than the fptosi/fptoui instructions.
Case 2 of 16.9.100 is
> INT (A [, KIND])
> If A is of type real, there are two cases: if |A| < 1, INT (A) has the
value 0; if |A| ≥ 1, INT (A) is the integer whose magnitude is the
largest integer that does not exceed the magnitude of A and whose sign
is the same as the sign of A.
Currently, converting a floating point value into an integer type too
small to hold the constant will be converted to poison in opt, leaving
us with garbage:
```
> cat t.f90
program main
real(kind=16) :: f
integer(kind=4) :: i
f=huge(f)
i=f
print *, i
end program main
# current upstream
> for i in `seq 10`; do; ./a.out; done
-862156992
-1497393344
-739096768
-1649494208
1761228608
-1959270592
-746244288
-1629194432
-231217344
382322496
```
With the saturated fptoui/fptosi intrinsics, we get the appropriate
values
```
# mine
> flang -O2 ./t.f90 && ./a.out
2147483647
> perl -e 'printf "%d\n", (2 ** 31) - 1'
2147483647
```
One notable difference: NaNs being converted to ints will become zero, unlike current flang (and some other compilers). Newer versions of GCC have this behavior.
2025-03-12 08:14:46 -07:00
|
|
|
// NOTE: We are checking the fir type here because toTy is an LLVM type
|
|
|
|
// which is signless, and we need to use the intrinsic that matches the
|
|
|
|
// sign of the output in fir.
|
|
|
|
if (toFirTy.isUnsignedInteger()) {
|
|
|
|
auto intrinsicName =
|
|
|
|
mlir::StringAttr::get(convert.getContext(), "llvm.fptoui.sat");
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::CallIntrinsicOp>(
|
|
|
|
convert, toTy, intrinsicName, op0);
|
|
|
|
} else {
|
|
|
|
auto intrinsicName =
|
|
|
|
mlir::StringAttr::get(convert.getContext(), "llvm.fptosi.sat");
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::CallIntrinsicOp>(
|
|
|
|
convert, toTy, intrinsicName, op0);
|
|
|
|
}
|
2021-11-09 15:37:49 +01:00
|
|
|
return mlir::success();
|
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (mlir::isa<mlir::IntegerType>(fromTy)) {
|
2021-11-09 15:37:49 +01:00
|
|
|
// Integer to integer conversion.
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<mlir::IntegerType>(toTy)) {
|
2021-11-09 15:37:49 +01:00
|
|
|
auto fromBits = mlir::LLVM::getPrimitiveTypeSizeInBits(fromTy);
|
|
|
|
auto toBits = mlir::LLVM::getPrimitiveTypeSizeInBits(toTy);
|
|
|
|
assert(fromBits != toBits);
|
|
|
|
if (fromBits > toBits) {
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::TruncOp>(convert, toTy, op0);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
2024-12-18 07:02:37 -08:00
|
|
|
if (fromFirTy == i1Type || fromFirTy.isUnsignedInteger()) {
|
2023-03-14 06:31:27 +01:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ZExtOp>(convert, toTy, op0);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
2021-11-09 15:37:49 +01:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::SExtOp>(convert, toTy, op0);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
// Integer to floating point conversion.
|
|
|
|
if (isFloatingPointTy(toTy)) {
|
2024-12-18 07:02:37 -08:00
|
|
|
if (fromTy.isUnsignedInteger())
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::UIToFPOp>(convert, toTy, op0);
|
|
|
|
else
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::SIToFPOp>(convert, toTy, op0);
|
2021-11-09 15:37:49 +01:00
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
// Integer to pointer conversion.
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<mlir::LLVM::LLVMPointerType>(toTy)) {
|
2021-11-09 15:37:49 +01:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::IntToPtrOp>(convert, toTy, op0);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (mlir::isa<mlir::LLVM::LLVMPointerType>(fromTy)) {
|
2021-11-09 15:37:49 +01:00
|
|
|
// Pointer to integer conversion.
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<mlir::IntegerType>(toTy)) {
|
2021-11-09 15:37:49 +01:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::PtrToIntOp>(convert, toTy, op0);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
// Pointer to pointer conversion.
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<mlir::LLVM::LLVMPointerType>(toTy)) {
|
2021-11-09 15:37:49 +01:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::BitcastOp>(convert, toTy, op0);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return emitError(loc) << "cannot convert " << fromTy << " to " << toTy;
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2023-10-06 09:29:57 +02:00
|
|
|
/// `fir.type_info` operation has no specific CodeGen. The operation is
|
|
|
|
/// only used to carry information during FIR to FIR passes. It may be used
|
|
|
|
/// in the future to generate the runtime type info data structures instead
|
|
|
|
/// of generating them in lowering.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct TypeInfoOpConversion : public fir::FIROpConversion<fir::TypeInfoOp> {
|
2021-11-11 13:58:39 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2023-10-06 09:29:57 +02:00
|
|
|
matchAndRewrite(fir::TypeInfoOp op, OpAdaptor,
|
2021-11-11 13:58:39 +01:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-11-17 10:53:13 +01:00
|
|
|
rewriter.eraseOp(op);
|
|
|
|
return mlir::success();
|
2021-11-11 13:58:39 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-11-17 10:53:13 +01:00
|
|
|
/// `fir.dt_entry` operation has no specific CodeGen. The operation is only used
|
|
|
|
/// to carry information during FIR to FIR passes.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct DTEntryOpConversion : public fir::FIROpConversion<fir::DTEntryOp> {
|
2021-11-11 13:58:39 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-11-17 10:53:13 +01:00
|
|
|
matchAndRewrite(fir::DTEntryOp op, OpAdaptor,
|
2021-11-11 13:58:39 +01:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-11-17 10:53:13 +01:00
|
|
|
rewriter.eraseOp(op);
|
|
|
|
return mlir::success();
|
2021-11-11 13:58:39 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2021-11-15 16:47:04 +01:00
|
|
|
/// Lower `fir.global_len` operation.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct GlobalLenOpConversion : public fir::FIROpConversion<fir::GlobalLenOp> {
|
2021-11-15 16:47:04 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-15 16:47:04 +01:00
|
|
|
matchAndRewrite(fir::GlobalLenOp globalLen, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2021-12-01 22:12:12 +00:00
|
|
|
TODO(globalLen.getLoc(), "fir.global_len codegen");
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2021-11-15 16:47:04 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2021-11-18 12:40:48 +00:00
|
|
|
/// Lower fir.len_param_index
|
|
|
|
struct LenParamIndexOpConversion
|
2024-03-22 12:56:45 -07:00
|
|
|
: public fir::FIROpConversion<fir::LenParamIndexOp> {
|
2021-11-18 12:40:48 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
|
|
|
// FIXME: this should be specialized by the runtime target
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-18 12:40:48 +00:00
|
|
|
matchAndRewrite(fir::LenParamIndexOp lenp, OpAdaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2021-12-01 22:12:12 +00:00
|
|
|
TODO(lenp.getLoc(), "fir.len_param_index codegen");
|
2021-11-18 12:40:48 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Convert `!fir.emboxchar<!fir.char<KIND, ?>, #n>` into a sequence of
|
|
|
|
/// instructions that generate `!llvm.struct<(ptr<ik>, i64)>`. The 1st element
|
|
|
|
/// in this struct is a pointer. Its type is determined from `KIND`. The 2nd
|
|
|
|
/// element is the length of the character buffer (`#n`).
|
2024-03-22 12:56:45 -07:00
|
|
|
struct EmboxCharOpConversion : public fir::FIROpConversion<fir::EmboxCharOp> {
|
2021-11-16 14:37:05 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::EmboxCharOp emboxChar, OpAdaptor adaptor,
|
2021-11-16 14:37:05 +01:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
|
|
|
|
|
|
|
mlir::Value charBuffer = operands[0];
|
|
|
|
mlir::Value charBufferLen = operands[1];
|
|
|
|
|
|
|
|
mlir::Location loc = emboxChar.getLoc();
|
|
|
|
mlir::Type llvmStructTy = convertType(emboxChar.getType());
|
|
|
|
auto llvmStruct = rewriter.create<mlir::LLVM::UndefOp>(loc, llvmStructTy);
|
|
|
|
|
|
|
|
mlir::Type lenTy =
|
2024-04-28 22:01:42 +02:00
|
|
|
mlir::cast<mlir::LLVM::LLVMStructType>(llvmStructTy).getBody()[1];
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value lenAfterCast = integerCast(loc, rewriter, lenTy, charBufferLen);
|
|
|
|
|
2022-12-07 11:59:01 +01:00
|
|
|
mlir::Type addrTy =
|
2024-04-28 22:01:42 +02:00
|
|
|
mlir::cast<mlir::LLVM::LLVMStructType>(llvmStructTy).getBody()[0];
|
2022-12-07 11:59:01 +01:00
|
|
|
if (addrTy != charBuffer.getType())
|
|
|
|
charBuffer =
|
|
|
|
rewriter.create<mlir::LLVM::BitcastOp>(loc, addrTy, charBuffer);
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
auto insertBufferOp = rewriter.create<mlir::LLVM::InsertValueOp>(
|
2022-08-09 22:07:35 -04:00
|
|
|
loc, llvmStruct, charBuffer, 0);
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::InsertValueOp>(
|
2022-08-09 22:07:35 -04:00
|
|
|
emboxChar, insertBufferOp, lenAfterCast, 1);
|
2022-03-02 11:22:07 +00:00
|
|
|
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-16 14:37:05 +01:00
|
|
|
}
|
|
|
|
};
|
2021-11-02 15:46:21 -06:00
|
|
|
} // namespace
|
|
|
|
|
2024-11-13 17:09:38 -08:00
|
|
|
template <typename ModuleOp>
|
2024-01-18 09:37:44 +01:00
|
|
|
static mlir::SymbolRefAttr
|
2024-11-13 17:09:38 -08:00
|
|
|
getMallocInModule(ModuleOp mod, fir::AllocMemOp op,
|
2025-03-11 02:01:57 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Type indexType) {
|
2024-01-18 09:37:44 +01:00
|
|
|
static constexpr char mallocName[] = "malloc";
|
2024-11-13 17:09:38 -08:00
|
|
|
if (auto mallocFunc =
|
|
|
|
mod.template lookupSymbol<mlir::LLVM::LLVMFuncOp>(mallocName))
|
2024-01-18 09:37:44 +01:00
|
|
|
return mlir::SymbolRefAttr::get(mallocFunc);
|
2024-11-13 17:09:38 -08:00
|
|
|
if (auto userMalloc =
|
|
|
|
mod.template lookupSymbol<mlir::func::FuncOp>(mallocName))
|
2024-01-18 09:37:44 +01:00
|
|
|
return mlir::SymbolRefAttr::get(userMalloc);
|
2024-11-13 17:09:38 -08:00
|
|
|
|
|
|
|
mlir::OpBuilder moduleBuilder(mod.getBodyRegion());
|
2024-01-18 09:37:44 +01:00
|
|
|
auto mallocDecl = moduleBuilder.create<mlir::LLVM::LLVMFuncOp>(
|
|
|
|
op.getLoc(), mallocName,
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::LLVM::LLVMFunctionType::get(getLlvmPtrType(op.getContext()),
|
2021-11-02 15:46:21 -06:00
|
|
|
indexType,
|
|
|
|
/*isVarArg=*/false));
|
2024-01-18 09:37:44 +01:00
|
|
|
return mlir::SymbolRefAttr::get(mallocDecl);
|
2021-11-02 15:46:21 -06:00
|
|
|
}
|
|
|
|
|
2024-11-13 17:09:38 -08:00
|
|
|
/// Return the LLVMFuncOp corresponding to the standard malloc call.
|
2025-03-11 02:01:57 +00:00
|
|
|
static mlir::SymbolRefAttr getMalloc(fir::AllocMemOp op,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Type indexType) {
|
2024-11-13 17:09:38 -08:00
|
|
|
if (auto mod = op->getParentOfType<mlir::gpu::GPUModuleOp>())
|
2025-03-11 02:01:57 +00:00
|
|
|
return getMallocInModule(mod, op, rewriter, indexType);
|
2024-11-13 17:09:38 -08:00
|
|
|
auto mod = op->getParentOfType<mlir::ModuleOp>();
|
2025-03-11 02:01:57 +00:00
|
|
|
return getMallocInModule(mod, op, rewriter, indexType);
|
2024-11-13 17:09:38 -08:00
|
|
|
}
|
|
|
|
|
2022-09-08 10:13:45 -07:00
|
|
|
/// Helper function for generating the LLVM IR that computes the distance
|
|
|
|
/// in bytes between adjacent elements pointed to by a pointer
|
|
|
|
/// of type \p ptrTy. The result is returned as a value of \p idxTy integer
|
|
|
|
/// type.
|
2021-11-02 15:46:21 -06:00
|
|
|
static mlir::Value
|
2023-10-25 09:42:28 +02:00
|
|
|
computeElementDistance(mlir::Location loc, mlir::Type llvmObjectType,
|
|
|
|
mlir::Type idxTy,
|
2021-11-02 15:46:21 -06:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) {
|
2022-09-08 10:13:45 -07:00
|
|
|
// Note that we cannot use something like
|
|
|
|
// mlir::LLVM::getPrimitiveTypeSizeInBits() for the element type here. For
|
|
|
|
// example, it returns 10 bytes for mlir::Float80Type for targets where it
|
|
|
|
// occupies 16 bytes. Proper solution is probably to use
|
|
|
|
// mlir::DataLayout::getTypeABIAlignment(), but DataLayout is not being set
|
|
|
|
// yet (see llvm-project#57230). For the time being use the '(intptr_t)((type
|
|
|
|
// *)0 + 1)' trick for all types. The generated instructions are optimized
|
|
|
|
// into constant by the first pass of InstCombine, so it should not be a
|
|
|
|
// performance issue.
|
2023-10-25 09:42:28 +02:00
|
|
|
auto llvmPtrTy = ::getLlvmPtrType(llvmObjectType.getContext());
|
|
|
|
auto nullPtr = rewriter.create<mlir::LLVM::ZeroOp>(loc, llvmPtrTy);
|
2022-07-29 01:00:22 +02:00
|
|
|
auto gep = rewriter.create<mlir::LLVM::GEPOp>(
|
2023-10-25 09:42:28 +02:00
|
|
|
loc, llvmPtrTy, llvmObjectType, nullPtr,
|
|
|
|
llvm::ArrayRef<mlir::LLVM::GEPArg>{1});
|
2021-11-02 15:46:21 -06:00
|
|
|
return rewriter.create<mlir::LLVM::PtrToIntOp>(loc, idxTy, gep);
|
|
|
|
}
|
|
|
|
|
2022-09-08 10:13:45 -07:00
|
|
|
/// Return value of the stride in bytes between adjacent elements
|
|
|
|
/// of LLVM type \p llTy. The result is returned as a value of
|
|
|
|
/// \p idxTy integer type.
|
|
|
|
static mlir::Value
|
|
|
|
genTypeStrideInBytes(mlir::Location loc, mlir::Type idxTy,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Type llTy) {
|
|
|
|
// Create a pointer type and use computeElementDistance().
|
2023-10-25 09:42:28 +02:00
|
|
|
return computeElementDistance(loc, llTy, idxTy, rewriter);
|
2022-09-08 10:13:45 -07:00
|
|
|
}
|
|
|
|
|
2021-11-02 15:46:21 -06:00
|
|
|
namespace {
|
|
|
|
/// Lower a `fir.allocmem` instruction into `llvm.call @malloc`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct AllocMemOpConversion : public fir::FIROpConversion<fir::AllocMemOp> {
|
2021-11-02 15:46:21 -06:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-02 15:46:21 -06:00
|
|
|
matchAndRewrite(fir::AllocMemOp heap, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-06-15 16:48:46 +02:00
|
|
|
mlir::Type heapTy = heap.getType();
|
2021-11-02 15:46:21 -06:00
|
|
|
mlir::Location loc = heap.getLoc();
|
|
|
|
auto ity = lowerTy().indexType();
|
2022-06-15 16:48:46 +02:00
|
|
|
mlir::Type dataTy = fir::unwrapRefType(heapTy);
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmObjectTy = convertObjectType(dataTy);
|
2022-02-10 18:40:13 -08:00
|
|
|
if (fir::isRecordWithTypeParameters(fir::unwrapSequenceType(dataTy)))
|
|
|
|
TODO(loc, "fir.allocmem codegen of derived type with length parameters");
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Value size = genTypeSizeInBytes(loc, ity, rewriter, llvmObjectTy);
|
2022-05-06 22:10:13 +08:00
|
|
|
if (auto scaleSize = genAllocationScaleSize(heap, ity, rewriter))
|
|
|
|
size = rewriter.create<mlir::LLVM::MulOp>(loc, ity, size, scaleSize);
|
2021-11-02 15:46:21 -06:00
|
|
|
for (mlir::Value opnd : adaptor.getOperands())
|
|
|
|
size = rewriter.create<mlir::LLVM::MulOp>(
|
|
|
|
loc, ity, size, integerCast(loc, rewriter, ity, opnd));
|
2025-03-11 02:01:57 +00:00
|
|
|
auto mallocTyWidth = lowerTy().getIndexTypeBitwidth();
|
|
|
|
auto mallocTy =
|
|
|
|
mlir::IntegerType::get(rewriter.getContext(), mallocTyWidth);
|
|
|
|
if (mallocTyWidth != ity.getIntOrFloatBitWidth())
|
|
|
|
size = integerCast(loc, rewriter, mallocTy, size);
|
|
|
|
heap->setAttr("callee", getMalloc(heap, rewriter, mallocTy));
|
2023-10-25 09:42:28 +02:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::CallOp>(
|
2024-09-26 13:59:37 +08:00
|
|
|
heap, ::getLlvmPtrType(heap.getContext()), size,
|
|
|
|
addLLVMOpBundleAttrs(rewriter, heap->getAttrs(), 1));
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-02 15:46:21 -06:00
|
|
|
}
|
|
|
|
|
2022-09-08 10:13:45 -07:00
|
|
|
/// Compute the allocation size in bytes of the element type of
|
|
|
|
/// \p llTy pointer type. The result is returned as a value of \p idxTy
|
|
|
|
/// integer type.
|
2021-11-02 15:46:21 -06:00
|
|
|
mlir::Value genTypeSizeInBytes(mlir::Location loc, mlir::Type idxTy,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Type llTy) const {
|
2023-10-25 09:42:28 +02:00
|
|
|
return computeElementDistance(loc, llTy, idxTy, rewriter);
|
2021-11-02 15:46:21 -06:00
|
|
|
}
|
|
|
|
};
|
|
|
|
} // namespace
|
|
|
|
|
|
|
|
/// Return the LLVMFuncOp corresponding to the standard free call.
|
2024-11-13 17:09:38 -08:00
|
|
|
template <typename ModuleOp>
|
|
|
|
static mlir::SymbolRefAttr
|
|
|
|
getFreeInModule(ModuleOp mod, fir::FreeMemOp op,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) {
|
2024-01-18 09:37:44 +01:00
|
|
|
static constexpr char freeName[] = "free";
|
|
|
|
// Check if free already defined in the module.
|
2024-11-13 17:09:38 -08:00
|
|
|
if (auto freeFunc =
|
|
|
|
mod.template lookupSymbol<mlir::LLVM::LLVMFuncOp>(freeName))
|
2024-01-18 09:37:44 +01:00
|
|
|
return mlir::SymbolRefAttr::get(freeFunc);
|
|
|
|
if (auto freeDefinedByUser =
|
2024-11-13 17:09:38 -08:00
|
|
|
mod.template lookupSymbol<mlir::func::FuncOp>(freeName))
|
2024-01-18 09:37:44 +01:00
|
|
|
return mlir::SymbolRefAttr::get(freeDefinedByUser);
|
|
|
|
// Create llvm declaration for free.
|
2024-11-13 17:09:38 -08:00
|
|
|
mlir::OpBuilder moduleBuilder(mod.getBodyRegion());
|
2021-11-02 15:46:21 -06:00
|
|
|
auto voidType = mlir::LLVM::LLVMVoidType::get(op.getContext());
|
2024-01-18 09:37:44 +01:00
|
|
|
auto freeDecl = moduleBuilder.create<mlir::LLVM::LLVMFuncOp>(
|
|
|
|
rewriter.getUnknownLoc(), freeName,
|
2021-11-02 15:46:21 -06:00
|
|
|
mlir::LLVM::LLVMFunctionType::get(voidType,
|
2023-10-25 09:42:28 +02:00
|
|
|
getLlvmPtrType(op.getContext()),
|
2021-11-02 15:46:21 -06:00
|
|
|
/*isVarArg=*/false));
|
2024-01-18 09:37:44 +01:00
|
|
|
return mlir::SymbolRefAttr::get(freeDecl);
|
2021-11-02 15:46:21 -06:00
|
|
|
}
|
|
|
|
|
2024-11-13 17:09:38 -08:00
|
|
|
static mlir::SymbolRefAttr getFree(fir::FreeMemOp op,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) {
|
|
|
|
if (auto mod = op->getParentOfType<mlir::gpu::GPUModuleOp>())
|
|
|
|
return getFreeInModule(mod, op, rewriter);
|
|
|
|
auto mod = op->getParentOfType<mlir::ModuleOp>();
|
|
|
|
return getFreeInModule(mod, op, rewriter);
|
|
|
|
}
|
|
|
|
|
2022-07-05 09:13:07 +02:00
|
|
|
static unsigned getDimension(mlir::LLVM::LLVMArrayType ty) {
|
|
|
|
unsigned result = 1;
|
2024-04-28 22:01:42 +02:00
|
|
|
for (auto eleTy =
|
|
|
|
mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(ty.getElementType());
|
|
|
|
eleTy; eleTy = mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(
|
|
|
|
eleTy.getElementType()))
|
2022-07-05 09:13:07 +02:00
|
|
|
++result;
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2021-11-02 15:46:21 -06:00
|
|
|
namespace {
|
|
|
|
/// Lower a `fir.freemem` instruction into `llvm.call @free`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct FreeMemOpConversion : public fir::FIROpConversion<fir::FreeMemOp> {
|
2021-11-02 15:46:21 -06:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-02 15:46:21 -06:00
|
|
|
matchAndRewrite(fir::FreeMemOp freemem, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Location loc = freemem.getLoc();
|
2024-01-18 09:37:44 +01:00
|
|
|
freemem->setAttr("callee", getFree(freemem, rewriter));
|
2024-09-26 13:59:37 +08:00
|
|
|
rewriter.create<mlir::LLVM::CallOp>(
|
|
|
|
loc, mlir::TypeRange{}, mlir::ValueRange{adaptor.getHeapref()},
|
|
|
|
addLLVMOpBundleAttrs(rewriter, freemem->getAttrs(), 1));
|
2021-11-02 15:46:21 -06:00
|
|
|
rewriter.eraseOp(freemem);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-02 15:46:21 -06:00
|
|
|
}
|
|
|
|
};
|
2022-03-02 11:22:07 +00:00
|
|
|
} // namespace
|
2021-11-16 14:37:05 +01:00
|
|
|
|
2023-06-29 14:46:58 +00:00
|
|
|
// Convert subcomponent array indices from column-major to row-major ordering.
|
|
|
|
static llvm::SmallVector<mlir::Value>
|
|
|
|
convertSubcomponentIndices(mlir::Location loc, mlir::Type eleTy,
|
|
|
|
mlir::ValueRange indices,
|
|
|
|
mlir::Type *retTy = nullptr) {
|
|
|
|
llvm::SmallVector<mlir::Value> result;
|
|
|
|
llvm::SmallVector<mlir::Value> arrayIndices;
|
|
|
|
|
|
|
|
auto appendArrayIndices = [&] {
|
|
|
|
if (arrayIndices.empty())
|
|
|
|
return;
|
|
|
|
std::reverse(arrayIndices.begin(), arrayIndices.end());
|
|
|
|
result.append(arrayIndices.begin(), arrayIndices.end());
|
|
|
|
arrayIndices.clear();
|
|
|
|
};
|
|
|
|
|
|
|
|
for (mlir::Value index : indices) {
|
|
|
|
// Component indices can be field index to select a component, or array
|
|
|
|
// index, to select an element in an array component.
|
|
|
|
if (auto structTy = mlir::dyn_cast<mlir::LLVM::LLVMStructType>(eleTy)) {
|
|
|
|
std::int64_t cstIndex = getConstantIntValue(index);
|
|
|
|
assert(cstIndex < (int64_t)structTy.getBody().size() &&
|
|
|
|
"out-of-bounds struct field index");
|
|
|
|
eleTy = structTy.getBody()[cstIndex];
|
|
|
|
appendArrayIndices();
|
|
|
|
result.push_back(index);
|
|
|
|
} else if (auto arrayTy =
|
|
|
|
mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(eleTy)) {
|
|
|
|
eleTy = arrayTy.getElementType();
|
|
|
|
arrayIndices.push_back(index);
|
|
|
|
} else
|
|
|
|
fir::emitFatalError(loc, "Unexpected subcomponent type");
|
|
|
|
}
|
|
|
|
appendArrayIndices();
|
|
|
|
if (retTy)
|
|
|
|
*retTy = eleTy;
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2024-12-18 18:20:45 -08:00
|
|
|
static mlir::Value genSourceFile(mlir::Location loc, mlir::ModuleOp mod,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) {
|
|
|
|
auto ptrTy = mlir::LLVM::LLVMPointerType::get(rewriter.getContext());
|
|
|
|
if (auto flc = mlir::dyn_cast<mlir::FileLineColLoc>(loc)) {
|
|
|
|
auto fn = flc.getFilename().str() + '\0';
|
|
|
|
std::string globalName = fir::factory::uniqueCGIdent("cl", fn);
|
|
|
|
|
|
|
|
if (auto g = mod.lookupSymbol<fir::GlobalOp>(globalName)) {
|
|
|
|
return rewriter.create<mlir::LLVM::AddressOfOp>(loc, ptrTy, g.getName());
|
|
|
|
} else if (auto g = mod.lookupSymbol<mlir::LLVM::GlobalOp>(globalName)) {
|
|
|
|
return rewriter.create<mlir::LLVM::AddressOfOp>(loc, ptrTy, g.getName());
|
|
|
|
}
|
|
|
|
|
|
|
|
auto crtInsPt = rewriter.saveInsertionPoint();
|
|
|
|
rewriter.setInsertionPoint(mod.getBody(), mod.getBody()->end());
|
|
|
|
auto arrayTy = mlir::LLVM::LLVMArrayType::get(
|
|
|
|
mlir::IntegerType::get(rewriter.getContext(), 8), fn.size());
|
|
|
|
mlir::LLVM::GlobalOp globalOp = rewriter.create<mlir::LLVM::GlobalOp>(
|
|
|
|
loc, arrayTy, /*constant=*/true, mlir::LLVM::Linkage::Linkonce,
|
|
|
|
globalName, mlir::Attribute());
|
|
|
|
|
|
|
|
mlir::Region ®ion = globalOp.getInitializerRegion();
|
|
|
|
mlir::Block *block = rewriter.createBlock(®ion);
|
|
|
|
rewriter.setInsertionPoint(block, block->begin());
|
|
|
|
mlir::Value constValue = rewriter.create<mlir::LLVM::ConstantOp>(
|
|
|
|
loc, arrayTy, rewriter.getStringAttr(fn));
|
|
|
|
rewriter.create<mlir::LLVM::ReturnOp>(loc, constValue);
|
|
|
|
rewriter.restoreInsertionPoint(crtInsPt);
|
|
|
|
return rewriter.create<mlir::LLVM::AddressOfOp>(loc, ptrTy,
|
|
|
|
globalOp.getName());
|
|
|
|
}
|
|
|
|
return rewriter.create<mlir::LLVM::ZeroOp>(loc, ptrTy);
|
|
|
|
}
|
|
|
|
|
|
|
|
static mlir::Value genSourceLine(mlir::Location loc,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) {
|
|
|
|
if (auto flc = mlir::dyn_cast<mlir::FileLineColLoc>(loc))
|
|
|
|
return rewriter.create<mlir::LLVM::ConstantOp>(loc, rewriter.getI32Type(),
|
|
|
|
flc.getLine());
|
|
|
|
return rewriter.create<mlir::LLVM::ConstantOp>(loc, rewriter.getI32Type(), 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static mlir::Value
|
|
|
|
genCUFAllocDescriptor(mlir::Location loc,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::ModuleOp mod, fir::BaseBoxType boxTy,
|
|
|
|
const fir::LLVMTypeConverter &typeConverter) {
|
|
|
|
std::optional<mlir::DataLayout> dl =
|
2025-01-30 17:31:50 +01:00
|
|
|
fir::support::getOrSetMLIRDataLayout(mod, /*allowDefaultLayout=*/true);
|
2024-12-18 18:20:45 -08:00
|
|
|
if (!dl)
|
|
|
|
mlir::emitError(mod.getLoc(),
|
|
|
|
"module operation must carry a data layout attribute "
|
|
|
|
"to generate llvm IR from FIR");
|
|
|
|
|
|
|
|
mlir::Value sourceFile = genSourceFile(loc, mod, rewriter);
|
|
|
|
mlir::Value sourceLine = genSourceLine(loc, rewriter);
|
|
|
|
|
|
|
|
mlir::MLIRContext *ctx = mod.getContext();
|
|
|
|
|
|
|
|
mlir::LLVM::LLVMPointerType llvmPointerType =
|
|
|
|
mlir::LLVM::LLVMPointerType::get(ctx);
|
|
|
|
mlir::Type llvmInt32Type = mlir::IntegerType::get(ctx, 32);
|
|
|
|
mlir::Type llvmIntPtrType =
|
|
|
|
mlir::IntegerType::get(ctx, typeConverter.getPointerBitwidth(0));
|
|
|
|
auto fctTy = mlir::LLVM::LLVMFunctionType::get(
|
|
|
|
llvmPointerType, {llvmIntPtrType, llvmPointerType, llvmInt32Type});
|
|
|
|
|
|
|
|
auto llvmFunc = mod.lookupSymbol<mlir::LLVM::LLVMFuncOp>(
|
2024-12-20 13:57:47 -08:00
|
|
|
RTNAME_STRING(CUFAllocDescriptor));
|
2024-12-18 18:20:45 -08:00
|
|
|
auto funcFunc =
|
2024-12-20 13:57:47 -08:00
|
|
|
mod.lookupSymbol<mlir::func::FuncOp>(RTNAME_STRING(CUFAllocDescriptor));
|
2024-12-18 18:20:45 -08:00
|
|
|
if (!llvmFunc && !funcFunc)
|
|
|
|
mlir::OpBuilder::atBlockEnd(mod.getBody())
|
2024-12-20 13:57:47 -08:00
|
|
|
.create<mlir::LLVM::LLVMFuncOp>(loc, RTNAME_STRING(CUFAllocDescriptor),
|
2024-12-18 18:20:45 -08:00
|
|
|
fctTy);
|
|
|
|
|
|
|
|
mlir::Type structTy = typeConverter.convertBoxTypeAsStruct(boxTy);
|
|
|
|
std::size_t boxSize = dl->getTypeSizeInBits(structTy) / 8;
|
|
|
|
mlir::Value sizeInBytes =
|
|
|
|
genConstantIndex(loc, llvmIntPtrType, rewriter, boxSize);
|
|
|
|
llvm::SmallVector args = {sizeInBytes, sourceFile, sourceLine};
|
|
|
|
return rewriter
|
2024-12-20 13:57:47 -08:00
|
|
|
.create<mlir::LLVM::CallOp>(loc, fctTy, RTNAME_STRING(CUFAllocDescriptor),
|
2024-12-18 18:20:45 -08:00
|
|
|
args)
|
|
|
|
.getResult();
|
|
|
|
}
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Common base class for embox to descriptor conversion.
|
|
|
|
template <typename OP>
|
2024-03-22 12:56:45 -07:00
|
|
|
struct EmboxCommonConversion : public fir::FIROpConversion<OP> {
|
|
|
|
using fir::FIROpConversion<OP>::FIROpConversion;
|
|
|
|
using TypePair = typename fir::FIROpConversion<OP>::TypePair;
|
2021-11-18 11:05:45 +01:00
|
|
|
|
2022-10-19 09:41:23 +02:00
|
|
|
static int getCFIAttr(fir::BaseBoxType boxTy) {
|
2021-11-18 11:05:45 +01:00
|
|
|
auto eleTy = boxTy.getEleTy();
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::PointerType>(eleTy))
|
2021-11-18 11:05:45 +01:00
|
|
|
return CFI_attribute_pointer;
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::HeapType>(eleTy))
|
2021-11-18 11:05:45 +01:00
|
|
|
return CFI_attribute_allocatable;
|
|
|
|
return CFI_attribute_other;
|
|
|
|
}
|
|
|
|
|
2023-06-29 18:38:18 +02:00
|
|
|
mlir::Value getCharacterByteSize(mlir::Location loc,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
fir::CharacterType charTy,
|
|
|
|
mlir::ValueRange lenParams) const {
|
|
|
|
auto i64Ty = mlir::IntegerType::get(rewriter.getContext(), 64);
|
|
|
|
mlir::Value size =
|
|
|
|
genTypeStrideInBytes(loc, i64Ty, rewriter, this->convertType(charTy));
|
|
|
|
if (charTy.hasConstantLen())
|
|
|
|
return size; // Length accounted for in the genTypeStrideInBytes GEP.
|
|
|
|
// Otherwise, multiply the single character size by the length.
|
|
|
|
assert(!lenParams.empty());
|
2024-03-22 12:56:45 -07:00
|
|
|
auto len64 = fir::FIROpConversion<OP>::integerCast(loc, rewriter, i64Ty,
|
|
|
|
lenParams.back());
|
2023-06-29 18:38:18 +02:00
|
|
|
return rewriter.create<mlir::LLVM::MulOp>(loc, i64Ty, size, len64);
|
|
|
|
}
|
|
|
|
|
2021-11-18 11:05:45 +01:00
|
|
|
// Get the element size and CFI type code of the boxed value.
|
|
|
|
std::tuple<mlir::Value, mlir::Value> getSizeAndTypeCode(
|
|
|
|
mlir::Location loc, mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Type boxEleTy, mlir::ValueRange lenParams = {}) const {
|
2022-09-08 10:13:45 -07:00
|
|
|
auto i64Ty = mlir::IntegerType::get(rewriter.getContext(), 64);
|
2023-04-14 11:54:07 -07:00
|
|
|
if (auto eleTy = fir::dyn_cast_ptrEleTy(boxEleTy))
|
|
|
|
boxEleTy = eleTy;
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto seqTy = mlir::dyn_cast<fir::SequenceType>(boxEleTy))
|
2023-04-14 11:54:07 -07:00
|
|
|
return getSizeAndTypeCode(loc, rewriter, seqTy.getEleTy(), lenParams);
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<mlir::NoneType>(
|
|
|
|
boxEleTy)) // unlimited polymorphic or assumed type
|
2023-04-14 11:54:07 -07:00
|
|
|
return {rewriter.create<mlir::LLVM::ConstantOp>(loc, i64Ty, 0),
|
|
|
|
this->genConstantOffset(loc, rewriter, CFI_type_other)};
|
|
|
|
mlir::Value typeCodeVal = this->genConstantOffset(
|
|
|
|
loc, rewriter,
|
|
|
|
fir::getTypeCode(boxEleTy, this->lowerTy().getKindMap()));
|
2024-04-28 22:01:42 +02:00
|
|
|
if (fir::isa_integer(boxEleTy) ||
|
|
|
|
mlir::dyn_cast<fir::LogicalType>(boxEleTy) || fir::isa_real(boxEleTy) ||
|
|
|
|
fir::isa_complex(boxEleTy))
|
2023-04-14 11:54:07 -07:00
|
|
|
return {genTypeStrideInBytes(loc, i64Ty, rewriter,
|
|
|
|
this->convertType(boxEleTy)),
|
|
|
|
typeCodeVal};
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto charTy = mlir::dyn_cast<fir::CharacterType>(boxEleTy))
|
2023-06-29 18:38:18 +02:00
|
|
|
return {getCharacterByteSize(loc, rewriter, charTy, lenParams),
|
|
|
|
typeCodeVal};
|
2021-11-18 11:05:45 +01:00
|
|
|
if (fir::isa_ref_type(boxEleTy)) {
|
2023-10-25 09:42:28 +02:00
|
|
|
auto ptrTy = ::getLlvmPtrType(rewriter.getContext());
|
2023-04-14 11:54:07 -07:00
|
|
|
return {genTypeStrideInBytes(loc, i64Ty, rewriter, ptrTy), typeCodeVal};
|
2021-11-18 11:05:45 +01:00
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::RecordType>(boxEleTy))
|
2023-04-14 11:54:07 -07:00
|
|
|
return {genTypeStrideInBytes(loc, i64Ty, rewriter,
|
|
|
|
this->convertType(boxEleTy)),
|
|
|
|
typeCodeVal};
|
2021-11-18 11:05:45 +01:00
|
|
|
fir::emitFatalError(loc, "unhandled type in fir.box code generation");
|
|
|
|
}
|
|
|
|
|
|
|
|
/// Basic pattern to write a field in the descriptor
|
|
|
|
mlir::Value insertField(mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Location loc, mlir::Value dest,
|
2022-08-09 22:07:35 -04:00
|
|
|
llvm::ArrayRef<std::int64_t> fldIndexes,
|
2022-04-26 13:44:34 -07:00
|
|
|
mlir::Value value, bool bitcast = false) const {
|
2021-11-18 11:05:45 +01:00
|
|
|
auto boxTy = dest.getType();
|
|
|
|
auto fldTy = this->getBoxEleTy(boxTy, fldIndexes);
|
2023-10-25 09:42:28 +02:00
|
|
|
if (!bitcast)
|
2021-11-18 11:05:45 +01:00
|
|
|
value = this->integerCast(loc, rewriter, fldTy, value);
|
2023-10-25 09:42:28 +02:00
|
|
|
// bitcast are no-ops with LLVM opaque pointers.
|
2022-08-09 22:07:35 -04:00
|
|
|
return rewriter.create<mlir::LLVM::InsertValueOp>(loc, dest, value,
|
|
|
|
fldIndexes);
|
2021-11-18 11:05:45 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
inline mlir::Value
|
|
|
|
insertBaseAddress(mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Location loc, mlir::Value dest,
|
|
|
|
mlir::Value base) const {
|
2021-12-03 11:44:47 +01:00
|
|
|
return insertField(rewriter, loc, dest, {kAddrPosInBox}, base,
|
|
|
|
/*bitCast=*/true);
|
|
|
|
}
|
|
|
|
|
|
|
|
inline mlir::Value insertLowerBound(mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Location loc, mlir::Value dest,
|
|
|
|
unsigned dim, mlir::Value lb) const {
|
|
|
|
return insertField(rewriter, loc, dest,
|
|
|
|
{kDimsPosInBox, dim, kDimLowerBoundPos}, lb);
|
|
|
|
}
|
|
|
|
|
|
|
|
inline mlir::Value insertExtent(mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Location loc, mlir::Value dest,
|
|
|
|
unsigned dim, mlir::Value extent) const {
|
|
|
|
return insertField(rewriter, loc, dest, {kDimsPosInBox, dim, kDimExtentPos},
|
|
|
|
extent);
|
|
|
|
}
|
|
|
|
|
|
|
|
inline mlir::Value insertStride(mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Location loc, mlir::Value dest,
|
|
|
|
unsigned dim, mlir::Value stride) const {
|
|
|
|
return insertField(rewriter, loc, dest, {kDimsPosInBox, dim, kDimStridePos},
|
|
|
|
stride);
|
2021-11-18 11:05:45 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Get the address of the type descriptor global variable that was created by
|
|
|
|
/// lowering for derived type \p recType.
|
2024-12-19 19:07:00 -08:00
|
|
|
template <typename ModOpTy>
|
|
|
|
mlir::Value
|
|
|
|
getTypeDescriptor(ModOpTy mod, mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Location loc, fir::RecordType recType) const {
|
2022-03-03 10:07:34 +01:00
|
|
|
std::string name =
|
2024-08-21 13:37:03 -07:00
|
|
|
this->options.typeDescriptorsRenamedForAssembly
|
|
|
|
? fir::NameUniquer::getTypeDescriptorAssemblyName(recType.getName())
|
|
|
|
: fir::NameUniquer::getTypeDescriptorName(recType.getName());
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmPtrTy = ::getLlvmPtrType(mod.getContext());
|
2022-11-24 20:33:15 +01:00
|
|
|
if (auto global = mod.template lookupSymbol<fir::GlobalOp>(name)) {
|
2023-10-25 09:42:28 +02:00
|
|
|
return rewriter.create<mlir::LLVM::AddressOfOp>(loc, llvmPtrTy,
|
2021-12-11 13:27:11 -08:00
|
|
|
global.getSymName());
|
2021-11-18 11:05:45 +01:00
|
|
|
}
|
2022-11-24 20:33:15 +01:00
|
|
|
if (auto global = mod.template lookupSymbol<mlir::LLVM::GlobalOp>(name)) {
|
2021-11-18 11:05:45 +01:00
|
|
|
// The global may have already been translated to LLVM.
|
2023-10-25 09:42:28 +02:00
|
|
|
return rewriter.create<mlir::LLVM::AddressOfOp>(loc, llvmPtrTy,
|
2021-12-11 13:27:11 -08:00
|
|
|
global.getSymName());
|
2021-11-18 11:05:45 +01:00
|
|
|
}
|
2022-03-03 10:07:34 +01:00
|
|
|
// Type info derived types do not have type descriptors since they are the
|
|
|
|
// types defining type descriptors.
|
|
|
|
if (!this->options.ignoreMissingTypeDescriptors &&
|
|
|
|
!fir::NameUniquer::belongsToModule(
|
|
|
|
name, Fortran::semantics::typeInfoBuiltinModule))
|
|
|
|
fir::emitFatalError(
|
|
|
|
loc, "runtime derived type info descriptor was not generated");
|
2023-10-25 09:42:28 +02:00
|
|
|
return rewriter.create<mlir::LLVM::ZeroOp>(loc, llvmPtrTy);
|
2021-11-18 11:05:45 +01:00
|
|
|
}
|
|
|
|
|
2024-12-19 19:07:00 -08:00
|
|
|
template <typename ModOpTy>
|
|
|
|
mlir::Value populateDescriptor(mlir::Location loc, ModOpTy mod,
|
2022-11-24 20:33:15 +01:00
|
|
|
fir::BaseBoxType boxTy, mlir::Type inputType,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
unsigned rank, mlir::Value eleSize,
|
2024-08-01 12:49:17 -07:00
|
|
|
mlir::Value cfiTy, mlir::Value typeDesc,
|
2024-08-14 11:23:56 -07:00
|
|
|
int allocatorIdx = kDefaultAllocator,
|
|
|
|
mlir::Value extraField = {}) const {
|
2023-10-25 09:42:28 +02:00
|
|
|
auto llvmBoxTy = this->lowerTy().convertBoxTypeAsStruct(boxTy, rank);
|
2022-11-24 20:33:15 +01:00
|
|
|
bool isUnlimitedPolymorphic = fir::isUnlimitedPolymorphicType(boxTy);
|
2023-01-24 14:46:11 +01:00
|
|
|
bool useInputType = fir::isPolymorphicType(boxTy) || isUnlimitedPolymorphic;
|
2021-11-18 11:05:45 +01:00
|
|
|
mlir::Value descriptor =
|
|
|
|
rewriter.create<mlir::LLVM::UndefOp>(loc, llvmBoxTy);
|
|
|
|
descriptor =
|
|
|
|
insertField(rewriter, loc, descriptor, {kElemLenPosInBox}, eleSize);
|
|
|
|
descriptor = insertField(rewriter, loc, descriptor, {kVersionPosInBox},
|
|
|
|
this->genI32Constant(loc, rewriter, CFI_VERSION));
|
|
|
|
descriptor = insertField(rewriter, loc, descriptor, {kRankPosInBox},
|
|
|
|
this->genI32Constant(loc, rewriter, rank));
|
|
|
|
descriptor = insertField(rewriter, loc, descriptor, {kTypePosInBox}, cfiTy);
|
|
|
|
descriptor =
|
|
|
|
insertField(rewriter, loc, descriptor, {kAttributePosInBox},
|
|
|
|
this->genI32Constant(loc, rewriter, getCFIAttr(boxTy)));
|
2024-08-01 09:39:53 -07:00
|
|
|
|
2023-03-07 16:09:23 -08:00
|
|
|
const bool hasAddendum = fir::boxHasAddendum(boxTy);
|
2024-08-01 12:49:17 -07:00
|
|
|
|
2024-08-14 11:23:56 -07:00
|
|
|
if (extraField) {
|
|
|
|
// Make sure to set the addendum presence flag according to the
|
|
|
|
// destination box.
|
|
|
|
if (hasAddendum) {
|
|
|
|
auto maskAttr = mlir::IntegerAttr::get(
|
|
|
|
rewriter.getIntegerType(8, /*isSigned=*/false),
|
|
|
|
llvm::APInt(8, (uint64_t)_CFI_ADDENDUM_FLAG, /*isSigned=*/false));
|
|
|
|
mlir::LLVM::ConstantOp mask = rewriter.create<mlir::LLVM::ConstantOp>(
|
|
|
|
loc, rewriter.getI8Type(), maskAttr);
|
|
|
|
extraField = rewriter.create<mlir::LLVM::OrOp>(loc, extraField, mask);
|
|
|
|
} else {
|
|
|
|
auto maskAttr = mlir::IntegerAttr::get(
|
|
|
|
rewriter.getIntegerType(8, /*isSigned=*/false),
|
2024-09-05 15:17:25 +02:00
|
|
|
llvm::APInt(8, (uint64_t)~_CFI_ADDENDUM_FLAG, /*isSigned=*/true));
|
2024-08-14 11:23:56 -07:00
|
|
|
mlir::LLVM::ConstantOp mask = rewriter.create<mlir::LLVM::ConstantOp>(
|
|
|
|
loc, rewriter.getI8Type(), maskAttr);
|
|
|
|
extraField = rewriter.create<mlir::LLVM::AndOp>(loc, extraField, mask);
|
|
|
|
}
|
|
|
|
// Extra field value is provided so just use it.
|
|
|
|
descriptor =
|
|
|
|
insertField(rewriter, loc, descriptor, {kExtraPosInBox}, extraField);
|
|
|
|
} else {
|
|
|
|
// Compute the value of the extra field based on allocator_idx and
|
2024-12-06 15:29:00 +01:00
|
|
|
// addendum present.
|
|
|
|
unsigned extra = allocatorIdx << _CFI_ALLOCATOR_IDX_SHIFT;
|
2024-08-14 11:23:56 -07:00
|
|
|
if (hasAddendum)
|
2024-12-06 15:29:00 +01:00
|
|
|
extra |= _CFI_ADDENDUM_FLAG;
|
|
|
|
descriptor = insertField(rewriter, loc, descriptor, {kExtraPosInBox},
|
|
|
|
this->genI32Constant(loc, rewriter, extra));
|
2024-08-14 11:23:56 -07:00
|
|
|
}
|
2021-11-18 11:05:45 +01:00
|
|
|
|
|
|
|
if (hasAddendum) {
|
2022-10-24 20:42:31 +02:00
|
|
|
unsigned typeDescFieldId = getTypeDescFieldId(boxTy);
|
2022-11-24 20:33:15 +01:00
|
|
|
if (!typeDesc) {
|
2023-01-24 14:46:11 +01:00
|
|
|
if (useInputType) {
|
2022-11-24 20:33:15 +01:00
|
|
|
mlir::Type innerType = fir::unwrapInnerType(inputType);
|
2024-04-28 22:01:42 +02:00
|
|
|
if (innerType && mlir::isa<fir::RecordType>(innerType)) {
|
|
|
|
auto recTy = mlir::dyn_cast<fir::RecordType>(innerType);
|
2022-11-24 20:33:15 +01:00
|
|
|
typeDesc = getTypeDescriptor(mod, rewriter, loc, recTy);
|
|
|
|
} else {
|
|
|
|
// Unlimited polymorphic type descriptor with no record type. Set
|
|
|
|
// type descriptor address to a clean state.
|
2023-09-25 11:11:52 +02:00
|
|
|
typeDesc = rewriter.create<mlir::LLVM::ZeroOp>(
|
2023-10-25 09:42:28 +02:00
|
|
|
loc, ::getLlvmPtrType(mod.getContext()));
|
2022-11-24 20:33:15 +01:00
|
|
|
}
|
|
|
|
} else {
|
2023-03-07 16:09:23 -08:00
|
|
|
typeDesc = getTypeDescriptor(mod, rewriter, loc,
|
|
|
|
fir::unwrapIfDerived(boxTy));
|
2022-11-24 20:33:15 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (typeDesc)
|
|
|
|
descriptor =
|
|
|
|
insertField(rewriter, loc, descriptor, {typeDescFieldId}, typeDesc,
|
|
|
|
/*bitCast=*/true);
|
2024-02-16 08:51:03 +01:00
|
|
|
// Always initialize the length parameter field to zero to avoid issues
|
|
|
|
// with uninitialized values in Fortran code trying to compare physical
|
|
|
|
// representation of derived types with pointer/allocatable components.
|
|
|
|
// This has been seen in hashing algorithms using TRANSFER.
|
|
|
|
mlir::Value zero =
|
|
|
|
genConstantIndex(loc, rewriter.getI64Type(), rewriter, 0);
|
|
|
|
descriptor = insertField(rewriter, loc, descriptor,
|
|
|
|
{getLenParamFieldId(boxTy), 0}, zero);
|
2022-11-24 20:33:15 +01:00
|
|
|
}
|
|
|
|
return descriptor;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Template used for fir::EmboxOp and fir::cg::XEmboxOp
|
|
|
|
template <typename BOX>
|
|
|
|
std::tuple<fir::BaseBoxType, mlir::Value, mlir::Value>
|
|
|
|
consDescriptorPrefix(BOX box, mlir::Type inputType,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter, unsigned rank,
|
2023-04-17 17:06:14 -07:00
|
|
|
[[maybe_unused]] mlir::ValueRange substrParams,
|
2023-01-12 17:59:18 +01:00
|
|
|
mlir::ValueRange lenParams, mlir::Value sourceBox = {},
|
|
|
|
mlir::Type sourceBoxType = {}) const {
|
2022-11-24 20:33:15 +01:00
|
|
|
auto loc = box.getLoc();
|
2024-04-28 22:01:42 +02:00
|
|
|
auto boxTy = mlir::dyn_cast<fir::BaseBoxType>(box.getType());
|
2022-12-13 09:44:01 +01:00
|
|
|
bool useInputType = fir::isPolymorphicType(boxTy) &&
|
|
|
|
!fir::isUnlimitedPolymorphicType(inputType);
|
2022-11-24 20:33:15 +01:00
|
|
|
llvm::SmallVector<mlir::Value> typeparams = lenParams;
|
|
|
|
if constexpr (!std::is_same_v<BOX, fir::EmboxOp>) {
|
|
|
|
if (!box.getSubstr().empty() && fir::hasDynamicSize(boxTy.getEleTy()))
|
2023-04-17 17:06:14 -07:00
|
|
|
typeparams.push_back(substrParams[1]);
|
2022-11-24 20:33:15 +01:00
|
|
|
}
|
|
|
|
|
2024-08-01 12:49:17 -07:00
|
|
|
int allocatorIdx = 0;
|
|
|
|
if constexpr (std::is_same_v<BOX, fir::EmboxOp> ||
|
|
|
|
std::is_same_v<BOX, fir::cg::XEmboxOp>) {
|
|
|
|
if (box.getAllocatorIdx())
|
|
|
|
allocatorIdx = *box.getAllocatorIdx();
|
|
|
|
}
|
|
|
|
|
2022-11-24 20:33:15 +01:00
|
|
|
// Write each of the fields with the appropriate values.
|
2022-12-13 09:44:01 +01:00
|
|
|
// When emboxing an element to a polymorphic descriptor, use the
|
|
|
|
// input type since the destination descriptor type has not the exact
|
|
|
|
// information.
|
2022-11-24 20:33:15 +01:00
|
|
|
auto [eleSize, cfiTy] = getSizeAndTypeCode(
|
|
|
|
loc, rewriter, useInputType ? inputType : boxTy.getEleTy(), typeparams);
|
2023-01-09 17:52:14 +01:00
|
|
|
|
2023-01-12 17:59:18 +01:00
|
|
|
mlir::Value typeDesc;
|
2024-08-14 11:23:56 -07:00
|
|
|
mlir::Value extraField;
|
2023-01-16 09:36:28 +01:00
|
|
|
// When emboxing to a polymorphic box, get the type descriptor, type code
|
|
|
|
// and element size from the source box if any.
|
|
|
|
if (fir::isPolymorphicType(boxTy) && sourceBox) {
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair sourceBoxTyPair = this->getBoxTypePair(sourceBoxType);
|
2023-01-12 17:59:18 +01:00
|
|
|
typeDesc =
|
2023-10-25 09:42:28 +02:00
|
|
|
this->loadTypeDescAddress(loc, sourceBoxTyPair, sourceBox, rewriter);
|
2023-01-12 17:59:18 +01:00
|
|
|
mlir::Type idxTy = this->lowerTy().indexType();
|
2023-10-25 09:42:28 +02:00
|
|
|
eleSize = this->getElementSizeFromBox(loc, idxTy, sourceBoxTyPair,
|
2023-01-17 09:08:43 -08:00
|
|
|
sourceBox, rewriter);
|
2023-10-25 09:42:28 +02:00
|
|
|
cfiTy = this->getValueFromBox(loc, sourceBoxTyPair, sourceBox,
|
2023-01-17 09:08:43 -08:00
|
|
|
cfiTy.getType(), rewriter, kTypePosInBox);
|
2024-08-14 11:23:56 -07:00
|
|
|
extraField =
|
|
|
|
this->getExtraFromBox(loc, sourceBoxTyPair, sourceBox, rewriter);
|
2023-01-09 17:52:14 +01:00
|
|
|
}
|
2024-12-19 19:07:00 -08:00
|
|
|
|
|
|
|
mlir::Value descriptor;
|
|
|
|
if (auto gpuMod = box->template getParentOfType<mlir::gpu::GPUModuleOp>())
|
|
|
|
descriptor = populateDescriptor(loc, gpuMod, boxTy, inputType, rewriter,
|
|
|
|
rank, eleSize, cfiTy, typeDesc,
|
|
|
|
allocatorIdx, extraField);
|
|
|
|
else if (auto mod = box->template getParentOfType<mlir::ModuleOp>())
|
|
|
|
descriptor = populateDescriptor(loc, mod, boxTy, inputType, rewriter,
|
|
|
|
rank, eleSize, cfiTy, typeDesc,
|
|
|
|
allocatorIdx, extraField);
|
2022-11-24 20:33:15 +01:00
|
|
|
|
|
|
|
return {boxTy, descriptor, eleSize};
|
|
|
|
}
|
|
|
|
|
|
|
|
std::tuple<fir::BaseBoxType, mlir::Value, mlir::Value>
|
|
|
|
consDescriptorPrefix(fir::cg::XReboxOp box, mlir::Value loweredBox,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter, unsigned rank,
|
2023-04-17 17:06:14 -07:00
|
|
|
mlir::ValueRange substrParams,
|
2022-11-24 20:33:15 +01:00
|
|
|
mlir::ValueRange lenParams,
|
|
|
|
mlir::Value typeDesc = {}) const {
|
|
|
|
auto loc = box.getLoc();
|
2024-04-28 22:01:42 +02:00
|
|
|
auto boxTy = mlir::dyn_cast<fir::BaseBoxType>(box.getType());
|
|
|
|
auto inputBoxTy = mlir::dyn_cast<fir::BaseBoxType>(box.getBox().getType());
|
2023-10-25 09:42:28 +02:00
|
|
|
auto inputBoxTyPair = this->getBoxTypePair(inputBoxTy);
|
2022-11-24 20:33:15 +01:00
|
|
|
llvm::SmallVector<mlir::Value> typeparams = lenParams;
|
|
|
|
if (!box.getSubstr().empty() && fir::hasDynamicSize(boxTy.getEleTy()))
|
2023-04-17 17:06:14 -07:00
|
|
|
typeparams.push_back(substrParams[1]);
|
2022-11-24 20:33:15 +01:00
|
|
|
|
|
|
|
auto [eleSize, cfiTy] =
|
|
|
|
getSizeAndTypeCode(loc, rewriter, boxTy.getEleTy(), typeparams);
|
|
|
|
|
2023-01-23 15:41:23 +01:00
|
|
|
// Reboxing to a polymorphic entity. eleSize and type code need to
|
2023-01-24 14:34:16 +01:00
|
|
|
// be retrieved from the initial box and propagated to the new box.
|
2023-01-23 15:41:23 +01:00
|
|
|
// If the initial box has an addendum, the type desc must be propagated as
|
|
|
|
// well.
|
|
|
|
if (fir::isPolymorphicType(boxTy)) {
|
2022-11-24 20:33:15 +01:00
|
|
|
mlir::Type idxTy = this->lowerTy().indexType();
|
2023-10-25 09:42:28 +02:00
|
|
|
eleSize = this->getElementSizeFromBox(loc, idxTy, inputBoxTyPair,
|
|
|
|
loweredBox, rewriter);
|
|
|
|
cfiTy = this->getValueFromBox(loc, inputBoxTyPair, loweredBox,
|
|
|
|
cfiTy.getType(), rewriter, kTypePosInBox);
|
2023-01-23 15:41:23 +01:00
|
|
|
// TODO: For initial box that are unlimited polymorphic entities, this
|
|
|
|
// code must be made conditional because unlimited polymorphic entities
|
|
|
|
// with intrinsic type spec does not have addendum.
|
2023-03-07 16:09:23 -08:00
|
|
|
if (fir::boxHasAddendum(inputBoxTy))
|
2023-10-25 09:42:28 +02:00
|
|
|
typeDesc = this->loadTypeDescAddress(loc, inputBoxTyPair, loweredBox,
|
|
|
|
rewriter);
|
2021-11-18 11:05:45 +01:00
|
|
|
}
|
|
|
|
|
2024-08-14 11:23:56 -07:00
|
|
|
mlir::Value extraField =
|
|
|
|
this->getExtraFromBox(loc, inputBoxTyPair, loweredBox, rewriter);
|
|
|
|
|
2024-12-19 19:07:00 -08:00
|
|
|
mlir::Value descriptor;
|
|
|
|
if (auto gpuMod = box->template getParentOfType<mlir::gpu::GPUModuleOp>())
|
|
|
|
descriptor =
|
|
|
|
populateDescriptor(loc, gpuMod, boxTy, box.getBox().getType(),
|
|
|
|
rewriter, rank, eleSize, cfiTy, typeDesc,
|
|
|
|
/*allocatorIdx=*/kDefaultAllocator, extraField);
|
|
|
|
else if (auto mod = box->template getParentOfType<mlir::ModuleOp>())
|
|
|
|
descriptor =
|
|
|
|
populateDescriptor(loc, mod, boxTy, box.getBox().getType(), rewriter,
|
|
|
|
rank, eleSize, cfiTy, typeDesc,
|
|
|
|
/*allocatorIdx=*/kDefaultAllocator, extraField);
|
2022-11-24 20:33:15 +01:00
|
|
|
|
2021-11-18 11:05:45 +01:00
|
|
|
return {boxTy, descriptor, eleSize};
|
|
|
|
}
|
|
|
|
|
2022-07-12 09:26:16 +02:00
|
|
|
// Compute the base address of a fir.box given the indices from the slice.
|
|
|
|
// The indices from the "outer" dimensions (every dimension after the first
|
2023-10-25 09:42:28 +02:00
|
|
|
// one (included) that is not a compile time constant) must have been
|
2022-07-12 09:26:16 +02:00
|
|
|
// multiplied with the related extents and added together into \p outerOffset.
|
|
|
|
mlir::Value
|
|
|
|
genBoxOffsetGep(mlir::ConversionPatternRewriter &rewriter, mlir::Location loc,
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Value base, mlir::Type llvmBaseObjectType,
|
|
|
|
mlir::Value outerOffset, mlir::ValueRange cstInteriorIndices,
|
2022-07-12 09:26:16 +02:00
|
|
|
mlir::ValueRange componentIndices,
|
2022-12-14 11:39:19 +01:00
|
|
|
std::optional<mlir::Value> substringOffset) const {
|
2022-07-29 01:00:22 +02:00
|
|
|
llvm::SmallVector<mlir::LLVM::GEPArg> gepArgs{outerOffset};
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type resultTy = llvmBaseObjectType;
|
2022-07-12 09:26:16 +02:00
|
|
|
// Fortran is column major, llvm GEP is row major: reverse the indices here.
|
|
|
|
for (mlir::Value interiorIndex : llvm::reverse(cstInteriorIndices)) {
|
2024-04-28 22:01:42 +02:00
|
|
|
auto arrayTy = mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(resultTy);
|
2022-07-12 09:26:16 +02:00
|
|
|
if (!arrayTy)
|
|
|
|
fir::emitFatalError(
|
|
|
|
loc,
|
|
|
|
"corrupted GEP generated being generated in fir.embox/fir.rebox");
|
|
|
|
resultTy = arrayTy.getElementType();
|
|
|
|
gepArgs.push_back(interiorIndex);
|
|
|
|
}
|
2023-06-29 14:46:58 +00:00
|
|
|
llvm::SmallVector<mlir::Value> gepIndices =
|
|
|
|
convertSubcomponentIndices(loc, resultTy, componentIndices, &resultTy);
|
|
|
|
gepArgs.append(gepIndices.begin(), gepIndices.end());
|
2022-07-12 09:26:16 +02:00
|
|
|
if (substringOffset) {
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto arrayTy = mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(resultTy)) {
|
2022-07-12 09:26:16 +02:00
|
|
|
gepArgs.push_back(*substringOffset);
|
|
|
|
resultTy = arrayTy.getElementType();
|
|
|
|
} else {
|
|
|
|
// If the CHARACTER length is dynamic, the whole base type should have
|
|
|
|
// degenerated to an llvm.ptr<i[width]>, and there should not be any
|
|
|
|
// cstInteriorIndices/componentIndices. The substring offset can be
|
|
|
|
// added to the outterOffset since it applies on the same LLVM type.
|
|
|
|
if (gepArgs.size() != 1)
|
|
|
|
fir::emitFatalError(loc,
|
|
|
|
"corrupted substring GEP in fir.embox/fir.rebox");
|
2024-12-22 13:30:16 -08:00
|
|
|
mlir::Type outterOffsetTy =
|
|
|
|
llvm::cast<mlir::Value>(gepArgs[0]).getType();
|
2022-07-12 09:26:16 +02:00
|
|
|
mlir::Value cast =
|
|
|
|
this->integerCast(loc, rewriter, outterOffsetTy, *substringOffset);
|
|
|
|
|
2022-07-29 01:00:22 +02:00
|
|
|
gepArgs[0] = rewriter.create<mlir::LLVM::AddOp>(
|
2024-12-22 13:30:16 -08:00
|
|
|
loc, outterOffsetTy, llvm::cast<mlir::Value>(gepArgs[0]), cast);
|
2022-07-12 09:26:16 +02:00
|
|
|
}
|
2021-12-03 11:44:47 +01:00
|
|
|
}
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmPtrTy = ::getLlvmPtrType(resultTy.getContext());
|
|
|
|
return rewriter.create<mlir::LLVM::GEPOp>(
|
|
|
|
loc, llvmPtrTy, llvmBaseObjectType, base, gepArgs);
|
2022-07-12 09:26:16 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
template <typename BOX>
|
|
|
|
void
|
|
|
|
getSubcomponentIndices(BOX xbox, mlir::Value memref,
|
|
|
|
mlir::ValueRange operands,
|
|
|
|
mlir::SmallVectorImpl<mlir::Value> &indices) const {
|
|
|
|
// For each field in the path add the offset to base via the args list.
|
|
|
|
// In the most general case, some offsets must be computed since
|
|
|
|
// they are not be known until runtime.
|
|
|
|
if (fir::hasDynamicSize(fir::unwrapSequenceType(
|
|
|
|
fir::unwrapPassByRefType(memref.getType()))))
|
|
|
|
TODO(xbox.getLoc(),
|
|
|
|
"fir.embox codegen dynamic size component in derived type");
|
2024-07-25 18:02:03 +02:00
|
|
|
indices.append(operands.begin() + xbox.getSubcomponentOperandIndex(),
|
|
|
|
operands.begin() + xbox.getSubcomponentOperandIndex() +
|
2022-10-03 11:02:23 +02:00
|
|
|
xbox.getSubcomponent().size());
|
2021-12-03 11:44:47 +01:00
|
|
|
}
|
|
|
|
|
2023-01-10 09:01:38 +01:00
|
|
|
static bool isInGlobalOp(mlir::ConversionPatternRewriter &rewriter) {
|
|
|
|
auto *thisBlock = rewriter.getInsertionBlock();
|
|
|
|
return thisBlock &&
|
|
|
|
mlir::isa<mlir::LLVM::GlobalOp>(thisBlock->getParentOp());
|
|
|
|
}
|
|
|
|
|
2021-11-18 11:05:45 +01:00
|
|
|
/// If the embox is not in a globalOp body, allocate storage for the box;
|
|
|
|
/// store the value inside and return the generated alloca. Return the input
|
|
|
|
/// value otherwise.
|
|
|
|
mlir::Value
|
|
|
|
placeInMemoryIfNotGlobalInit(mlir::ConversionPatternRewriter &rewriter,
|
2023-01-17 09:08:43 -08:00
|
|
|
mlir::Location loc, mlir::Type boxTy,
|
2024-12-18 18:20:45 -08:00
|
|
|
mlir::Value boxValue,
|
|
|
|
bool needDeviceAllocation = false) const {
|
2023-01-10 09:01:38 +01:00
|
|
|
if (isInGlobalOp(rewriter))
|
2021-11-18 11:05:45 +01:00
|
|
|
return boxValue;
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmBoxTy = boxValue.getType();
|
2024-12-18 18:20:45 -08:00
|
|
|
mlir::Value storage;
|
|
|
|
if (needDeviceAllocation) {
|
|
|
|
auto mod = boxValue.getDefiningOp()->getParentOfType<mlir::ModuleOp>();
|
|
|
|
auto baseBoxTy = mlir::dyn_cast<fir::BaseBoxType>(boxTy);
|
|
|
|
storage =
|
|
|
|
genCUFAllocDescriptor(loc, rewriter, mod, baseBoxTy, this->lowerTy());
|
|
|
|
} else {
|
|
|
|
storage = this->genAllocaAndAddrCastWithType(loc, llvmBoxTy, defaultAlign,
|
|
|
|
rewriter);
|
|
|
|
}
|
|
|
|
auto storeOp = rewriter.create<mlir::LLVM::StoreOp>(loc, boxValue, storage);
|
2023-01-17 09:08:43 -08:00
|
|
|
this->attachTBAATag(storeOp, boxTy, boxTy, nullptr);
|
2024-12-18 18:20:45 -08:00
|
|
|
return storage;
|
2021-11-18 11:05:45 +01:00
|
|
|
}
|
|
|
|
|
2025-01-28 09:38:33 -08:00
|
|
|
/// Compute the extent of a triplet slice (lb:ub:step).
|
|
|
|
mlir::Value computeTripletExtent(mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Location loc, mlir::Value lb,
|
|
|
|
mlir::Value ub, mlir::Value step,
|
|
|
|
mlir::Value zero, mlir::Type type) const {
|
|
|
|
lb = this->integerCast(loc, rewriter, type, lb);
|
|
|
|
ub = this->integerCast(loc, rewriter, type, ub);
|
|
|
|
step = this->integerCast(loc, rewriter, type, step);
|
|
|
|
zero = this->integerCast(loc, rewriter, type, zero);
|
|
|
|
mlir::Value extent = rewriter.create<mlir::LLVM::SubOp>(loc, type, ub, lb);
|
|
|
|
extent = rewriter.create<mlir::LLVM::AddOp>(loc, type, extent, step);
|
|
|
|
extent = rewriter.create<mlir::LLVM::SDivOp>(loc, type, extent, step);
|
|
|
|
// If the resulting extent is negative (`ub-lb` and `step` have different
|
|
|
|
// signs), zero must be returned instead.
|
|
|
|
auto cmp = rewriter.create<mlir::LLVM::ICmpOp>(
|
|
|
|
loc, mlir::LLVM::ICmpPredicate::sgt, extent, zero);
|
|
|
|
return rewriter.create<mlir::LLVM::SelectOp>(loc, cmp, extent, zero);
|
|
|
|
}
|
|
|
|
};
|
2021-12-03 11:44:47 +01:00
|
|
|
|
2021-11-18 11:05:45 +01:00
|
|
|
/// Create a generic box on a memory reference. This conversions lowers the
|
|
|
|
/// abstract box to the appropriate, initialized descriptor.
|
|
|
|
struct EmboxOpConversion : public EmboxCommonConversion<fir::EmboxOp> {
|
|
|
|
using EmboxCommonConversion::EmboxCommonConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-18 11:05:45 +01:00
|
|
|
matchAndRewrite(fir::EmboxOp embox, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-07-04 21:16:13 +02:00
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
2023-01-12 17:59:18 +01:00
|
|
|
mlir::Value sourceBox;
|
|
|
|
mlir::Type sourceBoxType;
|
|
|
|
if (embox.getSourceBox()) {
|
2024-07-25 18:02:03 +02:00
|
|
|
sourceBox = operands[embox.getSourceBoxOperandIndex()];
|
2023-01-12 17:59:18 +01:00
|
|
|
sourceBoxType = embox.getSourceBox().getType();
|
|
|
|
}
|
2021-11-18 11:05:45 +01:00
|
|
|
assert(!embox.getShape() && "There should be no dims on this embox op");
|
2022-07-04 21:16:13 +02:00
|
|
|
auto [boxTy, dest, eleSize] = consDescriptorPrefix(
|
2022-11-24 20:33:15 +01:00
|
|
|
embox, fir::unwrapRefType(embox.getMemref().getType()), rewriter,
|
2023-04-17 17:06:14 -07:00
|
|
|
/*rank=*/0, /*substrParams=*/mlir::ValueRange{},
|
|
|
|
adaptor.getTypeparams(), sourceBox, sourceBoxType);
|
2022-07-04 21:16:13 +02:00
|
|
|
dest = insertBaseAddress(rewriter, embox.getLoc(), dest, operands[0]);
|
2023-03-07 16:09:23 -08:00
|
|
|
if (fir::isDerivedTypeWithLenParams(boxTy)) {
|
2021-12-01 22:12:12 +00:00
|
|
|
TODO(embox.getLoc(),
|
|
|
|
"fir.embox codegen of derived with length parameters");
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2021-12-01 22:12:12 +00:00
|
|
|
}
|
2023-01-17 09:08:43 -08:00
|
|
|
auto result =
|
|
|
|
placeInMemoryIfNotGlobalInit(rewriter, embox.getLoc(), boxTy, dest);
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOp(embox, result);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-18 11:26:53 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2025-01-21 17:20:46 -08:00
|
|
|
static bool isDeviceAllocation(mlir::Value val, mlir::Value adaptorVal) {
|
2024-12-20 13:32:31 -08:00
|
|
|
if (auto loadOp = mlir::dyn_cast_or_null<fir::LoadOp>(val.getDefiningOp()))
|
2025-01-21 17:20:46 -08:00
|
|
|
return isDeviceAllocation(loadOp.getMemref(), {});
|
2024-12-23 09:52:59 -08:00
|
|
|
if (auto boxAddrOp =
|
|
|
|
mlir::dyn_cast_or_null<fir::BoxAddrOp>(val.getDefiningOp()))
|
2025-01-21 17:20:46 -08:00
|
|
|
return isDeviceAllocation(boxAddrOp.getVal(), {});
|
2024-12-18 18:20:45 -08:00
|
|
|
if (auto convertOp =
|
|
|
|
mlir::dyn_cast_or_null<fir::ConvertOp>(val.getDefiningOp()))
|
2025-01-21 17:20:46 -08:00
|
|
|
return isDeviceAllocation(convertOp.getValue(), {});
|
|
|
|
if (!val.getDefiningOp() && adaptorVal) {
|
|
|
|
if (auto blockArg = llvm::cast<mlir::BlockArgument>(adaptorVal)) {
|
|
|
|
if (blockArg.getOwner() && blockArg.getOwner()->getParentOp() &&
|
|
|
|
blockArg.getOwner()->isEntryBlock()) {
|
|
|
|
if (auto func = mlir::dyn_cast_or_null<mlir::FunctionOpInterface>(
|
|
|
|
*blockArg.getOwner()->getParentOp())) {
|
|
|
|
auto argAttrs = func.getArgAttrs(blockArg.getArgNumber());
|
|
|
|
for (auto attr : argAttrs) {
|
|
|
|
if (attr.getName().getValue().ends_with(cuf::getDataAttrName())) {
|
|
|
|
auto dataAttr =
|
|
|
|
mlir::dyn_cast<cuf::DataAttributeAttr>(attr.getValue());
|
|
|
|
if (dataAttr.getValue() != cuf::DataAttribute::Pinned &&
|
|
|
|
dataAttr.getValue() != cuf::DataAttribute::Unified)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2024-12-18 18:20:45 -08:00
|
|
|
if (auto callOp = mlir::dyn_cast_or_null<fir::CallOp>(val.getDefiningOp()))
|
|
|
|
if (callOp.getCallee() &&
|
2024-12-20 13:32:31 -08:00
|
|
|
(callOp.getCallee().value().getRootReference().getValue().starts_with(
|
|
|
|
RTNAME_STRING(CUFMemAlloc)) ||
|
|
|
|
callOp.getCallee().value().getRootReference().getValue().starts_with(
|
2024-12-20 13:57:47 -08:00
|
|
|
RTNAME_STRING(CUFAllocDescriptor))))
|
2024-12-18 18:20:45 -08:00
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-12-03 11:44:47 +01:00
|
|
|
/// Create a generic box on a memory reference.
|
|
|
|
struct XEmboxOpConversion : public EmboxCommonConversion<fir::cg::XEmboxOp> {
|
|
|
|
using EmboxCommonConversion::EmboxCommonConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-12-03 11:44:47 +01:00
|
|
|
matchAndRewrite(fir::cg::XEmboxOp xbox, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
2023-01-12 17:59:18 +01:00
|
|
|
mlir::Value sourceBox;
|
|
|
|
mlir::Type sourceBoxType;
|
|
|
|
if (xbox.getSourceBox()) {
|
2024-07-25 18:02:03 +02:00
|
|
|
sourceBox = operands[xbox.getSourceBoxOperandIndex()];
|
2023-01-12 17:59:18 +01:00
|
|
|
sourceBoxType = xbox.getSourceBox().getType();
|
|
|
|
}
|
2023-06-29 18:38:18 +02:00
|
|
|
auto [boxTy, dest, resultEleSize] = consDescriptorPrefix(
|
2022-11-24 20:33:15 +01:00
|
|
|
xbox, fir::unwrapRefType(xbox.getMemref().getType()), rewriter,
|
2023-04-17 17:06:14 -07:00
|
|
|
xbox.getOutRank(), adaptor.getSubstr(), adaptor.getLenParams(),
|
2023-01-12 17:59:18 +01:00
|
|
|
sourceBox, sourceBoxType);
|
2022-07-04 21:16:13 +02:00
|
|
|
// Generate the triples in the dims field of the descriptor
|
2021-12-03 11:44:47 +01:00
|
|
|
auto i64Ty = mlir::IntegerType::get(xbox.getContext(), 64);
|
2022-10-03 11:02:23 +02:00
|
|
|
assert(!xbox.getShape().empty() && "must have a shape");
|
2024-07-25 18:02:03 +02:00
|
|
|
unsigned shapeOffset = xbox.getShapeOperandIndex();
|
2022-10-03 11:02:23 +02:00
|
|
|
bool hasShift = !xbox.getShift().empty();
|
2024-07-25 18:02:03 +02:00
|
|
|
unsigned shiftOffset = xbox.getShiftOperandIndex();
|
2022-10-03 11:02:23 +02:00
|
|
|
bool hasSlice = !xbox.getSlice().empty();
|
2024-07-25 18:02:03 +02:00
|
|
|
unsigned sliceOffset = xbox.getSliceOperandIndex();
|
2021-12-03 11:44:47 +01:00
|
|
|
mlir::Location loc = xbox.getLoc();
|
|
|
|
mlir::Value zero = genConstantIndex(loc, i64Ty, rewriter, 0);
|
|
|
|
mlir::Value one = genConstantIndex(loc, i64Ty, rewriter, 1);
|
|
|
|
mlir::Value prevPtrOff = one;
|
|
|
|
mlir::Type eleTy = boxTy.getEleTy();
|
|
|
|
const unsigned rank = xbox.getRank();
|
2022-07-12 09:26:16 +02:00
|
|
|
llvm::SmallVector<mlir::Value> cstInteriorIndices;
|
2021-12-03 11:44:47 +01:00
|
|
|
unsigned constRows = 0;
|
|
|
|
mlir::Value ptrOffset = zero;
|
2022-10-03 11:02:23 +02:00
|
|
|
mlir::Type memEleTy = fir::dyn_cast_ptrEleTy(xbox.getMemref().getType());
|
2024-04-28 22:01:42 +02:00
|
|
|
assert(mlir::isa<fir::SequenceType>(memEleTy));
|
|
|
|
auto seqTy = mlir::cast<fir::SequenceType>(memEleTy);
|
2022-06-17 16:09:32 +02:00
|
|
|
mlir::Type seqEleTy = seqTy.getEleTy();
|
|
|
|
// Adjust the element scaling factor if the element is a dependent type.
|
|
|
|
if (fir::hasDynamicSize(seqEleTy)) {
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto charTy = mlir::dyn_cast<fir::CharacterType>(seqEleTy)) {
|
[flang] Fixed slice offset computation in XEmbox codegen.
For character type with unknown length we end up generating
a GEP with the base type `llvm.ptr<i[width]>`. The GEP produces
the address of the first element of the slice, and it should be
using the offset computed in the number of characters, while we were
providing the offset in bytes.
Simple reproducer fails with and w/o HLFIR:
```
program test
integer,parameter :: ck = 4
character(:,ck),allocatable :: res(:,:)
allocate(character(3,ck) :: res(2,2))
res(1,1) = ck_'111'
res(1,2) = ck_'222'
res(2,1) = ck_'333'
res(2,2) = ck_'444'
call check(res)
contains
subroutine check(res)
character(:,ck),allocatable :: res(:,:)
print *, res(2,:)
end subroutine check
end program test
```
Reviewed By: clementval
Differential Revision: https://reviews.llvm.org/D156849
2023-08-02 09:43:19 -07:00
|
|
|
// The GEP pointer type decays to llvm.ptr<i[width]>.
|
|
|
|
// The scaling factor is the runtime value of the length.
|
|
|
|
assert(!adaptor.getLenParams().empty());
|
|
|
|
prevPtrOff = FIROpConversion::integerCast(
|
|
|
|
loc, rewriter, i64Ty, adaptor.getLenParams().back());
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (mlir::isa<fir::RecordType>(seqEleTy)) {
|
2022-06-17 16:09:32 +02:00
|
|
|
// prevPtrOff = ;
|
|
|
|
TODO(loc, "generate call to calculate size of PDT");
|
|
|
|
} else {
|
|
|
|
fir::emitFatalError(loc, "unexpected dynamic type");
|
2021-12-03 11:44:47 +01:00
|
|
|
}
|
2022-06-17 16:09:32 +02:00
|
|
|
} else {
|
|
|
|
constRows = seqTy.getConstantRows();
|
|
|
|
}
|
2021-12-03 11:44:47 +01:00
|
|
|
|
2022-10-03 11:02:23 +02:00
|
|
|
const auto hasSubcomp = !xbox.getSubcomponent().empty();
|
|
|
|
const bool hasSubstr = !xbox.getSubstr().empty();
|
2022-09-08 10:13:45 -07:00
|
|
|
// Initial element stride that will be use to compute the step in
|
2023-06-29 18:38:18 +02:00
|
|
|
// each dimension. Initially, this is the size of the input element.
|
|
|
|
// Note that when there are no components/substring, the resultEleSize
|
|
|
|
// that was previously computed matches the input element size.
|
|
|
|
mlir::Value prevDimByteStride = resultEleSize;
|
2021-12-03 11:44:47 +01:00
|
|
|
if (hasSubcomp) {
|
|
|
|
// We have a subcomponent. The step value needs to be the number of
|
|
|
|
// bytes per element (which is a derived type).
|
2022-09-08 10:13:45 -07:00
|
|
|
prevDimByteStride =
|
|
|
|
genTypeStrideInBytes(loc, i64Ty, rewriter, convertType(seqEleTy));
|
2022-06-17 16:09:32 +02:00
|
|
|
} else if (hasSubstr) {
|
|
|
|
// We have a substring. The step value needs to be the number of bytes
|
|
|
|
// per CHARACTER element.
|
2024-04-28 22:01:42 +02:00
|
|
|
auto charTy = mlir::cast<fir::CharacterType>(seqEleTy);
|
2022-06-17 16:09:32 +02:00
|
|
|
if (fir::hasDynamicSize(charTy)) {
|
[flang] Fixed slice offset computation in XEmbox codegen.
For character type with unknown length we end up generating
a GEP with the base type `llvm.ptr<i[width]>`. The GEP produces
the address of the first element of the slice, and it should be
using the offset computed in the number of characters, while we were
providing the offset in bytes.
Simple reproducer fails with and w/o HLFIR:
```
program test
integer,parameter :: ck = 4
character(:,ck),allocatable :: res(:,:)
allocate(character(3,ck) :: res(2,2))
res(1,1) = ck_'111'
res(1,2) = ck_'222'
res(2,1) = ck_'333'
res(2,2) = ck_'444'
call check(res)
contains
subroutine check(res)
character(:,ck),allocatable :: res(:,:)
print *, res(2,:)
end subroutine check
end program test
```
Reviewed By: clementval
Differential Revision: https://reviews.llvm.org/D156849
2023-08-02 09:43:19 -07:00
|
|
|
prevDimByteStride =
|
|
|
|
getCharacterByteSize(loc, rewriter, charTy, adaptor.getLenParams());
|
2022-06-17 16:09:32 +02:00
|
|
|
} else {
|
|
|
|
prevDimByteStride = genConstantIndex(
|
|
|
|
loc, i64Ty, rewriter,
|
|
|
|
charTy.getLen() * lowerTy().characterBitsize(charTy) / 8);
|
|
|
|
}
|
2021-12-03 11:44:47 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
// Process the array subspace arguments (shape, shift, etc.), if any,
|
|
|
|
// translating everything to values in the descriptor wherever the entity
|
|
|
|
// has a dynamic array dimension.
|
|
|
|
for (unsigned di = 0, descIdx = 0; di < rank; ++di) {
|
2025-01-28 09:38:33 -08:00
|
|
|
mlir::Value extent =
|
|
|
|
integerCast(loc, rewriter, i64Ty, operands[shapeOffset]);
|
2021-12-03 11:44:47 +01:00
|
|
|
mlir::Value outerExtent = extent;
|
|
|
|
bool skipNext = false;
|
|
|
|
if (hasSlice) {
|
2025-01-28 09:38:33 -08:00
|
|
|
mlir::Value off =
|
|
|
|
integerCast(loc, rewriter, i64Ty, operands[sliceOffset]);
|
2021-12-03 11:44:47 +01:00
|
|
|
mlir::Value adj = one;
|
|
|
|
if (hasShift)
|
2025-01-28 09:38:33 -08:00
|
|
|
adj = integerCast(loc, rewriter, i64Ty, operands[shiftOffset]);
|
2021-12-03 11:44:47 +01:00
|
|
|
auto ao = rewriter.create<mlir::LLVM::SubOp>(loc, i64Ty, off, adj);
|
|
|
|
if (constRows > 0) {
|
2022-07-12 09:26:16 +02:00
|
|
|
cstInteriorIndices.push_back(ao);
|
2021-12-03 11:44:47 +01:00
|
|
|
} else {
|
|
|
|
auto dimOff =
|
|
|
|
rewriter.create<mlir::LLVM::MulOp>(loc, i64Ty, ao, prevPtrOff);
|
|
|
|
ptrOffset =
|
|
|
|
rewriter.create<mlir::LLVM::AddOp>(loc, i64Ty, dimOff, ptrOffset);
|
|
|
|
}
|
|
|
|
if (mlir::isa_and_nonnull<fir::UndefOp>(
|
2022-10-03 11:02:23 +02:00
|
|
|
xbox.getSlice()[3 * di + 1].getDefiningOp())) {
|
2021-12-03 11:44:47 +01:00
|
|
|
// This dimension contains a scalar expression in the array slice op.
|
|
|
|
// The dimension is loop invariant, will be dropped, and will not
|
|
|
|
// appear in the descriptor.
|
|
|
|
skipNext = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!skipNext) {
|
2022-06-17 16:09:32 +02:00
|
|
|
// store extent
|
2022-03-25 09:02:48 +01:00
|
|
|
if (hasSlice)
|
|
|
|
extent = computeTripletExtent(rewriter, loc, operands[sliceOffset],
|
|
|
|
operands[sliceOffset + 1],
|
|
|
|
operands[sliceOffset + 2], zero, i64Ty);
|
2022-06-17 16:09:32 +02:00
|
|
|
// Lower bound is normalized to 0 for BIND(C) interoperability.
|
2021-12-03 11:44:47 +01:00
|
|
|
mlir::Value lb = zero;
|
2022-03-25 09:02:48 +01:00
|
|
|
const bool isaPointerOrAllocatable =
|
2024-04-28 22:01:42 +02:00
|
|
|
mlir::isa<fir::PointerType, fir::HeapType>(eleTy);
|
2022-03-25 09:02:48 +01:00
|
|
|
// Lower bound is defaults to 1 for POINTER, ALLOCATABLE, and
|
|
|
|
// denormalized descriptors.
|
2022-06-17 16:09:32 +02:00
|
|
|
if (isaPointerOrAllocatable || !normalizedLowerBound(xbox))
|
2021-12-03 11:44:47 +01:00
|
|
|
lb = one;
|
2022-06-17 16:09:32 +02:00
|
|
|
// If there is a shifted origin, and no fir.slice, and this is not
|
|
|
|
// a normalized descriptor then use the value from the shift op as
|
|
|
|
// the lower bound.
|
|
|
|
if (hasShift && !(hasSlice || hasSubcomp || hasSubstr) &&
|
|
|
|
(isaPointerOrAllocatable || !normalizedLowerBound(xbox))) {
|
2025-01-28 09:38:33 -08:00
|
|
|
lb = integerCast(loc, rewriter, i64Ty, operands[shiftOffset]);
|
2022-06-17 16:09:32 +02:00
|
|
|
auto extentIsEmpty = rewriter.create<mlir::LLVM::ICmpOp>(
|
|
|
|
loc, mlir::LLVM::ICmpPredicate::eq, extent, zero);
|
|
|
|
lb = rewriter.create<mlir::LLVM::SelectOp>(loc, extentIsEmpty, one,
|
|
|
|
lb);
|
2021-12-03 11:44:47 +01:00
|
|
|
}
|
|
|
|
dest = insertLowerBound(rewriter, loc, dest, descIdx, lb);
|
|
|
|
|
|
|
|
dest = insertExtent(rewriter, loc, dest, descIdx, extent);
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// store step (scaled by shaped extent)
|
2022-06-17 16:09:32 +02:00
|
|
|
mlir::Value step = prevDimByteStride;
|
2025-01-28 09:38:33 -08:00
|
|
|
if (hasSlice) {
|
|
|
|
mlir::Value sliceStep =
|
|
|
|
integerCast(loc, rewriter, i64Ty, operands[sliceOffset + 2]);
|
|
|
|
step =
|
|
|
|
rewriter.create<mlir::LLVM::MulOp>(loc, i64Ty, step, sliceStep);
|
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
dest = insertStride(rewriter, loc, dest, descIdx, step);
|
|
|
|
++descIdx;
|
|
|
|
}
|
|
|
|
|
|
|
|
// compute the stride and offset for the next natural dimension
|
2022-06-17 16:09:32 +02:00
|
|
|
prevDimByteStride = rewriter.create<mlir::LLVM::MulOp>(
|
|
|
|
loc, i64Ty, prevDimByteStride, outerExtent);
|
2022-03-02 11:22:07 +00:00
|
|
|
if (constRows == 0)
|
|
|
|
prevPtrOff = rewriter.create<mlir::LLVM::MulOp>(loc, i64Ty, prevPtrOff,
|
|
|
|
outerExtent);
|
2022-04-05 17:26:53 +02:00
|
|
|
else
|
|
|
|
--constRows;
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
// increment iterators
|
|
|
|
++shapeOffset;
|
|
|
|
if (hasShift)
|
|
|
|
++shiftOffset;
|
|
|
|
if (hasSlice)
|
|
|
|
sliceOffset += 3;
|
|
|
|
}
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Value base = adaptor.getMemref();
|
2022-06-17 16:09:32 +02:00
|
|
|
if (hasSlice || hasSubcomp || hasSubstr) {
|
2022-07-12 09:26:16 +02:00
|
|
|
// Shift the base address.
|
|
|
|
llvm::SmallVector<mlir::Value> fieldIndices;
|
2022-12-14 11:39:19 +01:00
|
|
|
std::optional<mlir::Value> substringOffset;
|
2022-07-12 09:26:16 +02:00
|
|
|
if (hasSubcomp)
|
2022-10-03 11:02:23 +02:00
|
|
|
getSubcomponentIndices(xbox, xbox.getMemref(), operands, fieldIndices);
|
2022-06-17 16:09:32 +02:00
|
|
|
if (hasSubstr)
|
2024-07-25 18:02:03 +02:00
|
|
|
substringOffset = operands[xbox.getSubstrOperandIndex()];
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmBaseType =
|
|
|
|
convertType(fir::unwrapRefType(xbox.getMemref().getType()));
|
|
|
|
base = genBoxOffsetGep(rewriter, loc, base, llvmBaseType, ptrOffset,
|
|
|
|
cstInteriorIndices, fieldIndices, substringOffset);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
dest = insertBaseAddress(rewriter, loc, dest, base);
|
2023-03-07 16:09:23 -08:00
|
|
|
if (fir::isDerivedTypeWithLenParams(boxTy))
|
2022-03-02 11:22:07 +00:00
|
|
|
TODO(loc, "fir.embox codegen of derived with length parameters");
|
2024-12-18 18:20:45 -08:00
|
|
|
mlir::Value result = placeInMemoryIfNotGlobalInit(
|
2025-01-21 17:20:46 -08:00
|
|
|
rewriter, loc, boxTy, dest,
|
|
|
|
isDeviceAllocation(xbox.getMemref(), adaptor.getMemref()));
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOp(xbox, result);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2022-03-25 09:02:48 +01:00
|
|
|
|
|
|
|
/// Return true if `xbox` has a normalized lower bounds attribute. A box value
|
|
|
|
/// that is neither a POINTER nor an ALLOCATABLE should be normalized to a
|
|
|
|
/// zero origin lower bound for interoperability with BIND(C).
|
|
|
|
inline static bool normalizedLowerBound(fir::cg::XEmboxOp xbox) {
|
|
|
|
return xbox->hasAttr(fir::getNormalizedLowerBoundAttrName());
|
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/// Create a new box given a box reference.
|
|
|
|
struct XReboxOpConversion : public EmboxCommonConversion<fir::cg::XReboxOp> {
|
|
|
|
using EmboxCommonConversion::EmboxCommonConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::cg::XReboxOp rebox, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Location loc = rebox.getLoc();
|
|
|
|
mlir::Type idxTy = lowerTy().indexType();
|
|
|
|
mlir::Value loweredBox = adaptor.getOperands()[0];
|
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
|
|
|
|
2023-01-10 09:01:38 +01:00
|
|
|
// Inside a fir.global, the input box was produced as an llvm.struct<>
|
|
|
|
// because objects cannot be handled in memory inside a fir.global body that
|
|
|
|
// must be constant foldable. However, the type translation are not
|
|
|
|
// contextual, so the fir.box<T> type of the operation that produced the
|
|
|
|
// fir.box was translated to an llvm.ptr<llvm.struct<>> and the MLIR pass
|
|
|
|
// manager inserted a builtin.unrealized_conversion_cast that was inserted
|
|
|
|
// and needs to be removed here.
|
|
|
|
if (isInGlobalOp(rewriter))
|
|
|
|
if (auto unrealizedCast =
|
|
|
|
loweredBox.getDefiningOp<mlir::UnrealizedConversionCastOp>())
|
|
|
|
loweredBox = unrealizedCast.getInputs()[0];
|
|
|
|
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair inputBoxTyPair = getBoxTypePair(rebox.getBox().getType());
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// Create new descriptor and fill its non-shape related data.
|
|
|
|
llvm::SmallVector<mlir::Value, 2> lenParams;
|
|
|
|
mlir::Type inputEleTy = getInputEleTy(rebox);
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto charTy = mlir::dyn_cast<fir::CharacterType>(inputEleTy)) {
|
2023-06-29 18:36:05 +02:00
|
|
|
if (charTy.hasConstantLen()) {
|
|
|
|
mlir::Value len =
|
|
|
|
genConstantIndex(loc, idxTy, rewriter, charTy.getLen());
|
|
|
|
lenParams.emplace_back(len);
|
|
|
|
} else {
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Value len = getElementSizeFromBox(loc, idxTy, inputBoxTyPair,
|
|
|
|
loweredBox, rewriter);
|
2023-06-29 18:36:05 +02:00
|
|
|
if (charTy.getFKind() != 1) {
|
|
|
|
assert(!isInGlobalOp(rewriter) &&
|
|
|
|
"character target in global op must have constant length");
|
|
|
|
mlir::Value width =
|
|
|
|
genConstantIndex(loc, idxTy, rewriter, charTy.getFKind());
|
|
|
|
len = rewriter.create<mlir::LLVM::SDivOp>(loc, idxTy, len, width);
|
|
|
|
}
|
|
|
|
lenParams.emplace_back(len);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (auto recTy = mlir::dyn_cast<fir::RecordType>(inputEleTy)) {
|
2022-03-02 11:22:07 +00:00
|
|
|
if (recTy.getNumLenParams() != 0)
|
|
|
|
TODO(loc, "reboxing descriptor of derived type with length parameters");
|
|
|
|
}
|
2022-10-24 20:42:31 +02:00
|
|
|
|
|
|
|
// Rebox on polymorphic entities needs to carry over the dynamic type.
|
|
|
|
mlir::Value typeDescAddr;
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::ClassType>(inputBoxTyPair.fir) &&
|
|
|
|
mlir::isa<fir::ClassType>(rebox.getType()))
|
2023-10-25 09:42:28 +02:00
|
|
|
typeDescAddr =
|
|
|
|
loadTypeDescAddress(loc, inputBoxTyPair, loweredBox, rewriter);
|
2022-10-24 20:42:31 +02:00
|
|
|
|
2022-11-24 20:33:15 +01:00
|
|
|
auto [boxTy, dest, eleSize] =
|
|
|
|
consDescriptorPrefix(rebox, loweredBox, rewriter, rebox.getOutRank(),
|
2023-04-17 17:06:14 -07:00
|
|
|
adaptor.getSubstr(), lenParams, typeDescAddr);
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
// Read input extents, strides, and base address
|
|
|
|
llvm::SmallVector<mlir::Value> inputExtents;
|
|
|
|
llvm::SmallVector<mlir::Value> inputStrides;
|
|
|
|
const unsigned inputRank = rebox.getRank();
|
2023-01-10 09:01:38 +01:00
|
|
|
for (unsigned dim = 0; dim < inputRank; ++dim) {
|
2022-04-26 13:44:34 -07:00
|
|
|
llvm::SmallVector<mlir::Value, 3> dimInfo =
|
2023-10-25 09:42:28 +02:00
|
|
|
getDimsFromBox(loc, {idxTy, idxTy, idxTy}, inputBoxTyPair, loweredBox,
|
|
|
|
dim, rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
inputExtents.emplace_back(dimInfo[1]);
|
|
|
|
inputStrides.emplace_back(dimInfo[2]);
|
|
|
|
}
|
|
|
|
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Value baseAddr =
|
|
|
|
getBaseAddrFromBox(loc, inputBoxTyPair, loweredBox, rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
|
2022-10-03 11:02:23 +02:00
|
|
|
if (!rebox.getSlice().empty() || !rebox.getSubcomponent().empty())
|
2025-01-22 10:04:39 -08:00
|
|
|
return sliceBox(rebox, adaptor, boxTy, dest, baseAddr, inputExtents,
|
|
|
|
inputStrides, operands, rewriter);
|
|
|
|
return reshapeBox(rebox, adaptor, boxTy, dest, baseAddr, inputExtents,
|
|
|
|
inputStrides, operands, rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
/// Write resulting shape and base address in descriptor, and replace rebox
|
|
|
|
/// op.
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2025-01-22 10:04:39 -08:00
|
|
|
finalizeRebox(fir::cg::XReboxOp rebox, OpAdaptor adaptor,
|
|
|
|
mlir::Type destBoxTy, mlir::Value dest, mlir::Value base,
|
|
|
|
mlir::ValueRange lbounds, mlir::ValueRange extents,
|
|
|
|
mlir::ValueRange strides,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const {
|
|
|
|
mlir::Location loc = rebox.getLoc();
|
2022-03-25 09:02:48 +01:00
|
|
|
mlir::Value zero =
|
|
|
|
genConstantIndex(loc, lowerTy().indexType(), rewriter, 0);
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value one = genConstantIndex(loc, lowerTy().indexType(), rewriter, 1);
|
|
|
|
for (auto iter : llvm::enumerate(llvm::zip(extents, strides))) {
|
2022-03-25 09:02:48 +01:00
|
|
|
mlir::Value extent = std::get<0>(iter.value());
|
2022-03-02 11:22:07 +00:00
|
|
|
unsigned dim = iter.index();
|
2022-03-25 09:02:48 +01:00
|
|
|
mlir::Value lb = one;
|
|
|
|
if (!lbounds.empty()) {
|
2025-03-11 02:01:57 +00:00
|
|
|
lb = integerCast(loc, rewriter, lowerTy().indexType(), lbounds[dim]);
|
2022-03-25 09:02:48 +01:00
|
|
|
auto extentIsEmpty = rewriter.create<mlir::LLVM::ICmpOp>(
|
|
|
|
loc, mlir::LLVM::ICmpPredicate::eq, extent, zero);
|
|
|
|
lb = rewriter.create<mlir::LLVM::SelectOp>(loc, extentIsEmpty, one, lb);
|
|
|
|
};
|
2022-03-02 11:22:07 +00:00
|
|
|
dest = insertLowerBound(rewriter, loc, dest, dim, lb);
|
2022-03-25 09:02:48 +01:00
|
|
|
dest = insertExtent(rewriter, loc, dest, dim, extent);
|
2022-03-02 11:22:07 +00:00
|
|
|
dest = insertStride(rewriter, loc, dest, dim, std::get<1>(iter.value()));
|
|
|
|
}
|
|
|
|
dest = insertBaseAddress(rewriter, loc, dest, base);
|
2025-01-21 17:20:46 -08:00
|
|
|
mlir::Value result = placeInMemoryIfNotGlobalInit(
|
|
|
|
rewriter, rebox.getLoc(), destBoxTy, dest,
|
2025-01-22 10:04:39 -08:00
|
|
|
isDeviceAllocation(rebox.getBox(), adaptor.getBox()));
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOp(rebox, result);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Apply slice given the base address, extents and strides of the input box.
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2025-01-22 10:04:39 -08:00
|
|
|
sliceBox(fir::cg::XReboxOp rebox, OpAdaptor adaptor, mlir::Type destBoxTy,
|
|
|
|
mlir::Value dest, mlir::Value base, mlir::ValueRange inputExtents,
|
2023-01-17 09:08:43 -08:00
|
|
|
mlir::ValueRange inputStrides, mlir::ValueRange operands,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const {
|
|
|
|
mlir::Location loc = rebox.getLoc();
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type byteTy = ::getI8Type(rebox.getContext());
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Type idxTy = lowerTy().indexType();
|
|
|
|
mlir::Value zero = genConstantIndex(loc, idxTy, rewriter, 0);
|
|
|
|
// Apply subcomponent and substring shift on base address.
|
2022-10-03 11:02:23 +02:00
|
|
|
if (!rebox.getSubcomponent().empty() || !rebox.getSubstr().empty()) {
|
2022-03-02 11:22:07 +00:00
|
|
|
// Cast to inputEleTy* so that a GEP can be used.
|
|
|
|
mlir::Type inputEleTy = getInputEleTy(rebox);
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmBaseObjectType = convertType(inputEleTy);
|
2022-07-12 09:26:16 +02:00
|
|
|
llvm::SmallVector<mlir::Value> fieldIndices;
|
2022-12-14 11:39:19 +01:00
|
|
|
std::optional<mlir::Value> substringOffset;
|
2022-10-03 11:02:23 +02:00
|
|
|
if (!rebox.getSubcomponent().empty())
|
|
|
|
getSubcomponentIndices(rebox, rebox.getBox(), operands, fieldIndices);
|
|
|
|
if (!rebox.getSubstr().empty())
|
2024-07-25 18:02:03 +02:00
|
|
|
substringOffset = operands[rebox.getSubstrOperandIndex()];
|
2023-10-25 09:42:28 +02:00
|
|
|
base = genBoxOffsetGep(rewriter, loc, base, llvmBaseObjectType, zero,
|
2022-12-03 12:14:21 -08:00
|
|
|
/*cstInteriorIndices=*/std::nullopt, fieldIndices,
|
2022-07-12 09:26:16 +02:00
|
|
|
substringOffset);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
2022-10-03 11:02:23 +02:00
|
|
|
if (rebox.getSlice().empty())
|
2022-03-02 11:22:07 +00:00
|
|
|
// The array section is of the form array[%component][substring], keep
|
|
|
|
// the input array extents and strides.
|
2025-01-22 10:04:39 -08:00
|
|
|
return finalizeRebox(rebox, adaptor, destBoxTy, dest, base,
|
2023-01-17 09:08:43 -08:00
|
|
|
/*lbounds*/ std::nullopt, inputExtents, inputStrides,
|
|
|
|
rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
// The slice is of the form array(i:j:k)[%component]. Compute new extents
|
|
|
|
// and strides.
|
|
|
|
llvm::SmallVector<mlir::Value> slicedExtents;
|
|
|
|
llvm::SmallVector<mlir::Value> slicedStrides;
|
|
|
|
mlir::Value one = genConstantIndex(loc, idxTy, rewriter, 1);
|
2022-10-03 11:02:23 +02:00
|
|
|
const bool sliceHasOrigins = !rebox.getShift().empty();
|
2024-07-25 18:02:03 +02:00
|
|
|
unsigned sliceOps = rebox.getSliceOperandIndex();
|
|
|
|
unsigned shiftOps = rebox.getShiftOperandIndex();
|
2022-03-02 11:22:07 +00:00
|
|
|
auto strideOps = inputStrides.begin();
|
|
|
|
const unsigned inputRank = inputStrides.size();
|
|
|
|
for (unsigned i = 0; i < inputRank;
|
|
|
|
++i, ++strideOps, ++shiftOps, sliceOps += 3) {
|
|
|
|
mlir::Value sliceLb =
|
|
|
|
integerCast(loc, rewriter, idxTy, operands[sliceOps]);
|
|
|
|
mlir::Value inputStride = *strideOps; // already idxTy
|
|
|
|
// Apply origin shift: base += (lb-shift)*input_stride
|
|
|
|
mlir::Value sliceOrigin =
|
|
|
|
sliceHasOrigins
|
|
|
|
? integerCast(loc, rewriter, idxTy, operands[shiftOps])
|
|
|
|
: one;
|
|
|
|
mlir::Value diff =
|
|
|
|
rewriter.create<mlir::LLVM::SubOp>(loc, idxTy, sliceLb, sliceOrigin);
|
|
|
|
mlir::Value offset =
|
|
|
|
rewriter.create<mlir::LLVM::MulOp>(loc, idxTy, diff, inputStride);
|
2023-10-25 09:42:28 +02:00
|
|
|
// Strides from the fir.box are in bytes.
|
|
|
|
base = genGEP(loc, byteTy, rewriter, base, offset);
|
2022-03-02 11:22:07 +00:00
|
|
|
// Apply upper bound and step if this is a triplet. Otherwise, the
|
|
|
|
// dimension is dropped and no extents/strides are computed.
|
|
|
|
mlir::Value upper = operands[sliceOps + 1];
|
|
|
|
const bool isTripletSlice =
|
|
|
|
!mlir::isa_and_nonnull<mlir::LLVM::UndefOp>(upper.getDefiningOp());
|
|
|
|
if (isTripletSlice) {
|
|
|
|
mlir::Value step =
|
|
|
|
integerCast(loc, rewriter, idxTy, operands[sliceOps + 2]);
|
|
|
|
// extent = ub-lb+step/step
|
|
|
|
mlir::Value sliceUb = integerCast(loc, rewriter, idxTy, upper);
|
|
|
|
mlir::Value extent = computeTripletExtent(rewriter, loc, sliceLb,
|
|
|
|
sliceUb, step, zero, idxTy);
|
|
|
|
slicedExtents.emplace_back(extent);
|
|
|
|
// stride = step*input_stride
|
|
|
|
mlir::Value stride =
|
|
|
|
rewriter.create<mlir::LLVM::MulOp>(loc, idxTy, step, inputStride);
|
|
|
|
slicedStrides.emplace_back(stride);
|
|
|
|
}
|
|
|
|
}
|
2025-01-22 10:04:39 -08:00
|
|
|
return finalizeRebox(rebox, adaptor, destBoxTy, dest, base,
|
|
|
|
/*lbounds*/ std::nullopt, slicedExtents, slicedStrides,
|
|
|
|
rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Apply a new shape to the data described by a box given the base address,
|
|
|
|
/// extents and strides of the box.
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2025-01-22 10:04:39 -08:00
|
|
|
reshapeBox(fir::cg::XReboxOp rebox, OpAdaptor adaptor, mlir::Type destBoxTy,
|
|
|
|
mlir::Value dest, mlir::Value base, mlir::ValueRange inputExtents,
|
2023-01-17 09:08:43 -08:00
|
|
|
mlir::ValueRange inputStrides, mlir::ValueRange operands,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const {
|
2024-07-25 18:02:03 +02:00
|
|
|
mlir::ValueRange reboxShifts{
|
|
|
|
operands.begin() + rebox.getShiftOperandIndex(),
|
|
|
|
operands.begin() + rebox.getShiftOperandIndex() +
|
|
|
|
rebox.getShift().size()};
|
2022-10-03 11:02:23 +02:00
|
|
|
if (rebox.getShape().empty()) {
|
2022-03-02 11:22:07 +00:00
|
|
|
// Only setting new lower bounds.
|
2025-01-22 10:04:39 -08:00
|
|
|
return finalizeRebox(rebox, adaptor, destBoxTy, dest, base, reboxShifts,
|
2023-01-17 09:08:43 -08:00
|
|
|
inputExtents, inputStrides, rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
mlir::Location loc = rebox.getLoc();
|
|
|
|
|
|
|
|
llvm::SmallVector<mlir::Value> newStrides;
|
|
|
|
llvm::SmallVector<mlir::Value> newExtents;
|
|
|
|
mlir::Type idxTy = lowerTy().indexType();
|
|
|
|
// First stride from input box is kept. The rest is assumed contiguous
|
|
|
|
// (it is not possible to reshape otherwise). If the input is scalar,
|
|
|
|
// which may be OK if all new extents are ones, the stride does not
|
|
|
|
// matter, use one.
|
|
|
|
mlir::Value stride = inputStrides.empty()
|
|
|
|
? genConstantIndex(loc, idxTy, rewriter, 1)
|
|
|
|
: inputStrides[0];
|
2022-10-03 11:02:23 +02:00
|
|
|
for (unsigned i = 0; i < rebox.getShape().size(); ++i) {
|
2024-07-25 18:02:03 +02:00
|
|
|
mlir::Value rawExtent = operands[rebox.getShapeOperandIndex() + i];
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value extent = integerCast(loc, rewriter, idxTy, rawExtent);
|
|
|
|
newExtents.emplace_back(extent);
|
|
|
|
newStrides.emplace_back(stride);
|
|
|
|
// nextStride = extent * stride;
|
|
|
|
stride = rewriter.create<mlir::LLVM::MulOp>(loc, idxTy, extent, stride);
|
|
|
|
}
|
2025-01-22 10:04:39 -08:00
|
|
|
return finalizeRebox(rebox, adaptor, destBoxTy, dest, base, reboxShifts,
|
|
|
|
newExtents, newStrides, rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Return scalar element type of the input box.
|
|
|
|
static mlir::Type getInputEleTy(fir::cg::XReboxOp rebox) {
|
2022-10-03 11:02:23 +02:00
|
|
|
auto ty = fir::dyn_cast_ptrOrBoxEleTy(rebox.getBox().getType());
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto seqTy = mlir::dyn_cast<fir::SequenceType>(ty))
|
2022-03-02 11:22:07 +00:00
|
|
|
return seqTy.getEleTy();
|
|
|
|
return ty;
|
|
|
|
}
|
|
|
|
};
|
2021-12-03 11:44:47 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Lower `fir.emboxproc` operation. Creates a procedure box.
|
|
|
|
/// TODO: Part of supporting Fortran 2003 procedure pointers.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct EmboxProcOpConversion : public fir::FIROpConversion<fir::EmboxProcOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-12-03 11:44:47 +01:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::EmboxProcOp emboxproc, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
TODO(emboxproc.getLoc(), "fir.emboxproc codegen");
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-12-03 11:44:47 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// Code shared between insert_value and extract_value Ops.
|
|
|
|
struct ValueOpCommon {
|
|
|
|
// Translate the arguments pertaining to any multidimensional array to
|
|
|
|
// row-major order for LLVM-IR.
|
2022-08-09 22:07:35 -04:00
|
|
|
static void toRowMajor(llvm::SmallVectorImpl<int64_t> &indices,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Type ty) {
|
|
|
|
assert(ty && "type is null");
|
2022-08-09 22:07:35 -04:00
|
|
|
const auto end = indices.size();
|
2022-03-02 11:22:07 +00:00
|
|
|
for (std::remove_const_t<decltype(end)> i = 0; i < end; ++i) {
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto seq = mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(ty)) {
|
2022-03-02 11:22:07 +00:00
|
|
|
const auto dim = getDimension(seq);
|
|
|
|
if (dim > 1) {
|
|
|
|
auto ub = std::min(i + dim, end);
|
2022-08-09 22:07:35 -04:00
|
|
|
std::reverse(indices.begin() + i, indices.begin() + ub);
|
2022-03-02 11:22:07 +00:00
|
|
|
i += dim - 1;
|
|
|
|
}
|
|
|
|
ty = getArrayElementType(seq);
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (auto st = mlir::dyn_cast<mlir::LLVM::LLVMStructType>(ty)) {
|
2022-08-09 22:07:35 -04:00
|
|
|
ty = st.getBody()[indices[i]];
|
2022-03-02 11:22:07 +00:00
|
|
|
} else {
|
|
|
|
llvm_unreachable("index into invalid type");
|
|
|
|
}
|
2021-12-03 11:44:47 +01:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
2022-08-09 22:07:35 -04:00
|
|
|
static llvm::SmallVector<int64_t>
|
2022-03-02 11:22:07 +00:00
|
|
|
collectIndices(mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::ArrayAttr arrAttr) {
|
2022-08-09 22:07:35 -04:00
|
|
|
llvm::SmallVector<int64_t> indices;
|
2022-03-02 11:22:07 +00:00
|
|
|
for (auto i = arrAttr.begin(), e = arrAttr.end(); i != e; ++i) {
|
2024-04-29 09:16:22 +02:00
|
|
|
if (auto intAttr = mlir::dyn_cast<mlir::IntegerAttr>(*i)) {
|
2022-08-09 22:07:35 -04:00
|
|
|
indices.push_back(intAttr.getInt());
|
2022-03-02 11:22:07 +00:00
|
|
|
} else {
|
2024-04-29 09:16:22 +02:00
|
|
|
auto fieldName = mlir::cast<mlir::StringAttr>(*i).getValue();
|
2022-03-02 11:22:07 +00:00
|
|
|
++i;
|
2024-04-29 09:16:22 +02:00
|
|
|
auto ty = mlir::cast<mlir::TypeAttr>(*i).getValue();
|
2024-04-28 22:01:42 +02:00
|
|
|
auto index = mlir::cast<fir::RecordType>(ty).getFieldIndex(fieldName);
|
2022-08-09 22:07:35 -04:00
|
|
|
indices.push_back(index);
|
2021-12-03 11:44:47 +01:00
|
|
|
}
|
|
|
|
}
|
2022-08-09 22:07:35 -04:00
|
|
|
return indices;
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2021-12-03 11:44:47 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
private:
|
|
|
|
static mlir::Type getArrayElementType(mlir::LLVM::LLVMArrayType ty) {
|
|
|
|
auto eleTy = ty.getElementType();
|
2024-04-28 22:01:42 +02:00
|
|
|
while (auto arrTy = mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(eleTy))
|
2022-03-02 11:22:07 +00:00
|
|
|
eleTy = arrTy.getElementType();
|
|
|
|
return eleTy;
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
namespace {
|
|
|
|
/// Extract a subobject value from an ssa-value of aggregate type
|
|
|
|
struct ExtractValueOpConversion
|
2024-03-22 12:56:45 -07:00
|
|
|
: public fir::FIROpAndTypeConversion<fir::ExtractValueOp>,
|
2022-03-02 11:22:07 +00:00
|
|
|
public ValueOpCommon {
|
|
|
|
using FIROpAndTypeConversion::FIROpAndTypeConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
doRewrite(fir::ExtractValueOp extractVal, mlir::Type ty, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-07-04 21:16:13 +02:00
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
2022-08-09 22:07:35 -04:00
|
|
|
auto indices = collectIndices(rewriter, extractVal.getCoor());
|
|
|
|
toRowMajor(indices, operands[0].getType());
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ExtractValueOp>(
|
2022-08-09 22:07:35 -04:00
|
|
|
extractVal, operands[0], indices);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-12-03 11:44:47 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// InsertValue is the generalized instruction for the composition of new
|
|
|
|
/// aggregate type values.
|
|
|
|
struct InsertValueOpConversion
|
2024-07-15 16:07:48 +02:00
|
|
|
: public mlir::OpConversionPattern<fir::InsertValueOp>,
|
2022-03-02 11:22:07 +00:00
|
|
|
public ValueOpCommon {
|
2024-07-15 16:07:48 +02:00
|
|
|
using OpConversionPattern::OpConversionPattern;
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2024-07-15 16:07:48 +02:00
|
|
|
matchAndRewrite(fir::InsertValueOp insertVal, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-07-04 21:16:13 +02:00
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
2022-08-09 22:07:35 -04:00
|
|
|
auto indices = collectIndices(rewriter, insertVal.getCoor());
|
|
|
|
toRowMajor(indices, operands[0].getType());
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::InsertValueOp>(
|
2022-08-09 22:07:35 -04:00
|
|
|
insertVal, operands[0], operands[1], indices);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// InsertOnRange inserts a value into a sequence over a range of offsets.
|
|
|
|
struct InsertOnRangeOpConversion
|
2024-03-22 12:56:45 -07:00
|
|
|
: public fir::FIROpAndTypeConversion<fir::InsertOnRangeOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpAndTypeConversion::FIROpAndTypeConversion;
|
|
|
|
|
|
|
|
// Increments an array of subscripts in a row major fasion.
|
2022-08-09 22:07:35 -04:00
|
|
|
void incrementSubscripts(llvm::ArrayRef<int64_t> dims,
|
|
|
|
llvm::SmallVectorImpl<int64_t> &subscripts) const {
|
2022-03-02 11:22:07 +00:00
|
|
|
for (size_t i = dims.size(); i > 0; --i) {
|
|
|
|
if (++subscripts[i - 1] < dims[i - 1]) {
|
|
|
|
return;
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
subscripts[i - 1] = 0;
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
doRewrite(fir::InsertOnRangeOp range, mlir::Type ty, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
|
2022-08-09 22:07:35 -04:00
|
|
|
llvm::SmallVector<std::int64_t> dims;
|
2022-03-02 11:22:07 +00:00
|
|
|
auto type = adaptor.getOperands()[0].getType();
|
|
|
|
|
|
|
|
// Iteratively extract the array dimensions from the type.
|
2024-04-28 22:01:42 +02:00
|
|
|
while (auto t = mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(type)) {
|
2022-03-02 11:22:07 +00:00
|
|
|
dims.push_back(t.getNumElements());
|
|
|
|
type = t.getElementType();
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
|
|
|
|
2022-08-09 22:07:35 -04:00
|
|
|
llvm::SmallVector<std::int64_t> lBounds;
|
|
|
|
llvm::SmallVector<std::int64_t> uBounds;
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// Unzip the upper and lower bound and convert to a row major format.
|
|
|
|
mlir::DenseIntElementsAttr coor = range.getCoor();
|
|
|
|
auto reversedCoor = llvm::reverse(coor.getValues<int64_t>());
|
|
|
|
for (auto i = reversedCoor.begin(), e = reversedCoor.end(); i != e; ++i) {
|
|
|
|
uBounds.push_back(*i++);
|
|
|
|
lBounds.push_back(*i);
|
|
|
|
}
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
auto &subscripts = lBounds;
|
|
|
|
auto loc = range.getLoc();
|
|
|
|
mlir::Value lastOp = adaptor.getOperands()[0];
|
|
|
|
mlir::Value insertVal = adaptor.getOperands()[1];
|
|
|
|
|
|
|
|
while (subscripts != uBounds) {
|
|
|
|
lastOp = rewriter.create<mlir::LLVM::InsertValueOp>(
|
2022-08-09 22:07:35 -04:00
|
|
|
loc, lastOp, insertVal, subscripts);
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
incrementSubscripts(dims, subscripts);
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::InsertValueOp>(
|
2022-08-09 22:07:35 -04:00
|
|
|
range, lastOp, insertVal, subscripts);
|
2022-03-02 11:22:07 +00:00
|
|
|
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
};
|
|
|
|
} // namespace
|
|
|
|
|
|
|
|
namespace {
|
|
|
|
/// XArrayCoor is the address arithmetic on a dynamically shaped, sliced,
|
|
|
|
/// shifted etc. array.
|
|
|
|
/// (See the static restriction on coordinate_of.) array_coor determines the
|
|
|
|
/// coordinate (location) of a specific element.
|
|
|
|
struct XArrayCoorOpConversion
|
2024-03-22 12:56:45 -07:00
|
|
|
: public fir::FIROpAndTypeConversion<fir::cg::XArrayCoorOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpAndTypeConversion::FIROpAndTypeConversion;
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2023-10-25 09:42:28 +02:00
|
|
|
doRewrite(fir::cg::XArrayCoorOp coor, mlir::Type llvmPtrTy, OpAdaptor adaptor,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
auto loc = coor.getLoc();
|
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
|
|
|
unsigned rank = coor.getRank();
|
2022-10-03 11:02:23 +02:00
|
|
|
assert(coor.getIndices().size() == rank);
|
|
|
|
assert(coor.getShape().empty() || coor.getShape().size() == rank);
|
|
|
|
assert(coor.getShift().empty() || coor.getShift().size() == rank);
|
|
|
|
assert(coor.getSlice().empty() || coor.getSlice().size() == 3 * rank);
|
2021-12-07 13:01:28 +00:00
|
|
|
mlir::Type idxTy = lowerTy().indexType();
|
2024-07-25 18:02:03 +02:00
|
|
|
unsigned indexOffset = coor.getIndicesOperandIndex();
|
|
|
|
unsigned shapeOffset = coor.getShapeOperandIndex();
|
|
|
|
unsigned shiftOffset = coor.getShiftOperandIndex();
|
|
|
|
unsigned sliceOffset = coor.getSliceOperandIndex();
|
2022-10-03 11:02:23 +02:00
|
|
|
auto sliceOps = coor.getSlice().begin();
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value one = genConstantIndex(loc, idxTy, rewriter, 1);
|
|
|
|
mlir::Value prevExt = one;
|
2022-07-29 01:00:22 +02:00
|
|
|
mlir::Value offset = genConstantIndex(loc, idxTy, rewriter, 0);
|
2022-10-03 11:02:23 +02:00
|
|
|
const bool isShifted = !coor.getShift().empty();
|
|
|
|
const bool isSliced = !coor.getSlice().empty();
|
2024-04-28 22:01:42 +02:00
|
|
|
const bool baseIsBoxed =
|
|
|
|
mlir::isa<fir::BaseBoxType>(coor.getMemref().getType());
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair baseBoxTyPair =
|
|
|
|
baseIsBoxed ? getBoxTypePair(coor.getMemref().getType()) : TypePair{};
|
2024-04-19 09:23:00 -07:00
|
|
|
mlir::LLVM::IntegerOverflowFlags nsw =
|
|
|
|
mlir::LLVM::IntegerOverflowFlags::nsw;
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// For each dimension of the array, generate the offset calculation.
|
2022-06-17 17:07:12 +00:00
|
|
|
for (unsigned i = 0; i < rank; ++i, ++indexOffset, ++shapeOffset,
|
|
|
|
++shiftOffset, sliceOffset += 3, sliceOps += 3) {
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value index =
|
2022-06-17 17:07:12 +00:00
|
|
|
integerCast(loc, rewriter, idxTy, operands[indexOffset]);
|
|
|
|
mlir::Value lb =
|
|
|
|
isShifted ? integerCast(loc, rewriter, idxTy, operands[shiftOffset])
|
|
|
|
: one;
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value step = one;
|
|
|
|
bool normalSlice = isSliced;
|
|
|
|
// Compute zero based index in dimension i of the element, applying
|
|
|
|
// potential triplets and lower bounds.
|
|
|
|
if (isSliced) {
|
2022-06-17 17:07:12 +00:00
|
|
|
mlir::Value originalUb = *(sliceOps + 1);
|
|
|
|
normalSlice =
|
|
|
|
!mlir::isa_and_nonnull<fir::UndefOp>(originalUb.getDefiningOp());
|
2022-03-02 11:22:07 +00:00
|
|
|
if (normalSlice)
|
2022-06-17 17:07:12 +00:00
|
|
|
step = integerCast(loc, rewriter, idxTy, operands[sliceOffset + 2]);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2023-12-08 10:51:20 +00:00
|
|
|
auto idx = rewriter.create<mlir::LLVM::SubOp>(loc, idxTy, index, lb, nsw);
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value diff =
|
2023-12-08 10:51:20 +00:00
|
|
|
rewriter.create<mlir::LLVM::MulOp>(loc, idxTy, idx, step, nsw);
|
2022-03-02 11:22:07 +00:00
|
|
|
if (normalSlice) {
|
|
|
|
mlir::Value sliceLb =
|
2022-06-17 17:07:12 +00:00
|
|
|
integerCast(loc, rewriter, idxTy, operands[sliceOffset]);
|
2023-12-08 10:51:20 +00:00
|
|
|
auto adj =
|
|
|
|
rewriter.create<mlir::LLVM::SubOp>(loc, idxTy, sliceLb, lb, nsw);
|
|
|
|
diff = rewriter.create<mlir::LLVM::AddOp>(loc, idxTy, diff, adj, nsw);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
// Update the offset given the stride and the zero based index `diff`
|
|
|
|
// that was just computed.
|
|
|
|
if (baseIsBoxed) {
|
|
|
|
// Use stride in bytes from the descriptor.
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Value stride =
|
|
|
|
getStrideFromBox(loc, baseBoxTyPair, operands[0], i, rewriter);
|
2023-12-08 10:51:20 +00:00
|
|
|
auto sc =
|
|
|
|
rewriter.create<mlir::LLVM::MulOp>(loc, idxTy, diff, stride, nsw);
|
|
|
|
offset =
|
|
|
|
rewriter.create<mlir::LLVM::AddOp>(loc, idxTy, sc, offset, nsw);
|
2022-03-02 11:22:07 +00:00
|
|
|
} else {
|
|
|
|
// Use stride computed at last iteration.
|
2023-12-08 10:51:20 +00:00
|
|
|
auto sc =
|
|
|
|
rewriter.create<mlir::LLVM::MulOp>(loc, idxTy, diff, prevExt, nsw);
|
|
|
|
offset =
|
|
|
|
rewriter.create<mlir::LLVM::AddOp>(loc, idxTy, sc, offset, nsw);
|
2022-03-02 11:22:07 +00:00
|
|
|
// Compute next stride assuming contiguity of the base array
|
|
|
|
// (in element number).
|
2022-06-17 17:07:12 +00:00
|
|
|
auto nextExt = integerCast(loc, rewriter, idxTy, operands[shapeOffset]);
|
2023-12-08 10:51:20 +00:00
|
|
|
prevExt = rewriter.create<mlir::LLVM::MulOp>(loc, idxTy, prevExt,
|
|
|
|
nextExt, nsw);
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// Add computed offset to the base address.
|
|
|
|
if (baseIsBoxed) {
|
|
|
|
// Working with byte offsets. The base address is read from the fir.box.
|
2023-10-25 09:42:28 +02:00
|
|
|
// and used in i8* GEP to do the pointer arithmetic.
|
|
|
|
mlir::Type byteTy = ::getI8Type(coor.getContext());
|
|
|
|
mlir::Value base =
|
|
|
|
getBaseAddrFromBox(loc, baseBoxTyPair, operands[0], rewriter);
|
2022-07-29 01:00:22 +02:00
|
|
|
llvm::SmallVector<mlir::LLVM::GEPArg> args{offset};
|
2023-10-25 09:42:28 +02:00
|
|
|
auto addr = rewriter.create<mlir::LLVM::GEPOp>(loc, llvmPtrTy, byteTy,
|
|
|
|
base, args);
|
2022-10-03 11:02:23 +02:00
|
|
|
if (coor.getSubcomponent().empty()) {
|
2023-10-25 09:42:28 +02:00
|
|
|
rewriter.replaceOp(coor, addr);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2023-04-14 08:47:25 +02:00
|
|
|
// Cast the element address from void* to the derived type so that the
|
|
|
|
// derived type members can be addresses via a GEP using the index of
|
|
|
|
// components.
|
|
|
|
mlir::Type elementType =
|
2023-10-25 09:42:28 +02:00
|
|
|
getLlvmObjectTypeFromBoxType(coor.getMemref().getType());
|
2024-04-28 22:01:42 +02:00
|
|
|
while (auto arrayTy =
|
|
|
|
mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(elementType))
|
2023-04-14 08:47:25 +02:00
|
|
|
elementType = arrayTy.getElementType();
|
2022-03-02 11:22:07 +00:00
|
|
|
args.clear();
|
2022-07-29 01:00:22 +02:00
|
|
|
args.push_back(0);
|
2022-10-03 11:02:23 +02:00
|
|
|
if (!coor.getLenParams().empty()) {
|
2022-03-02 11:22:07 +00:00
|
|
|
// If type parameters are present, then we don't want to use a GEPOp
|
|
|
|
// as below, as the LLVM struct type cannot be statically defined.
|
|
|
|
TODO(loc, "derived type with type parameters");
|
|
|
|
}
|
2023-06-29 14:46:58 +00:00
|
|
|
llvm::SmallVector<mlir::Value> indices = convertSubcomponentIndices(
|
|
|
|
loc, elementType,
|
2024-07-25 18:02:03 +02:00
|
|
|
operands.slice(coor.getSubcomponentOperandIndex(),
|
2023-06-29 14:46:58 +00:00
|
|
|
coor.getSubcomponent().size()));
|
|
|
|
args.append(indices.begin(), indices.end());
|
2023-10-25 09:42:28 +02:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::GEPOp>(coor, llvmPtrTy,
|
|
|
|
elementType, addr, args);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// The array was not boxed, so it must be contiguous. offset is therefore an
|
|
|
|
// element offset and the base type is kept in the GEP unless the element
|
|
|
|
// type size is itself dynamic.
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type objectTy = fir::unwrapRefType(coor.getMemref().getType());
|
|
|
|
mlir::Type eleType = fir::unwrapSequenceType(objectTy);
|
|
|
|
mlir::Type gepObjectType = convertType(eleType);
|
|
|
|
llvm::SmallVector<mlir::LLVM::GEPArg> args;
|
2022-10-03 11:02:23 +02:00
|
|
|
if (coor.getSubcomponent().empty()) {
|
2022-03-02 11:22:07 +00:00
|
|
|
// No subcomponent.
|
2022-10-03 11:02:23 +02:00
|
|
|
if (!coor.getLenParams().empty()) {
|
2022-03-02 11:22:07 +00:00
|
|
|
// Type parameters. Adjust element size explicitly.
|
|
|
|
auto eleTy = fir::dyn_cast_ptrEleTy(coor.getType());
|
|
|
|
assert(eleTy && "result must be a reference-like type");
|
|
|
|
if (fir::characterWithDynamicLen(eleTy)) {
|
2022-10-03 11:02:23 +02:00
|
|
|
assert(coor.getLenParams().size() == 1);
|
2022-06-29 20:06:11 +02:00
|
|
|
auto length = integerCast(loc, rewriter, idxTy,
|
2024-07-25 18:02:03 +02:00
|
|
|
operands[coor.getLenParamsOperandIndex()]);
|
2023-12-08 10:51:20 +00:00
|
|
|
offset = rewriter.create<mlir::LLVM::MulOp>(loc, idxTy, offset,
|
|
|
|
length, nsw);
|
2022-03-02 11:22:07 +00:00
|
|
|
} else {
|
|
|
|
TODO(loc, "compute size of derived type with type parameters");
|
|
|
|
}
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
2023-10-25 09:42:28 +02:00
|
|
|
args.push_back(offset);
|
|
|
|
} else {
|
|
|
|
// There are subcomponents.
|
|
|
|
args.push_back(offset);
|
2023-06-29 14:46:58 +00:00
|
|
|
llvm::SmallVector<mlir::Value> indices = convertSubcomponentIndices(
|
2023-10-25 09:42:28 +02:00
|
|
|
loc, gepObjectType,
|
2024-07-25 18:02:03 +02:00
|
|
|
operands.slice(coor.getSubcomponentOperandIndex(),
|
2023-06-29 14:46:58 +00:00
|
|
|
coor.getSubcomponent().size()));
|
|
|
|
args.append(indices.begin(), indices.end());
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
2023-10-25 09:42:28 +02:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::GEPOp>(
|
|
|
|
coor, llvmPtrTy, gepObjectType, adaptor.getMemref(), args);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
};
|
|
|
|
} // namespace
|
|
|
|
|
|
|
|
/// Convert to (memory) reference to a reference to a subobject.
|
|
|
|
/// The coordinate_of op is a Swiss army knife operation that can be used on
|
|
|
|
/// (memory) references to records, arrays, complex, etc. as well as boxes.
|
|
|
|
/// With unboxed arrays, there is the restriction that the array have a static
|
|
|
|
/// shape in all but the last column.
|
|
|
|
struct CoordinateOpConversion
|
2024-03-22 12:56:45 -07:00
|
|
|
: public fir::FIROpAndTypeConversion<fir::CoordinateOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpAndTypeConversion::FIROpAndTypeConversion;
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
doRewrite(fir::CoordinateOp coor, mlir::Type ty, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::ValueRange operands = adaptor.getOperands();
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Location loc = coor.getLoc();
|
|
|
|
mlir::Value base = operands[0];
|
|
|
|
mlir::Type baseObjectTy = coor.getBaseType();
|
|
|
|
mlir::Type objectTy = fir::dyn_cast_ptrOrBoxEleTy(baseObjectTy);
|
|
|
|
assert(objectTy && "fir.coordinate_of expects a reference type");
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmObjectTy = convertType(objectTy);
|
2021-12-07 13:01:28 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// Complex type - basically, extract the real or imaginary part
|
2023-10-25 09:42:28 +02:00
|
|
|
// FIXME: double check why this is done before the fir.box case below.
|
2022-03-02 11:22:07 +00:00
|
|
|
if (fir::isa_complex(objectTy)) {
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Value gep =
|
|
|
|
genGEP(loc, llvmObjectTy, rewriter, base, 0, operands[1]);
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOp(coor, gep);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
// Boxed type - get the base pointer from the box
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::dyn_cast<fir::BaseBoxType>(baseObjectTy))
|
2023-10-25 09:42:28 +02:00
|
|
|
return doRewriteBox(coor, operands, loc, rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
|
2022-03-28 16:13:59 +00:00
|
|
|
// Reference, pointer or a heap type
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::ReferenceType, fir::PointerType, fir::HeapType>(
|
|
|
|
baseObjectTy))
|
2023-10-25 09:42:28 +02:00
|
|
|
return doRewriteRefOrPtr(coor, llvmObjectTy, operands, loc, rewriter);
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
return rewriter.notifyMatchFailure(
|
|
|
|
coor, "fir.coordinate_of base operand has unsupported type");
|
2021-12-07 13:01:28 +00:00
|
|
|
}
|
|
|
|
|
2022-03-28 16:13:59 +00:00
|
|
|
static unsigned getFieldNumber(fir::RecordType ty, mlir::Value op) {
|
2022-03-02 11:22:07 +00:00
|
|
|
return fir::hasDynamicSize(ty)
|
|
|
|
? op.getDefiningOp()
|
|
|
|
->getAttrOfType<mlir::IntegerAttr>("field")
|
|
|
|
.getInt()
|
2022-07-12 09:26:16 +02:00
|
|
|
: getConstantIntValue(op);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
2022-03-28 16:13:59 +00:00
|
|
|
static bool hasSubDimensions(mlir::Type type) {
|
2024-04-28 22:01:42 +02:00
|
|
|
return mlir::isa<fir::SequenceType, fir::RecordType, mlir::TupleType>(type);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
2025-02-28 09:50:05 +01:00
|
|
|
// Helper structure to analyze the CoordinateOp path and decide if and how
|
|
|
|
// the GEP should be generated for it.
|
|
|
|
struct ShapeAnalysis {
|
|
|
|
bool hasKnownShape;
|
|
|
|
bool columnIsDeferred;
|
|
|
|
};
|
2021-11-07 14:43:00 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Walk the abstract memory layout and determine if the path traverses any
|
|
|
|
/// array types with unknown shape. Return true iff all the array types have a
|
|
|
|
/// constant shape along the path.
|
2025-02-28 09:50:05 +01:00
|
|
|
/// TODO: move the verification logic into the verifier.
|
|
|
|
static std::optional<ShapeAnalysis>
|
|
|
|
arraysHaveKnownShape(mlir::Type type, fir::CoordinateOp coor) {
|
|
|
|
fir::CoordinateIndicesAdaptor indices = coor.getIndices();
|
|
|
|
auto begin = indices.begin();
|
|
|
|
bool hasKnownShape = true;
|
|
|
|
bool columnIsDeferred = false;
|
|
|
|
for (auto it = begin, end = indices.end(); it != end;) {
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto arrTy = mlir::dyn_cast<fir::SequenceType>(type)) {
|
2025-02-28 09:50:05 +01:00
|
|
|
bool addressingStart = (it == begin);
|
|
|
|
unsigned arrayDim = arrTy.getDimension();
|
|
|
|
for (auto dimExtent : llvm::enumerate(arrTy.getShape())) {
|
|
|
|
if (dimExtent.value() == fir::SequenceType::getUnknownExtent()) {
|
|
|
|
hasKnownShape = false;
|
|
|
|
if (addressingStart && dimExtent.index() + 1 == arrayDim) {
|
|
|
|
// If this point was reached, the raws of the first array have
|
|
|
|
// constant extents.
|
|
|
|
columnIsDeferred = true;
|
|
|
|
} else {
|
|
|
|
// One of the array dimension that is not the column of the first
|
|
|
|
// array has dynamic extent. It will not possible to do
|
|
|
|
// code generation for the CoordinateOp if the base is not a
|
|
|
|
// fir.box containing the value of that extent.
|
|
|
|
return ShapeAnalysis{false, false};
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// There may be less operands than the array size if the
|
|
|
|
// fir.coordinate_of result is not an element but a sub-array.
|
|
|
|
if (it != end)
|
|
|
|
++it;
|
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
type = arrTy.getEleTy();
|
2025-02-28 09:50:05 +01:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if (auto strTy = mlir::dyn_cast<fir::RecordType>(type)) {
|
|
|
|
auto intAttr = llvm::dyn_cast<mlir::IntegerAttr>(*it);
|
|
|
|
if (!intAttr) {
|
|
|
|
mlir::emitError(coor.getLoc(),
|
|
|
|
"expected field name in fir.coordinate_of");
|
|
|
|
return std::nullopt;
|
|
|
|
}
|
|
|
|
type = strTy.getType(intAttr.getInt());
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (auto strTy = mlir::dyn_cast<mlir::TupleType>(type)) {
|
2025-02-28 09:50:05 +01:00
|
|
|
auto value = llvm::dyn_cast<mlir::Value>(*it);
|
|
|
|
if (!value) {
|
|
|
|
mlir::emitError(
|
|
|
|
coor.getLoc(),
|
|
|
|
"expected constant value to address tuple in fir.coordinate_of");
|
|
|
|
return std::nullopt;
|
|
|
|
}
|
|
|
|
type = strTy.getType(getConstantIntValue(value));
|
|
|
|
} else if (auto charType = mlir::dyn_cast<fir::CharacterType>(type)) {
|
|
|
|
// Addressing character in string. Fortran strings degenerate to arrays
|
|
|
|
// in LLVM, so they are handled like arrays of characters here.
|
|
|
|
if (charType.getLen() == fir::CharacterType::unknownLen())
|
|
|
|
return ShapeAnalysis{false, true};
|
|
|
|
type = fir::CharacterType::getSingleton(charType.getContext(),
|
|
|
|
charType.getFKind());
|
2021-11-07 14:43:00 +01:00
|
|
|
}
|
2025-02-28 09:50:05 +01:00
|
|
|
++it;
|
2021-11-07 14:43:00 +01:00
|
|
|
}
|
2025-02-28 09:50:05 +01:00
|
|
|
return ShapeAnalysis{hasKnownShape, columnIsDeferred};
|
2021-11-07 14:43:00 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2023-10-25 09:42:28 +02:00
|
|
|
doRewriteBox(fir::CoordinateOp coor, mlir::ValueRange operands,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Location loc,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const {
|
|
|
|
mlir::Type boxObjTy = coor.getBaseType();
|
2024-04-28 22:01:42 +02:00
|
|
|
assert(mlir::dyn_cast<fir::BaseBoxType>(boxObjTy) &&
|
|
|
|
"This is not a `fir.box`");
|
2023-10-25 09:42:28 +02:00
|
|
|
TypePair boxTyPair = getBoxTypePair(boxObjTy);
|
2021-11-07 14:43:00 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value boxBaseAddr = operands[0];
|
2021-11-07 14:43:00 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// 1. SPECIAL CASE (uses `fir.len_param_index`):
|
|
|
|
// %box = ... : !fir.box<!fir.type<derived{len1:i32}>>
|
|
|
|
// %lenp = fir.len_param_index len1, !fir.type<derived{len1:i32}>
|
|
|
|
// %addr = coordinate_of %box, %lenp
|
|
|
|
if (coor.getNumOperands() == 2) {
|
|
|
|
mlir::Operation *coordinateDef =
|
|
|
|
(*coor.getCoor().begin()).getDefiningOp();
|
2022-04-26 13:44:34 -07:00
|
|
|
if (mlir::isa_and_nonnull<fir::LenParamIndexOp>(coordinateDef))
|
2022-03-02 11:22:07 +00:00
|
|
|
TODO(loc,
|
|
|
|
"fir.coordinate_of - fir.len_param_index is not supported yet");
|
|
|
|
}
|
2021-11-07 14:43:00 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// 2. GENERAL CASE:
|
|
|
|
// 2.1. (`fir.array`)
|
|
|
|
// %box = ... : !fix.box<!fir.array<?xU>>
|
|
|
|
// %idx = ... : index
|
|
|
|
// %resultAddr = coordinate_of %box, %idx : !fir.ref<U>
|
|
|
|
// 2.2 (`fir.derived`)
|
|
|
|
// %box = ... : !fix.box<!fir.type<derived_type{field_1:i32}>>
|
|
|
|
// %idx = ... : i32
|
|
|
|
// %resultAddr = coordinate_of %box, %idx : !fir.ref<i32>
|
|
|
|
// 2.3 (`fir.derived` inside `fir.array`)
|
|
|
|
// %box = ... : !fir.box<!fir.array<10 x !fir.type<derived_1{field_1:f32,
|
|
|
|
// field_2:f32}>>> %idx1 = ... : index %idx2 = ... : i32 %resultAddr =
|
|
|
|
// coordinate_of %box, %idx1, %idx2 : !fir.ref<f32>
|
|
|
|
// 2.4. TODO: Either document or disable any other case that the following
|
|
|
|
// implementation might convert.
|
|
|
|
mlir::Value resultAddr =
|
2023-10-25 09:42:28 +02:00
|
|
|
getBaseAddrFromBox(loc, boxTyPair, boxBaseAddr, rewriter);
|
2022-03-28 16:13:59 +00:00
|
|
|
// Component Type
|
|
|
|
auto cpnTy = fir::dyn_cast_ptrOrBoxEleTy(boxObjTy);
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmPtrTy = ::getLlvmPtrType(coor.getContext());
|
|
|
|
mlir::Type byteTy = ::getI8Type(coor.getContext());
|
2024-04-19 09:23:00 -07:00
|
|
|
mlir::LLVM::IntegerOverflowFlags nsw =
|
|
|
|
mlir::LLVM::IntegerOverflowFlags::nsw;
|
2021-11-04 10:36:00 +01:00
|
|
|
|
2025-02-28 09:50:05 +01:00
|
|
|
int nextIndexValue = 1;
|
|
|
|
fir::CoordinateIndicesAdaptor indices = coor.getIndices();
|
|
|
|
for (auto it = indices.begin(), end = indices.end(); it != end;) {
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto arrTy = mlir::dyn_cast<fir::SequenceType>(cpnTy)) {
|
2025-02-28 09:50:05 +01:00
|
|
|
if (it != indices.begin())
|
2022-03-02 11:22:07 +00:00
|
|
|
TODO(loc, "fir.array nested inside other array and/or derived type");
|
|
|
|
// Applies byte strides from the box. Ignore lower bound from box
|
|
|
|
// since fir.coordinate_of indexes are zero based. Lowering takes care
|
|
|
|
// of lower bound aspects. This both accounts for dynamically sized
|
|
|
|
// types and non contiguous arrays.
|
|
|
|
auto idxTy = lowerTy().indexType();
|
|
|
|
mlir::Value off = genConstantIndex(loc, idxTy, rewriter, 0);
|
2025-02-28 09:50:05 +01:00
|
|
|
unsigned arrayDim = arrTy.getDimension();
|
|
|
|
for (unsigned dim = 0; dim < arrayDim && it != end; ++dim, ++it) {
|
|
|
|
mlir::Value stride =
|
|
|
|
getStrideFromBox(loc, boxTyPair, operands[0], dim, rewriter);
|
2023-12-08 10:51:20 +00:00
|
|
|
auto sc = rewriter.create<mlir::LLVM::MulOp>(
|
2025-02-28 09:50:05 +01:00
|
|
|
loc, idxTy, operands[nextIndexValue + dim], stride, nsw);
|
2023-12-08 10:51:20 +00:00
|
|
|
off = rewriter.create<mlir::LLVM::AddOp>(loc, idxTy, sc, off, nsw);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2025-02-28 09:50:05 +01:00
|
|
|
nextIndexValue += arrayDim;
|
2022-07-29 01:00:22 +02:00
|
|
|
resultAddr = rewriter.create<mlir::LLVM::GEPOp>(
|
2023-10-25 09:42:28 +02:00
|
|
|
loc, llvmPtrTy, byteTy, resultAddr,
|
2022-07-29 01:00:22 +02:00
|
|
|
llvm::ArrayRef<mlir::LLVM::GEPArg>{off});
|
2022-03-28 16:13:59 +00:00
|
|
|
cpnTy = arrTy.getEleTy();
|
2024-04-28 22:01:42 +02:00
|
|
|
} else if (auto recTy = mlir::dyn_cast<fir::RecordType>(cpnTy)) {
|
2025-02-28 09:50:05 +01:00
|
|
|
auto intAttr = llvm::dyn_cast<mlir::IntegerAttr>(*it);
|
|
|
|
if (!intAttr)
|
|
|
|
return mlir::emitError(loc,
|
|
|
|
"expected field name in fir.coordinate_of");
|
|
|
|
int fieldIndex = intAttr.getInt();
|
|
|
|
++it;
|
|
|
|
cpnTy = recTy.getType(fieldIndex);
|
2023-10-25 09:42:28 +02:00
|
|
|
auto llvmRecTy = lowerTy().convertType(recTy);
|
|
|
|
resultAddr = rewriter.create<mlir::LLVM::GEPOp>(
|
|
|
|
loc, llvmPtrTy, llvmRecTy, resultAddr,
|
2025-02-28 09:50:05 +01:00
|
|
|
llvm::ArrayRef<mlir::LLVM::GEPArg>{0, fieldIndex});
|
2022-03-02 11:22:07 +00:00
|
|
|
} else {
|
|
|
|
fir::emitFatalError(loc, "unexpected type in coordinate_of");
|
2021-11-04 10:36:00 +01:00
|
|
|
}
|
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
|
2023-10-25 09:42:28 +02:00
|
|
|
rewriter.replaceOp(coor, resultAddr);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-04 10:36:00 +01:00
|
|
|
}
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2023-10-25 09:42:28 +02:00
|
|
|
doRewriteRefOrPtr(fir::CoordinateOp coor, mlir::Type llvmObjectTy,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ValueRange operands, mlir::Location loc,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const {
|
|
|
|
mlir::Type baseObjectTy = coor.getBaseType();
|
2021-11-04 10:36:00 +01:00
|
|
|
|
2022-03-28 16:13:59 +00:00
|
|
|
// Component Type
|
|
|
|
mlir::Type cpnTy = fir::dyn_cast_ptrOrBoxEleTy(baseObjectTy);
|
2025-02-28 09:50:05 +01:00
|
|
|
|
|
|
|
const std::optional<ShapeAnalysis> shapeAnalysis =
|
|
|
|
arraysHaveKnownShape(cpnTy, coor);
|
|
|
|
if (!shapeAnalysis)
|
|
|
|
return mlir::failure();
|
2021-11-04 10:36:00 +01:00
|
|
|
|
2022-03-28 16:13:59 +00:00
|
|
|
if (fir::hasDynamicSize(fir::unwrapSequenceType(cpnTy)))
|
|
|
|
return mlir::emitError(
|
2022-03-02 11:22:07 +00:00
|
|
|
loc, "fir.coordinate_of with a dynamic element size is unsupported");
|
2021-11-04 10:36:00 +01:00
|
|
|
|
2025-02-28 09:50:05 +01:00
|
|
|
if (shapeAnalysis->hasKnownShape || shapeAnalysis->columnIsDeferred) {
|
2022-07-29 01:00:22 +02:00
|
|
|
llvm::SmallVector<mlir::LLVM::GEPArg> offs;
|
2025-02-28 09:50:05 +01:00
|
|
|
if (shapeAnalysis->hasKnownShape) {
|
2022-07-29 01:00:22 +02:00
|
|
|
offs.push_back(0);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2025-02-28 09:50:05 +01:00
|
|
|
// Else, only the column is `?` and we can simply place the column value
|
|
|
|
// in the 0-th GEP position.
|
|
|
|
|
2022-12-14 11:39:19 +01:00
|
|
|
std::optional<int> dims;
|
2022-04-26 13:44:34 -07:00
|
|
|
llvm::SmallVector<mlir::Value> arrIdx;
|
2025-02-28 09:50:05 +01:00
|
|
|
int nextIndexValue = 1;
|
|
|
|
for (auto index : coor.getIndices()) {
|
|
|
|
if (auto intAttr = llvm::dyn_cast<mlir::IntegerAttr>(index)) {
|
|
|
|
// Addressing derived type component.
|
|
|
|
auto recordType = llvm::dyn_cast<fir::RecordType>(cpnTy);
|
|
|
|
if (!recordType)
|
|
|
|
return mlir::emitError(
|
|
|
|
loc,
|
|
|
|
"fir.coordinate base type is not consistent with operands");
|
|
|
|
int fieldId = intAttr.getInt();
|
|
|
|
cpnTy = recordType.getType(fieldId);
|
|
|
|
offs.push_back(fieldId);
|
2022-03-02 11:22:07 +00:00
|
|
|
continue;
|
|
|
|
}
|
2025-02-28 09:50:05 +01:00
|
|
|
// Value index (addressing array, tuple, or complex part).
|
|
|
|
mlir::Value indexValue = operands[nextIndexValue++];
|
|
|
|
if (auto tupTy = mlir::dyn_cast<mlir::TupleType>(cpnTy)) {
|
|
|
|
cpnTy = tupTy.getType(getConstantIntValue(indexValue));
|
|
|
|
offs.push_back(indexValue);
|
|
|
|
} else {
|
|
|
|
if (!dims) {
|
|
|
|
if (auto arrayType = llvm::dyn_cast<fir::SequenceType>(cpnTy)) {
|
|
|
|
// Starting addressing array or array component.
|
|
|
|
dims = arrayType.getDimension();
|
|
|
|
cpnTy = arrayType.getElementType();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (dims) {
|
|
|
|
arrIdx.push_back(indexValue);
|
|
|
|
if (--(*dims) == 0) {
|
|
|
|
// Append array range in reverse (FIR arrays are column-major).
|
|
|
|
offs.append(arrIdx.rbegin(), arrIdx.rend());
|
|
|
|
arrIdx.clear();
|
|
|
|
dims.reset();
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
offs.push_back(indexValue);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
}
|
2021-12-06 15:51:45 +01:00
|
|
|
}
|
2025-02-28 09:50:05 +01:00
|
|
|
// It is possible the fir.coordinate_of result is a sub-array, in which
|
|
|
|
// case there may be some "unfinished" array indices to reverse and push.
|
|
|
|
if (!arrIdx.empty())
|
2022-03-02 11:22:07 +00:00
|
|
|
offs.append(arrIdx.rbegin(), arrIdx.rend());
|
2025-02-28 09:50:05 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value base = operands[0];
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Value retval = genGEP(loc, llvmObjectTy, rewriter, base, offs);
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOp(coor, retval);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-12-06 15:51:45 +01:00
|
|
|
}
|
|
|
|
|
2022-03-28 16:13:59 +00:00
|
|
|
return mlir::emitError(
|
|
|
|
loc, "fir.coordinate_of base operand has unsupported type");
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Convert `fir.field_index`. The conversion depends on whether the size of
|
|
|
|
/// the record is static or dynamic.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct FieldIndexOpConversion : public fir::FIROpConversion<fir::FieldIndexOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
|
|
|
// NB: most field references should be resolved by this point
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::FieldIndexOp field, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2024-04-28 22:01:42 +02:00
|
|
|
auto recTy = mlir::cast<fir::RecordType>(field.getOnType());
|
2022-03-02 11:22:07 +00:00
|
|
|
unsigned index = recTy.getFieldIndex(field.getFieldId());
|
|
|
|
|
|
|
|
if (!fir::hasDynamicSize(recTy)) {
|
|
|
|
// Derived type has compile-time constant layout. Return index of the
|
|
|
|
// component type in the parent type (to be used in GEP).
|
|
|
|
rewriter.replaceOp(field, mlir::ValueRange{genConstantOffset(
|
|
|
|
field.getLoc(), rewriter, index)});
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-12-06 15:51:45 +01:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
// Derived type has compile-time constant layout. Call the compiler
|
|
|
|
// generated function to determine the byte offset of the field at runtime.
|
|
|
|
// This returns a non-constant.
|
2022-04-26 13:44:34 -07:00
|
|
|
mlir::FlatSymbolRefAttr symAttr = mlir::SymbolRefAttr::get(
|
2022-03-02 11:22:07 +00:00
|
|
|
field.getContext(), getOffsetMethodName(recTy, field.getFieldId()));
|
2022-04-26 13:44:34 -07:00
|
|
|
mlir::NamedAttribute callAttr = rewriter.getNamedAttr("callee", symAttr);
|
|
|
|
mlir::NamedAttribute fieldAttr = rewriter.getNamedAttr(
|
2022-03-02 11:22:07 +00:00
|
|
|
"field", mlir::IntegerAttr::get(lowerTy().indexType(), index));
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::CallOp>(
|
|
|
|
field, lowerTy().offsetType(), adaptor.getOperands(),
|
2024-09-26 13:59:37 +08:00
|
|
|
addLLVMOpBundleAttrs(rewriter, {callAttr, fieldAttr},
|
|
|
|
adaptor.getOperands().size()));
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-12-06 15:51:45 +01:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
|
|
|
|
// Re-Construct the name of the compiler generated method that calculates the
|
|
|
|
// offset
|
|
|
|
inline static std::string getOffsetMethodName(fir::RecordType recTy,
|
|
|
|
llvm::StringRef field) {
|
|
|
|
return recTy.getName().str() + "P." + field.str() + ".offset";
|
|
|
|
}
|
2021-12-06 15:51:45 +01:00
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Convert `fir.end`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct FirEndOpConversion : public fir::FIROpConversion<fir::FirEndOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-09 14:15:07 +01:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::FirEndOp firEnd, OpAdaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
TODO(firEnd.getLoc(), "fir.end codegen");
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-09 14:15:07 +01:00
|
|
|
|
2023-01-31 20:09:56 +01:00
|
|
|
/// Lower `fir.type_desc` to a global addr.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct TypeDescOpConversion : public fir::FIROpConversion<fir::TypeDescOp> {
|
2021-11-09 14:15:07 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2023-01-31 20:09:56 +01:00
|
|
|
matchAndRewrite(fir::TypeDescOp typeDescOp, OpAdaptor adaptor,
|
2021-11-09 14:15:07 +01:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2023-01-31 20:09:56 +01:00
|
|
|
mlir::Type inTy = typeDescOp.getInType();
|
2024-04-28 22:01:42 +02:00
|
|
|
assert(mlir::isa<fir::RecordType>(inTy) && "expecting fir.type");
|
|
|
|
auto recordType = mlir::dyn_cast<fir::RecordType>(inTy);
|
2023-01-31 20:09:56 +01:00
|
|
|
auto module = typeDescOp.getOperation()->getParentOfType<mlir::ModuleOp>();
|
|
|
|
std::string typeDescName =
|
2024-08-21 13:37:03 -07:00
|
|
|
this->options.typeDescriptorsRenamedForAssembly
|
|
|
|
? fir::NameUniquer::getTypeDescriptorAssemblyName(
|
|
|
|
recordType.getName())
|
|
|
|
: fir::NameUniquer::getTypeDescriptorName(recordType.getName());
|
2023-10-25 09:42:28 +02:00
|
|
|
auto llvmPtrTy = ::getLlvmPtrType(typeDescOp.getContext());
|
2023-01-31 20:09:56 +01:00
|
|
|
if (auto global = module.lookupSymbol<mlir::LLVM::GlobalOp>(typeDescName)) {
|
2023-10-25 09:42:28 +02:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::AddressOfOp>(
|
|
|
|
typeDescOp, llvmPtrTy, global.getSymName());
|
2023-01-31 20:09:56 +01:00
|
|
|
return mlir::success();
|
|
|
|
} else if (auto global = module.lookupSymbol<fir::GlobalOp>(typeDescName)) {
|
2023-10-25 09:42:28 +02:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::AddressOfOp>(
|
|
|
|
typeDescOp, llvmPtrTy, global.getSymName());
|
2023-01-31 20:09:56 +01:00
|
|
|
return mlir::success();
|
|
|
|
}
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Lower `fir.has_value` operation to `llvm.return` operation.
|
2024-07-15 16:07:48 +02:00
|
|
|
struct HasValueOpConversion
|
|
|
|
: public mlir::OpConversionPattern<fir::HasValueOp> {
|
|
|
|
using OpConversionPattern::OpConversionPattern;
|
2022-03-02 11:22:07 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::HasValueOp op, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-04-26 13:44:34 -07:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ReturnOp>(op,
|
|
|
|
adaptor.getOperands());
|
|
|
|
return mlir::success();
|
2021-11-09 14:15:07 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2023-08-30 22:27:10 +08:00
|
|
|
#ifndef NDEBUG
|
2023-08-30 10:49:37 -03:00
|
|
|
// Check if attr's type is compatible with ty.
|
|
|
|
//
|
|
|
|
// This is done by comparing attr's element type, converted to LLVM type,
|
|
|
|
// with ty's element type.
|
|
|
|
//
|
|
|
|
// Only integer and floating point (including complex) attributes are
|
|
|
|
// supported. Also, attr is expected to have a TensorType and ty is expected
|
|
|
|
// to be of LLVMArrayType. If any of the previous conditions is false, then
|
|
|
|
// the specified attr and ty are not supported by this function and are
|
|
|
|
// assumed to be compatible.
|
|
|
|
static inline bool attributeTypeIsCompatible(mlir::MLIRContext *ctx,
|
|
|
|
mlir::Attribute attr,
|
|
|
|
mlir::Type ty) {
|
|
|
|
// Get attr's LLVM element type.
|
|
|
|
if (!attr)
|
|
|
|
return true;
|
|
|
|
auto intOrFpEleAttr = mlir::dyn_cast<mlir::DenseIntOrFPElementsAttr>(attr);
|
|
|
|
if (!intOrFpEleAttr)
|
|
|
|
return true;
|
|
|
|
auto tensorTy = mlir::dyn_cast<mlir::TensorType>(intOrFpEleAttr.getType());
|
|
|
|
if (!tensorTy)
|
|
|
|
return true;
|
|
|
|
mlir::Type attrEleTy =
|
|
|
|
mlir::LLVMTypeConverter(ctx).convertType(tensorTy.getElementType());
|
|
|
|
|
|
|
|
// Get ty's element type.
|
|
|
|
auto arrTy = mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(ty);
|
|
|
|
if (!arrTy)
|
|
|
|
return true;
|
|
|
|
mlir::Type eleTy = arrTy.getElementType();
|
|
|
|
while ((arrTy = mlir::dyn_cast<mlir::LLVM::LLVMArrayType>(eleTy)))
|
|
|
|
eleTy = arrTy.getElementType();
|
|
|
|
|
|
|
|
return attrEleTy == eleTy;
|
|
|
|
}
|
2023-08-30 22:27:10 +08:00
|
|
|
#endif
|
2023-08-30 10:49:37 -03:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Lower `fir.global` operation to `llvm.global` operation.
|
|
|
|
/// `fir.insert_on_range` operations are replaced with constant dense attribute
|
|
|
|
/// if they are applied on the full range.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct GlobalOpConversion : public fir::FIROpConversion<fir::GlobalOp> {
|
2021-11-09 14:15:07 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::GlobalOp global, OpAdaptor adaptor,
|
2021-11-09 14:15:07 +01:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2024-05-22 10:59:29 +01:00
|
|
|
|
2024-10-13 23:36:00 +01:00
|
|
|
llvm::SmallVector<mlir::Attribute> dbgExprs;
|
2024-05-22 10:59:29 +01:00
|
|
|
|
|
|
|
if (auto fusedLoc = mlir::dyn_cast<mlir::FusedLoc>(global.getLoc())) {
|
[flang][debug] Add support for common blocks. (#112398)
This PR adds debug support for common block in flang. As variable which
are part of a common block don't have a special marker to recognize
them, we use the following check to find them.
%0 = fir.address_of(@a)
%1 = fir.convert %0
%2 = fir.coordinate_of %1, %c0
%3 = fir.convert %2
%4 = fircg.ext_declare %3
If the memref of a fircg.ext_declare points to a fir.coordinate_of and
that in turn points to an fir.address_of (ignoring immediate
fir.convert) then we assume that it is a common block variable. The
fir.address_of gives us the global symbol which is the storage for
common block and fir.coordinate_of provides the offset in this storage.
The debug hierarchy looks like as
subroutine f3
integer :: x, y
common /a/ x, y
end subroutine
@a_ = global { ... } { ... }, !dbg !26, !dbg !28
!23 = !DISubprogram(name: "f3"...)
!24 = !DICommonBlock(scope: !23, name: "a", ...)
!25 = !DIGlobalVariable(name: "x", scope: !24 ...)
!26 = !DIGlobalVariableExpression(var: !25, expr: !DIExpression())
!27 = !DIGlobalVariable(name: "y", scope: !24 ...)
!28 = !DIGlobalVariableExpression(var: !27, expr:
!DIExpression(DW_OP_plus_uconst, 4))
This required following changes:
1. Instead of using DIGlobalVariableAttr in the FusedLoc of GlobalOp, we
use DIGlobalVariableExpressionAttr. This allows us the generate the
DIExpression where we have the information.
2. Previously, only one DIGlobalVariableExpressionAttr could be linked
to one global op. I recently removed this restriction in mlir. To make
use of it, we add an ArrayAttr to the FusedLoc of a GlobalOp. This
allows us to pass multiple DIGlobalVariableExpressionAttr.
3. I was depending on the name of global for the name of the common
block. The name gets a '_' appended. I could not find a utility function
in flang to remove it so I have to brute force it.
2025-01-28 12:54:15 +00:00
|
|
|
if (auto gvExprAttr = mlir::dyn_cast_if_present<mlir::ArrayAttr>(
|
|
|
|
fusedLoc.getMetadata())) {
|
|
|
|
for (auto attr : gvExprAttr.getAsRange<mlir::Attribute>())
|
|
|
|
if (auto dbgAttr =
|
|
|
|
mlir::dyn_cast<mlir::LLVM::DIGlobalVariableExpressionAttr>(
|
|
|
|
attr))
|
|
|
|
dbgExprs.push_back(dbgAttr);
|
2024-05-22 10:59:29 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
auto tyAttr = convertType(global.getType());
|
2023-10-25 09:42:28 +02:00
|
|
|
if (auto boxType = mlir::dyn_cast<fir::BaseBoxType>(global.getType()))
|
|
|
|
tyAttr = this->lowerTy().convertBoxTypeAsStruct(boxType);
|
2022-03-02 11:22:07 +00:00
|
|
|
auto loc = global.getLoc();
|
2022-07-16 00:51:54 -07:00
|
|
|
mlir::Attribute initAttr = global.getInitVal().value_or(mlir::Attribute());
|
2023-08-30 10:49:37 -03:00
|
|
|
assert(attributeTypeIsCompatible(global.getContext(), initAttr, tyAttr));
|
2022-03-02 11:22:07 +00:00
|
|
|
auto linkage = convertLinkage(global.getLinkName());
|
2022-07-11 20:41:12 -07:00
|
|
|
auto isConst = global.getConstant().has_value();
|
2024-05-22 10:59:29 +01:00
|
|
|
mlir::SymbolRefAttr comdat;
|
|
|
|
llvm::ArrayRef<mlir::NamedAttribute> attrs;
|
2022-03-02 11:22:07 +00:00
|
|
|
auto g = rewriter.create<mlir::LLVM::GlobalOp>(
|
2024-05-22 10:59:29 +01:00
|
|
|
loc, tyAttr, isConst, linkage, global.getSymName(), initAttr, 0, 0,
|
2024-10-13 23:36:00 +01:00
|
|
|
false, false, comdat, attrs, dbgExprs);
|
2023-04-20 07:05:17 -05:00
|
|
|
|
2024-06-04 11:15:31 -07:00
|
|
|
if (global.getAlignment() && *global.getAlignment() > 0)
|
|
|
|
g.setAlignment(*global.getAlignment());
|
|
|
|
|
2023-06-26 15:03:17 +01:00
|
|
|
auto module = global->getParentOfType<mlir::ModuleOp>();
|
2024-12-20 10:37:48 -08:00
|
|
|
auto gpuMod = global->getParentOfType<mlir::gpu::GPUModuleOp>();
|
2023-06-26 15:03:17 +01:00
|
|
|
// Add comdat if necessary
|
|
|
|
if (fir::getTargetTriple(module).supportsCOMDAT() &&
|
|
|
|
(linkage == mlir::LLVM::Linkage::Linkonce ||
|
2024-12-20 10:37:48 -08:00
|
|
|
linkage == mlir::LLVM::Linkage::LinkonceODR) &&
|
|
|
|
!gpuMod) {
|
2023-06-26 15:03:17 +01:00
|
|
|
addComdat(g, rewriter, module);
|
|
|
|
}
|
|
|
|
|
2023-04-20 07:05:17 -05:00
|
|
|
// Apply all non-Fir::GlobalOp attributes to the LLVM::GlobalOp, preserving
|
|
|
|
// them; whilst taking care not to apply attributes that are lowered in
|
|
|
|
// other ways.
|
|
|
|
llvm::SmallDenseSet<llvm::StringRef> elidedAttrsSet(
|
|
|
|
global.getAttributeNames().begin(), global.getAttributeNames().end());
|
|
|
|
for (auto &attr : global->getAttrs())
|
|
|
|
if (!elidedAttrsSet.contains(attr.getName().strref()))
|
|
|
|
g->setAttr(attr.getName(), attr.getValue());
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
auto &gr = g.getInitializerRegion();
|
|
|
|
rewriter.inlineRegionBefore(global.getRegion(), gr, gr.end());
|
|
|
|
if (!gr.empty()) {
|
|
|
|
// Replace insert_on_range with a constant dense attribute if the
|
|
|
|
// initialization is on the full range.
|
|
|
|
auto insertOnRangeOps = gr.front().getOps<fir::InsertOnRangeOp>();
|
|
|
|
for (auto insertOp : insertOnRangeOps) {
|
|
|
|
if (isFullRange(insertOp.getCoor(), insertOp.getType())) {
|
|
|
|
auto seqTyAttr = convertType(insertOp.getType());
|
|
|
|
auto *op = insertOp.getVal().getDefiningOp();
|
|
|
|
auto constant = mlir::dyn_cast<mlir::arith::ConstantOp>(op);
|
|
|
|
if (!constant) {
|
|
|
|
auto convertOp = mlir::dyn_cast<fir::ConvertOp>(op);
|
|
|
|
if (!convertOp)
|
|
|
|
continue;
|
2022-04-26 13:44:34 -07:00
|
|
|
constant = mlir::cast<mlir::arith::ConstantOp>(
|
2022-03-02 11:22:07 +00:00
|
|
|
convertOp.getValue().getDefiningOp());
|
|
|
|
}
|
|
|
|
mlir::Type vecType = mlir::VectorType::get(
|
|
|
|
insertOp.getType().getShape(), constant.getType());
|
|
|
|
auto denseAttr = mlir::DenseElementsAttr::get(
|
2024-04-28 22:01:42 +02:00
|
|
|
mlir::cast<mlir::ShapedType>(vecType), constant.getValue());
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.setInsertionPointAfter(insertOp);
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::arith::ConstantOp>(
|
|
|
|
insertOp, seqTyAttr, denseAttr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2025-03-14 15:28:32 -07:00
|
|
|
|
|
|
|
if (global.getDataAttr() &&
|
|
|
|
*global.getDataAttr() == cuf::DataAttribute::Shared)
|
|
|
|
g.setAddrSpace(mlir::NVVM::NVVMMemorySpace::kSharedMemorySpace);
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.eraseOp(global);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-09 14:15:07 +01:00
|
|
|
}
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
bool isFullRange(mlir::DenseIntElementsAttr indexes,
|
|
|
|
fir::SequenceType seqTy) const {
|
|
|
|
auto extents = seqTy.getShape();
|
|
|
|
if (indexes.size() / 2 != static_cast<int64_t>(extents.size()))
|
|
|
|
return false;
|
|
|
|
auto cur_index = indexes.value_begin<int64_t>();
|
|
|
|
for (unsigned i = 0; i < indexes.size(); i += 2) {
|
|
|
|
if (*(cur_index++) != 0)
|
|
|
|
return false;
|
|
|
|
if (*(cur_index++) != extents[i / 2] - 1)
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
2021-11-09 14:15:07 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// TODO: String comparaison should be avoided. Replace linkName with an
|
|
|
|
// enumeration.
|
2022-04-26 13:44:34 -07:00
|
|
|
mlir::LLVM::Linkage
|
2022-12-14 11:39:19 +01:00
|
|
|
convertLinkage(std::optional<llvm::StringRef> optLinkage) const {
|
2022-07-10 15:01:06 -07:00
|
|
|
if (optLinkage) {
|
2022-07-16 00:24:02 -07:00
|
|
|
auto name = *optLinkage;
|
2022-03-02 11:22:07 +00:00
|
|
|
if (name == "internal")
|
|
|
|
return mlir::LLVM::Linkage::Internal;
|
|
|
|
if (name == "linkonce")
|
|
|
|
return mlir::LLVM::Linkage::Linkonce;
|
2022-03-14 10:24:17 +01:00
|
|
|
if (name == "linkonce_odr")
|
|
|
|
return mlir::LLVM::Linkage::LinkonceODR;
|
2022-03-02 11:22:07 +00:00
|
|
|
if (name == "common")
|
|
|
|
return mlir::LLVM::Linkage::Common;
|
|
|
|
if (name == "weak")
|
|
|
|
return mlir::LLVM::Linkage::Weak;
|
|
|
|
}
|
|
|
|
return mlir::LLVM::Linkage::External;
|
2021-11-09 14:15:07 +01:00
|
|
|
}
|
2023-06-26 15:03:17 +01:00
|
|
|
|
|
|
|
private:
|
|
|
|
static void addComdat(mlir::LLVM::GlobalOp &global,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
2024-12-25 09:42:03 +01:00
|
|
|
mlir::ModuleOp module) {
|
2023-06-26 15:03:17 +01:00
|
|
|
const char *comdatName = "__llvm_comdat";
|
|
|
|
mlir::LLVM::ComdatOp comdatOp =
|
|
|
|
module.lookupSymbol<mlir::LLVM::ComdatOp>(comdatName);
|
|
|
|
if (!comdatOp) {
|
|
|
|
comdatOp =
|
|
|
|
rewriter.create<mlir::LLVM::ComdatOp>(module.getLoc(), comdatName);
|
|
|
|
}
|
2024-10-31 18:59:04 -07:00
|
|
|
if (auto select = comdatOp.lookupSymbol<mlir::LLVM::ComdatSelectorOp>(
|
|
|
|
global.getSymName()))
|
|
|
|
return;
|
2023-06-26 15:03:17 +01:00
|
|
|
mlir::OpBuilder::InsertionGuard guard(rewriter);
|
|
|
|
rewriter.setInsertionPointToEnd(&comdatOp.getBody().back());
|
|
|
|
auto selectorOp = rewriter.create<mlir::LLVM::ComdatSelectorOp>(
|
|
|
|
comdatOp.getLoc(), global.getSymName(),
|
|
|
|
mlir::LLVM::comdat::Comdat::Any);
|
|
|
|
global.setComdatAttr(mlir::SymbolRefAttr::get(
|
|
|
|
rewriter.getContext(), comdatName,
|
|
|
|
mlir::FlatSymbolRefAttr::get(selectorOp.getSymNameAttr())));
|
|
|
|
}
|
2021-11-09 14:15:07 +01:00
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// `fir.load` --> `llvm.load`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct LoadOpConversion : public fir::FIROpConversion<fir::LoadOp> {
|
2021-11-09 14:15:07 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::LoadOp load, OpAdaptor adaptor,
|
2021-11-09 14:15:07 +01:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2024-10-30 09:50:27 -07:00
|
|
|
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmLoadTy = convertObjectType(load.getType());
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto boxTy = mlir::dyn_cast<fir::BaseBoxType>(load.getType())) {
|
2024-10-30 09:50:27 -07:00
|
|
|
// fir.box is a special case because it is considered an ssa value in
|
2022-09-14 08:54:00 +02:00
|
|
|
// fir, but it is lowered as a pointer to a descriptor. So
|
|
|
|
// fir.ref<fir.box> and fir.box end up being the same llvm types and
|
|
|
|
// loading a fir.ref<fir.box> is implemented as taking a snapshot of the
|
|
|
|
// descriptor value into a new descriptor temp.
|
|
|
|
auto inputBoxStorage = adaptor.getOperands()[0];
|
2024-12-16 19:12:05 -08:00
|
|
|
mlir::Value newBoxStorage;
|
2022-09-14 08:54:00 +02:00
|
|
|
mlir::Location loc = load.getLoc();
|
2024-12-16 19:12:05 -08:00
|
|
|
if (auto callOp = mlir::dyn_cast_or_null<mlir::LLVM::CallOp>(
|
|
|
|
inputBoxStorage.getDefiningOp())) {
|
|
|
|
if (callOp.getCallee() &&
|
|
|
|
(*callOp.getCallee())
|
2024-12-20 13:57:47 -08:00
|
|
|
.starts_with(RTNAME_STRING(CUFAllocDescriptor))) {
|
2024-12-16 19:12:05 -08:00
|
|
|
// CUDA Fortran local descriptor are allocated in managed memory. So
|
|
|
|
// new storage must be allocated the same way.
|
|
|
|
auto mod = load->getParentOfType<mlir::ModuleOp>();
|
|
|
|
newBoxStorage =
|
|
|
|
genCUFAllocDescriptor(loc, rewriter, mod, boxTy, lowerTy());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!newBoxStorage)
|
|
|
|
newBoxStorage = genAllocaAndAddrCastWithType(loc, llvmLoadTy,
|
|
|
|
defaultAlign, rewriter);
|
2024-10-30 09:50:27 -07:00
|
|
|
|
|
|
|
TypePair boxTypePair{boxTy, llvmLoadTy};
|
|
|
|
mlir::Value boxSize =
|
|
|
|
computeBoxSize(loc, boxTypePair, inputBoxStorage, rewriter);
|
|
|
|
auto memcpy = rewriter.create<mlir::LLVM::MemcpyOp>(
|
|
|
|
loc, newBoxStorage, inputBoxStorage, boxSize, /*isVolatile=*/false);
|
|
|
|
|
|
|
|
if (std::optional<mlir::ArrayAttr> optionalTag = load.getTbaa())
|
|
|
|
memcpy.setTBAATags(*optionalTag);
|
|
|
|
else
|
|
|
|
attachTBAATag(memcpy, boxTy, boxTy, nullptr);
|
[Flang][MLIR] Add basic initial support for alloca and program address space handling in FIR->LLVMIR codegen (#77518)
This is a slightly more slimmed down and up-to-date version of the older
PR from here: https://reviews.llvm.org/D144203, written by @jsjodin,
which has already under gone some review.
This PR places allocas in the alloca address space specified by the
provided data layout (default is 0 for all address spaces, unless
explicitly specified by the layout), and then will cast these alloca's
to the program address space if this address space is different from the
allocation address space. For most architectures data layouts, this will
be a no-op, as they have a flat address space. But in the case of AMDGPU
it will result in allocas being placed in the correct address space (5,
private), and then casted into the correct program address space (0,
generic). This results in correct (partially, a follow up PR will be
forthcoming soon) generation of allocations inside of device code.
This PR is in addition to the work by @skatrak in this PR:
https://github.com/llvm/llvm-project/pull/69599 and adds seperate and
neccesary functionality of casting alloca's from their address space to
the program address space, both are independent PRs, although there is
some minor overlap e.g. this PR incorporates some of the useful helper
functions from 69599, so whichever lands first will need a minor rebase.
Co-author: jsjodin
2024-01-17 17:37:16 +01:00
|
|
|
rewriter.replaceOp(load, newBoxStorage);
|
2022-03-02 11:22:07 +00:00
|
|
|
} else {
|
2023-01-17 09:08:43 -08:00
|
|
|
auto loadOp = rewriter.create<mlir::LLVM::LoadOp>(
|
2023-10-25 09:42:28 +02:00
|
|
|
load.getLoc(), llvmLoadTy, adaptor.getOperands(), load->getAttrs());
|
2023-10-11 15:06:50 +01:00
|
|
|
if (std::optional<mlir::ArrayAttr> optionalTag = load.getTbaa())
|
|
|
|
loadOp.setTBAATags(*optionalTag);
|
|
|
|
else
|
|
|
|
attachTBAATag(loadOp, load.getType(), load.getType(), nullptr);
|
2023-01-17 09:08:43 -08:00
|
|
|
rewriter.replaceOp(load, loadOp.getResult());
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-09 14:15:07 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Lower `fir.no_reassoc` to LLVM IR dialect.
|
|
|
|
/// TODO: how do we want to enforce this in LLVM-IR? Can we manipulate the fast
|
|
|
|
/// math flags?
|
2024-03-22 12:56:45 -07:00
|
|
|
struct NoReassocOpConversion : public fir::FIROpConversion<fir::NoReassocOp> {
|
2021-11-09 14:15:07 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::NoReassocOp noreassoc, OpAdaptor adaptor,
|
2021-11-09 14:15:07 +01:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOp(noreassoc, adaptor.getOperands()[0]);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-09 14:15:07 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
static void genCondBrOp(mlir::Location loc, mlir::Value cmp, mlir::Block *dest,
|
2022-12-14 11:39:19 +01:00
|
|
|
std::optional<mlir::ValueRange> destOps,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
mlir::Block *newBlock) {
|
2022-07-10 15:01:06 -07:00
|
|
|
if (destOps)
|
2022-07-16 00:24:02 -07:00
|
|
|
rewriter.create<mlir::LLVM::CondBrOp>(loc, cmp, dest, *destOps, newBlock,
|
|
|
|
mlir::ValueRange());
|
2022-03-02 11:22:07 +00:00
|
|
|
else
|
|
|
|
rewriter.create<mlir::LLVM::CondBrOp>(loc, cmp, dest, newBlock);
|
|
|
|
}
|
|
|
|
|
|
|
|
template <typename A, typename B>
|
2022-12-14 11:39:19 +01:00
|
|
|
static void genBrOp(A caseOp, mlir::Block *dest, std::optional<B> destOps,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) {
|
2022-07-10 15:01:06 -07:00
|
|
|
if (destOps)
|
2022-07-16 00:24:02 -07:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::BrOp>(caseOp, *destOps, dest);
|
2022-03-02 11:22:07 +00:00
|
|
|
else
|
2022-12-03 12:14:21 -08:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::BrOp>(caseOp, std::nullopt, dest);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void genCaseLadderStep(mlir::Location loc, mlir::Value cmp,
|
|
|
|
mlir::Block *dest,
|
2022-12-14 11:39:19 +01:00
|
|
|
std::optional<mlir::ValueRange> destOps,
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) {
|
|
|
|
auto *thisBlock = rewriter.getInsertionBlock();
|
|
|
|
auto *newBlock = createBlock(rewriter, dest);
|
|
|
|
rewriter.setInsertionPointToEnd(thisBlock);
|
|
|
|
genCondBrOp(loc, cmp, dest, destOps, rewriter, newBlock);
|
|
|
|
rewriter.setInsertionPointToEnd(newBlock);
|
|
|
|
}
|
|
|
|
|
|
|
|
/// Conversion of `fir.select_case`
|
|
|
|
///
|
|
|
|
/// The `fir.select_case` operation is converted to a if-then-else ladder.
|
|
|
|
/// Depending on the case condition type, one or several comparison and
|
|
|
|
/// conditional branching can be generated.
|
|
|
|
///
|
2023-09-01 18:41:05 -07:00
|
|
|
/// A point value case such as `case(4)`, a lower bound case such as
|
2022-03-02 11:22:07 +00:00
|
|
|
/// `case(5:)` or an upper bound case such as `case(:3)` are converted to a
|
|
|
|
/// simple comparison between the selector value and the constant value in the
|
|
|
|
/// case. The block associated with the case condition is then executed if
|
|
|
|
/// the comparison succeed otherwise it branch to the next block with the
|
2023-09-01 18:41:05 -07:00
|
|
|
/// comparison for the next case conditon.
|
2022-03-02 11:22:07 +00:00
|
|
|
///
|
|
|
|
/// A closed interval case condition such as `case(7:10)` is converted with a
|
|
|
|
/// first comparison and conditional branching for the lower bound. If
|
|
|
|
/// successful, it branch to a second block with the comparison for the
|
|
|
|
/// upper bound in the same case condition.
|
|
|
|
///
|
|
|
|
/// TODO: lowering of CHARACTER type cases is not handled yet.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct SelectCaseOpConversion : public fir::FIROpConversion<fir::SelectCaseOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-17 10:34:38 +01:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::SelectCaseOp caseOp, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
unsigned conds = caseOp.getNumConditions();
|
|
|
|
llvm::ArrayRef<mlir::Attribute> cases = caseOp.getCases().getValue();
|
|
|
|
// Type can be CHARACTER, INTEGER, or LOGICAL (C1145)
|
|
|
|
auto ty = caseOp.getSelector().getType();
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::CharacterType>(ty)) {
|
2022-03-02 11:22:07 +00:00
|
|
|
TODO(caseOp.getLoc(), "fir.select_case codegen with character type");
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
mlir::Value selector = caseOp.getSelector(adaptor.getOperands());
|
|
|
|
auto loc = caseOp.getLoc();
|
|
|
|
for (unsigned t = 0; t != conds; ++t) {
|
|
|
|
mlir::Block *dest = caseOp.getSuccessor(t);
|
2022-12-14 11:39:19 +01:00
|
|
|
std::optional<mlir::ValueRange> destOps =
|
2022-03-02 11:22:07 +00:00
|
|
|
caseOp.getSuccessorOperands(adaptor.getOperands(), t);
|
2022-12-14 11:39:19 +01:00
|
|
|
std::optional<mlir::ValueRange> cmpOps =
|
2022-03-02 11:22:07 +00:00
|
|
|
*caseOp.getCompareOperands(adaptor.getOperands(), t);
|
|
|
|
mlir::Attribute attr = cases[t];
|
2024-05-22 10:52:17 -05:00
|
|
|
assert(mlir::isa<mlir::UnitAttr>(attr) || cmpOps.has_value());
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::PointIntervalAttr>(attr)) {
|
2022-03-02 11:22:07 +00:00
|
|
|
auto cmp = rewriter.create<mlir::LLVM::ICmpOp>(
|
2024-05-22 10:52:17 -05:00
|
|
|
loc, mlir::LLVM::ICmpPredicate::eq, selector, cmpOps->front());
|
2022-03-02 11:22:07 +00:00
|
|
|
genCaseLadderStep(loc, cmp, dest, destOps, rewriter);
|
|
|
|
continue;
|
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::LowerBoundAttr>(attr)) {
|
2022-03-02 11:22:07 +00:00
|
|
|
auto cmp = rewriter.create<mlir::LLVM::ICmpOp>(
|
2024-05-22 10:52:17 -05:00
|
|
|
loc, mlir::LLVM::ICmpPredicate::sle, cmpOps->front(), selector);
|
2022-03-02 11:22:07 +00:00
|
|
|
genCaseLadderStep(loc, cmp, dest, destOps, rewriter);
|
|
|
|
continue;
|
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::UpperBoundAttr>(attr)) {
|
2022-03-02 11:22:07 +00:00
|
|
|
auto cmp = rewriter.create<mlir::LLVM::ICmpOp>(
|
2024-05-22 10:52:17 -05:00
|
|
|
loc, mlir::LLVM::ICmpPredicate::sle, selector, cmpOps->front());
|
2022-03-02 11:22:07 +00:00
|
|
|
genCaseLadderStep(loc, cmp, dest, destOps, rewriter);
|
|
|
|
continue;
|
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::ClosedIntervalAttr>(attr)) {
|
2024-05-22 10:52:17 -05:00
|
|
|
mlir::Value caseArg0 = *cmpOps->begin();
|
|
|
|
auto cmp0 = rewriter.create<mlir::LLVM::ICmpOp>(
|
|
|
|
loc, mlir::LLVM::ICmpPredicate::sle, caseArg0, selector);
|
2022-03-02 11:22:07 +00:00
|
|
|
auto *thisBlock = rewriter.getInsertionBlock();
|
|
|
|
auto *newBlock1 = createBlock(rewriter, dest);
|
|
|
|
auto *newBlock2 = createBlock(rewriter, dest);
|
|
|
|
rewriter.setInsertionPointToEnd(thisBlock);
|
2024-05-22 10:52:17 -05:00
|
|
|
rewriter.create<mlir::LLVM::CondBrOp>(loc, cmp0, newBlock1, newBlock2);
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.setInsertionPointToEnd(newBlock1);
|
2024-05-22 10:52:17 -05:00
|
|
|
mlir::Value caseArg1 = *(cmpOps->begin() + 1);
|
|
|
|
auto cmp1 = rewriter.create<mlir::LLVM::ICmpOp>(
|
|
|
|
loc, mlir::LLVM::ICmpPredicate::sle, selector, caseArg1);
|
|
|
|
genCondBrOp(loc, cmp1, dest, destOps, rewriter, newBlock2);
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.setInsertionPointToEnd(newBlock2);
|
|
|
|
continue;
|
|
|
|
}
|
2024-04-28 22:01:42 +02:00
|
|
|
assert(mlir::isa<mlir::UnitAttr>(attr));
|
2022-03-02 11:22:07 +00:00
|
|
|
assert((t + 1 == conds) && "unit must be last");
|
|
|
|
genBrOp(caseOp, dest, destOps, rewriter);
|
|
|
|
}
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-17 10:34:38 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2024-12-20 13:46:45 +01:00
|
|
|
/// Helper function for converting select ops. This function converts the
|
|
|
|
/// signature of the given block. If the new block signature is different from
|
|
|
|
/// `expectedTypes`, returns "failure".
|
|
|
|
static llvm::FailureOr<mlir::Block *>
|
|
|
|
getConvertedBlock(mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
const mlir::TypeConverter *converter,
|
|
|
|
mlir::Operation *branchOp, mlir::Block *block,
|
|
|
|
mlir::TypeRange expectedTypes) {
|
|
|
|
assert(converter && "expected non-null type converter");
|
|
|
|
assert(!block->isEntryBlock() && "entry blocks have no predecessors");
|
|
|
|
|
|
|
|
// There is nothing to do if the types already match.
|
|
|
|
if (block->getArgumentTypes() == expectedTypes)
|
|
|
|
return block;
|
|
|
|
|
|
|
|
// Compute the new block argument types and convert the block.
|
|
|
|
std::optional<mlir::TypeConverter::SignatureConversion> conversion =
|
|
|
|
converter->convertBlockSignature(block);
|
|
|
|
if (!conversion)
|
|
|
|
return rewriter.notifyMatchFailure(branchOp,
|
|
|
|
"could not compute block signature");
|
|
|
|
if (expectedTypes != conversion->getConvertedTypes())
|
|
|
|
return rewriter.notifyMatchFailure(
|
|
|
|
branchOp,
|
|
|
|
"mismatch between adaptor operand types and computed block signature");
|
|
|
|
return rewriter.applySignatureConversion(block, *conversion, converter);
|
|
|
|
}
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
template <typename OP>
|
2024-12-20 13:46:45 +01:00
|
|
|
static llvm::LogicalResult
|
|
|
|
selectMatchAndRewrite(const fir::LLVMTypeConverter &lowering, OP select,
|
|
|
|
typename OP::Adaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
|
|
|
const mlir::TypeConverter *converter) {
|
2022-03-02 11:22:07 +00:00
|
|
|
unsigned conds = select.getNumConditions();
|
|
|
|
auto cases = select.getCases().getValue();
|
|
|
|
mlir::Value selector = adaptor.getSelector();
|
|
|
|
auto loc = select.getLoc();
|
|
|
|
assert(conds > 0 && "select must have cases");
|
2021-11-17 10:34:38 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
llvm::SmallVector<mlir::Block *> destinations;
|
|
|
|
llvm::SmallVector<mlir::ValueRange> destinationsOperands;
|
|
|
|
mlir::Block *defaultDestination;
|
|
|
|
mlir::ValueRange defaultOperands;
|
|
|
|
llvm::SmallVector<int32_t> caseValues;
|
2021-11-17 10:34:38 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
for (unsigned t = 0; t != conds; ++t) {
|
|
|
|
mlir::Block *dest = select.getSuccessor(t);
|
|
|
|
auto destOps = select.getSuccessorOperands(adaptor.getOperands(), t);
|
|
|
|
const mlir::Attribute &attr = cases[t];
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto intAttr = mlir::dyn_cast<mlir::IntegerAttr>(attr)) {
|
2022-07-10 15:01:06 -07:00
|
|
|
destinationsOperands.push_back(destOps ? *destOps : mlir::ValueRange{});
|
2024-12-20 13:46:45 +01:00
|
|
|
auto convertedBlock =
|
|
|
|
getConvertedBlock(rewriter, converter, select, dest,
|
|
|
|
mlir::TypeRange(destinationsOperands.back()));
|
|
|
|
if (mlir::failed(convertedBlock))
|
|
|
|
return mlir::failure();
|
|
|
|
destinations.push_back(*convertedBlock);
|
2022-03-02 11:22:07 +00:00
|
|
|
caseValues.push_back(intAttr.getInt());
|
|
|
|
continue;
|
|
|
|
}
|
2024-04-29 09:16:22 +02:00
|
|
|
assert(mlir::dyn_cast_or_null<mlir::UnitAttr>(attr));
|
2022-03-02 11:22:07 +00:00
|
|
|
assert((t + 1 == conds) && "unit must be last");
|
2022-07-10 15:01:06 -07:00
|
|
|
defaultOperands = destOps ? *destOps : mlir::ValueRange{};
|
2024-12-20 13:46:45 +01:00
|
|
|
auto convertedBlock = getConvertedBlock(rewriter, converter, select, dest,
|
|
|
|
mlir::TypeRange(defaultOperands));
|
|
|
|
if (mlir::failed(convertedBlock))
|
|
|
|
return mlir::failure();
|
|
|
|
defaultDestination = *convertedBlock;
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2021-11-17 10:34:38 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
// LLVM::SwitchOp takes a i32 type for the selector.
|
|
|
|
if (select.getSelector().getType() != rewriter.getI32Type())
|
2022-04-26 13:44:34 -07:00
|
|
|
selector = rewriter.create<mlir::LLVM::TruncOp>(loc, rewriter.getI32Type(),
|
|
|
|
selector);
|
2021-11-17 10:34:38 +01:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::SwitchOp>(
|
|
|
|
select, selector,
|
|
|
|
/*defaultDestination=*/defaultDestination,
|
|
|
|
/*defaultOperands=*/defaultOperands,
|
|
|
|
/*caseValues=*/caseValues,
|
|
|
|
/*caseDestinations=*/destinations,
|
|
|
|
/*caseOperands=*/destinationsOperands,
|
2022-04-26 13:44:34 -07:00
|
|
|
/*branchWeights=*/llvm::ArrayRef<std::int32_t>());
|
2024-12-20 13:46:45 +01:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/// conversion of fir::SelectOp to an if-then-else ladder
|
2024-03-22 12:56:45 -07:00
|
|
|
struct SelectOpConversion : public fir::FIROpConversion<fir::SelectOp> {
|
2021-11-08 11:35:48 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::SelectOp op, OpAdaptor adaptor,
|
2021-11-08 11:35:48 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2024-12-20 13:46:45 +01:00
|
|
|
return selectMatchAndRewrite<fir::SelectOp>(lowerTy(), op, adaptor,
|
|
|
|
rewriter, getTypeConverter());
|
2021-11-08 11:35:48 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-11 13:14:01 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// conversion of fir::SelectRankOp to an if-then-else ladder
|
2024-03-22 12:56:45 -07:00
|
|
|
struct SelectRankOpConversion : public fir::FIROpConversion<fir::SelectRankOp> {
|
2021-11-11 13:14:01 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::SelectRankOp op, OpAdaptor adaptor,
|
2021-11-11 13:14:01 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2024-12-20 13:46:45 +01:00
|
|
|
return selectMatchAndRewrite<fir::SelectRankOp>(
|
|
|
|
lowerTy(), op, adaptor, rewriter, getTypeConverter());
|
2021-11-11 13:14:01 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-10 13:24:56 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Lower `fir.select_type` to LLVM IR dialect.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct SelectTypeOpConversion : public fir::FIROpConversion<fir::SelectTypeOp> {
|
2021-11-12 13:25:42 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::SelectTypeOp select, OpAdaptor adaptor,
|
2021-11-12 13:25:42 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::emitError(select.getLoc(),
|
|
|
|
"fir.select_type should have already been converted");
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-12 13:25:42 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// `fir.store` --> `llvm.store`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct StoreOpConversion : public fir::FIROpConversion<fir::StoreOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-12 13:25:42 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::StoreOp store, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2023-01-17 09:08:43 -08:00
|
|
|
mlir::Location loc = store.getLoc();
|
|
|
|
mlir::Type storeTy = store.getValue().getType();
|
2024-06-19 10:12:19 +02:00
|
|
|
mlir::Value llvmValue = adaptor.getValue();
|
|
|
|
mlir::Value llvmMemref = adaptor.getMemref();
|
|
|
|
mlir::LLVM::AliasAnalysisOpInterface newOp;
|
2024-04-28 22:01:42 +02:00
|
|
|
if (auto boxTy = mlir::dyn_cast<fir::BaseBoxType>(storeTy)) {
|
2023-10-25 09:42:28 +02:00
|
|
|
mlir::Type llvmBoxTy = lowerTy().convertBoxTypeAsStruct(boxTy);
|
2024-10-30 09:50:27 -07:00
|
|
|
// Always use memcpy because LLVM is not as effective at optimizing
|
|
|
|
// aggregate loads/stores as it is optimizing memcpy.
|
|
|
|
TypePair boxTypePair{boxTy, llvmBoxTy};
|
|
|
|
mlir::Value boxSize =
|
|
|
|
computeBoxSize(loc, boxTypePair, llvmValue, rewriter);
|
|
|
|
newOp = rewriter.create<mlir::LLVM::MemcpyOp>(
|
|
|
|
loc, llvmMemref, llvmValue, boxSize, /*isVolatile=*/false);
|
2022-03-02 11:22:07 +00:00
|
|
|
} else {
|
2024-06-19 10:12:19 +02:00
|
|
|
newOp = rewriter.create<mlir::LLVM::StoreOp>(loc, llvmValue, llvmMemref);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
2023-10-11 15:06:50 +01:00
|
|
|
if (std::optional<mlir::ArrayAttr> optionalTag = store.getTbaa())
|
2024-06-19 10:12:19 +02:00
|
|
|
newOp.setTBAATags(*optionalTag);
|
2023-10-11 15:06:50 +01:00
|
|
|
else
|
2024-06-19 10:12:19 +02:00
|
|
|
attachTBAATag(newOp, storeTy, storeTy, nullptr);
|
2023-01-17 09:08:43 -08:00
|
|
|
rewriter.eraseOp(store);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-12 13:25:42 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2025-03-11 09:31:03 +01:00
|
|
|
/// `fir.copy` --> `llvm.memcpy` or `llvm.memmove`
|
|
|
|
struct CopyOpConversion : public fir::FIROpConversion<fir::CopyOp> {
|
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
|
|
|
llvm::LogicalResult
|
|
|
|
matchAndRewrite(fir::CopyOp copy, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Location loc = copy.getLoc();
|
|
|
|
mlir::Value llvmSource = adaptor.getSource();
|
|
|
|
mlir::Value llvmDestination = adaptor.getDestination();
|
|
|
|
mlir::Type i64Ty = mlir::IntegerType::get(rewriter.getContext(), 64);
|
|
|
|
mlir::Type copyTy = fir::unwrapRefType(copy.getSource().getType());
|
|
|
|
mlir::Value copySize =
|
|
|
|
genTypeStrideInBytes(loc, i64Ty, rewriter, convertType(copyTy));
|
|
|
|
|
|
|
|
mlir::LLVM::AliasAnalysisOpInterface newOp;
|
|
|
|
if (copy.getNoOverlap())
|
|
|
|
newOp = rewriter.create<mlir::LLVM::MemcpyOp>(
|
|
|
|
loc, llvmDestination, llvmSource, copySize, /*isVolatile=*/false);
|
|
|
|
else
|
|
|
|
newOp = rewriter.create<mlir::LLVM::MemmoveOp>(
|
|
|
|
loc, llvmDestination, llvmSource, copySize, /*isVolatile=*/false);
|
|
|
|
|
|
|
|
// TODO: propagate TBAA once FirAliasTagOpInterface added to CopyOp.
|
|
|
|
attachTBAATag(newOp, copyTy, copyTy, nullptr);
|
|
|
|
rewriter.eraseOp(copy);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
namespace {
|
|
|
|
|
2021-11-10 13:24:56 +00:00
|
|
|
/// Convert `fir.unboxchar` into two `llvm.extractvalue` instructions. One for
|
|
|
|
/// the character buffer and one for the buffer length.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct UnboxCharOpConversion : public fir::FIROpConversion<fir::UnboxCharOp> {
|
2021-11-10 13:24:56 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-10 13:24:56 +00:00
|
|
|
matchAndRewrite(fir::UnboxCharOp unboxchar, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Type lenTy = convertType(unboxchar.getType(1));
|
|
|
|
mlir::Value tuple = adaptor.getOperands()[0];
|
|
|
|
|
|
|
|
mlir::Location loc = unboxchar.getLoc();
|
|
|
|
mlir::Value ptrToBuffer =
|
2022-08-09 22:07:35 -04:00
|
|
|
rewriter.create<mlir::LLVM::ExtractValueOp>(loc, tuple, 0);
|
2021-11-10 13:24:56 +00:00
|
|
|
|
2022-08-09 22:07:35 -04:00
|
|
|
auto len = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, tuple, 1);
|
2021-11-10 13:24:56 +00:00
|
|
|
mlir::Value lenAfterCast = integerCast(loc, rewriter, lenTy, len);
|
|
|
|
|
|
|
|
rewriter.replaceOp(unboxchar,
|
2022-04-26 13:44:34 -07:00
|
|
|
llvm::ArrayRef<mlir::Value>{ptrToBuffer, lenAfterCast});
|
|
|
|
return mlir::success();
|
2021-11-10 13:24:56 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2021-11-18 11:26:53 +00:00
|
|
|
/// Lower `fir.unboxproc` operation. Unbox a procedure box value, yielding its
|
|
|
|
/// components.
|
|
|
|
/// TODO: Part of supporting Fortran 2003 procedure pointers.
|
2024-03-22 12:56:45 -07:00
|
|
|
struct UnboxProcOpConversion : public fir::FIROpConversion<fir::UnboxProcOp> {
|
2021-11-18 11:26:53 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2021-11-18 11:26:53 +00:00
|
|
|
matchAndRewrite(fir::UnboxProcOp unboxproc, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2021-12-01 22:12:12 +00:00
|
|
|
TODO(unboxproc.getLoc(), "fir.unboxproc codegen");
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::failure();
|
2021-11-18 11:26:53 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// convert to LLVM IR dialect `undef`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct UndefOpConversion : public fir::FIROpConversion<fir::UndefOp> {
|
2021-11-16 08:36:05 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::UndefOp undef, OpAdaptor,
|
2021-11-16 08:36:05 +00:00
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2025-02-20 18:49:23 -08:00
|
|
|
if (mlir::isa<fir::DummyScopeType>(undef.getType())) {
|
|
|
|
// Dummy scoping is used for Fortran analyses like AA. Once it gets to
|
|
|
|
// pre-codegen rewrite it is erased and a fir.undef is created to
|
|
|
|
// feed to the fir declare operation. Thus, during codegen, we can
|
|
|
|
// simply erase is as it is no longer used.
|
|
|
|
rewriter.eraseOp(undef);
|
|
|
|
return mlir::success();
|
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::UndefOp>(
|
|
|
|
undef, convertType(undef.getType()));
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-16 08:36:05 +00:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2024-03-22 12:56:45 -07:00
|
|
|
struct ZeroOpConversion : public fir::FIROpConversion<fir::ZeroOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::ZeroOp zero, OpAdaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Type ty = convertType(zero.getType());
|
2023-09-29 08:51:30 +02:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ZeroOp>(zero, ty);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-17 10:03:19 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
};
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// `fir.unreachable` --> `llvm.unreachable`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct UnreachableOpConversion
|
|
|
|
: public fir::FIROpConversion<fir::UnreachableOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::UnreachableOp unreach, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::UnreachableOp>(unreach);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-17 10:03:19 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
};
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// `fir.is_present` -->
|
|
|
|
/// ```
|
|
|
|
/// %0 = llvm.mlir.constant(0 : i64)
|
|
|
|
/// %1 = llvm.ptrtoint %0
|
|
|
|
/// %2 = llvm.icmp "ne" %1, %0 : i64
|
|
|
|
/// ```
|
2024-03-22 12:56:45 -07:00
|
|
|
struct IsPresentOpConversion : public fir::FIROpConversion<fir::IsPresentOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::IsPresentOp isPresent, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Type idxTy = lowerTy().indexType();
|
|
|
|
mlir::Location loc = isPresent.getLoc();
|
|
|
|
auto ptr = adaptor.getOperands()[0];
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2024-04-28 22:01:42 +02:00
|
|
|
if (mlir::isa<fir::BoxCharType>(isPresent.getVal().getType())) {
|
2022-08-31 10:16:29 +02:00
|
|
|
[[maybe_unused]] auto structTy =
|
2024-04-28 22:01:42 +02:00
|
|
|
mlir::cast<mlir::LLVM::LLVMStructType>(ptr.getType());
|
2022-03-02 11:22:07 +00:00
|
|
|
assert(!structTy.isOpaque() && !structTy.getBody().empty());
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2022-08-09 22:07:35 -04:00
|
|
|
ptr = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, ptr, 0);
|
2021-11-23 18:13:51 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::LLVM::ConstantOp c0 =
|
|
|
|
genConstantIndex(isPresent.getLoc(), idxTy, rewriter, 0);
|
|
|
|
auto addr = rewriter.create<mlir::LLVM::PtrToIntOp>(loc, idxTy, ptr);
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ICmpOp>(
|
|
|
|
isPresent, mlir::LLVM::ICmpPredicate::ne, addr, c0);
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-23 18:13:51 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
};
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Create value signaling an absent optional argument in a call, e.g.
|
2023-09-25 11:11:52 +02:00
|
|
|
/// `fir.absent !fir.ref<i64>` --> `llvm.mlir.zero : !llvm.ptr<i64>`
|
2024-03-22 12:56:45 -07:00
|
|
|
struct AbsentOpConversion : public fir::FIROpConversion<fir::AbsentOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::AbsentOp absent, OpAdaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
mlir::Type ty = convertType(absent.getType());
|
2024-10-17 13:25:09 +02:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::ZeroOp>(absent, ty);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
//
|
|
|
|
// Primitive operations on Complex types
|
|
|
|
//
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2023-10-31 16:15:13 +00:00
|
|
|
template <typename OPTY>
|
|
|
|
static inline mlir::LLVM::FastmathFlagsAttr getLLVMFMFAttr(OPTY op) {
|
|
|
|
return mlir::LLVM::FastmathFlagsAttr::get(
|
|
|
|
op.getContext(),
|
|
|
|
mlir::arith::convertArithFastMathFlagsToLLVM(op.getFastmath()));
|
|
|
|
}
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Generate inline code for complex addition/subtraction
|
|
|
|
template <typename LLVMOP, typename OPTY>
|
|
|
|
static mlir::LLVM::InsertValueOp
|
|
|
|
complexSum(OPTY sumop, mlir::ValueRange opnds,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter,
|
2023-08-14 08:40:13 +02:00
|
|
|
const fir::LLVMTypeConverter &lowering) {
|
2023-10-31 16:15:13 +00:00
|
|
|
mlir::LLVM::FastmathFlagsAttr fmf = getLLVMFMFAttr(sumop);
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value a = opnds[0];
|
|
|
|
mlir::Value b = opnds[1];
|
|
|
|
auto loc = sumop.getLoc();
|
|
|
|
mlir::Type eleTy = lowering.convertType(getComplexEleTy(sumop.getType()));
|
|
|
|
mlir::Type ty = lowering.convertType(sumop.getType());
|
2022-08-09 22:07:35 -04:00
|
|
|
auto x0 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, a, 0);
|
|
|
|
auto y0 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, a, 1);
|
|
|
|
auto x1 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, b, 0);
|
|
|
|
auto y1 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, b, 1);
|
2023-10-31 16:15:13 +00:00
|
|
|
auto rx = rewriter.create<LLVMOP>(loc, eleTy, x0, x1, fmf);
|
|
|
|
auto ry = rewriter.create<LLVMOP>(loc, eleTy, y0, y1, fmf);
|
2022-03-02 11:22:07 +00:00
|
|
|
auto r0 = rewriter.create<mlir::LLVM::UndefOp>(loc, ty);
|
2022-08-09 22:07:35 -04:00
|
|
|
auto r1 = rewriter.create<mlir::LLVM::InsertValueOp>(loc, r0, rx, 0);
|
|
|
|
return rewriter.create<mlir::LLVM::InsertValueOp>(loc, r1, ry, 1);
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
} // namespace
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
namespace {
|
2024-03-22 12:56:45 -07:00
|
|
|
struct AddcOpConversion : public fir::FIROpConversion<fir::AddcOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::AddcOp addc, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
// given: (x + iy) + (x' + iy')
|
|
|
|
// result: (x + x') + i(y + y')
|
|
|
|
auto r = complexSum<mlir::LLVM::FAddOp>(addc, adaptor.getOperands(),
|
|
|
|
rewriter, lowerTy());
|
|
|
|
rewriter.replaceOp(addc, r.getResult());
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2021-11-17 10:03:19 +00:00
|
|
|
}
|
2022-03-02 11:22:07 +00:00
|
|
|
};
|
|
|
|
|
2024-03-22 12:56:45 -07:00
|
|
|
struct SubcOpConversion : public fir::FIROpConversion<fir::SubcOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-17 10:03:19 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::SubcOp subc, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
// given: (x + iy) - (x' + iy')
|
|
|
|
// result: (x - x') + i(y - y')
|
|
|
|
auto r = complexSum<mlir::LLVM::FSubOp>(subc, adaptor.getOperands(),
|
|
|
|
rewriter, lowerTy());
|
|
|
|
rewriter.replaceOp(subc, r.getResult());
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Inlined complex multiply
|
2024-03-22 12:56:45 -07:00
|
|
|
struct MulcOpConversion : public fir::FIROpConversion<fir::MulcOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::MulcOp mulc, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
// TODO: Can we use a call to __muldc3 ?
|
|
|
|
// given: (x + iy) * (x' + iy')
|
|
|
|
// result: (xx'-yy')+i(xy'+yx')
|
2023-10-31 16:15:13 +00:00
|
|
|
mlir::LLVM::FastmathFlagsAttr fmf = getLLVMFMFAttr(mulc);
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value a = adaptor.getOperands()[0];
|
|
|
|
mlir::Value b = adaptor.getOperands()[1];
|
|
|
|
auto loc = mulc.getLoc();
|
|
|
|
mlir::Type eleTy = convertType(getComplexEleTy(mulc.getType()));
|
|
|
|
mlir::Type ty = convertType(mulc.getType());
|
2022-08-09 22:07:35 -04:00
|
|
|
auto x0 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, a, 0);
|
|
|
|
auto y0 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, a, 1);
|
|
|
|
auto x1 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, b, 0);
|
|
|
|
auto y1 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, b, 1);
|
2023-10-31 16:15:13 +00:00
|
|
|
auto xx = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, x0, x1, fmf);
|
|
|
|
auto yx = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, y0, x1, fmf);
|
|
|
|
auto xy = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, x0, y1, fmf);
|
|
|
|
auto ri = rewriter.create<mlir::LLVM::FAddOp>(loc, eleTy, xy, yx, fmf);
|
|
|
|
auto yy = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, y0, y1, fmf);
|
|
|
|
auto rr = rewriter.create<mlir::LLVM::FSubOp>(loc, eleTy, xx, yy, fmf);
|
2022-03-02 11:22:07 +00:00
|
|
|
auto ra = rewriter.create<mlir::LLVM::UndefOp>(loc, ty);
|
2022-08-09 22:07:35 -04:00
|
|
|
auto r1 = rewriter.create<mlir::LLVM::InsertValueOp>(loc, ra, rr, 0);
|
|
|
|
auto r0 = rewriter.create<mlir::LLVM::InsertValueOp>(loc, r1, ri, 1);
|
2022-03-02 11:22:07 +00:00
|
|
|
rewriter.replaceOp(mulc, r0.getResult());
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2023-04-18 11:08:16 +00:00
|
|
|
/// Inlined complex division
|
2024-03-22 12:56:45 -07:00
|
|
|
struct DivcOpConversion : public fir::FIROpConversion<fir::DivcOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::DivcOp divc, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
2023-04-18 11:08:16 +00:00
|
|
|
// TODO: Can we use a call to __divdc3 instead?
|
|
|
|
// Just generate inline code for now.
|
2022-03-02 11:22:07 +00:00
|
|
|
// given: (x + iy) / (x' + iy')
|
|
|
|
// result: ((xx'+yy')/d) + i((yx'-xy')/d) where d = x'x' + y'y'
|
2023-10-31 16:15:13 +00:00
|
|
|
mlir::LLVM::FastmathFlagsAttr fmf = getLLVMFMFAttr(divc);
|
2022-03-02 11:22:07 +00:00
|
|
|
mlir::Value a = adaptor.getOperands()[0];
|
|
|
|
mlir::Value b = adaptor.getOperands()[1];
|
|
|
|
auto loc = divc.getLoc();
|
|
|
|
mlir::Type eleTy = convertType(getComplexEleTy(divc.getType()));
|
2023-04-18 11:08:16 +00:00
|
|
|
mlir::Type ty = convertType(divc.getType());
|
2022-08-09 22:07:35 -04:00
|
|
|
auto x0 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, a, 0);
|
|
|
|
auto y0 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, a, 1);
|
|
|
|
auto x1 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, b, 0);
|
|
|
|
auto y1 = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, b, 1);
|
2023-10-31 16:15:13 +00:00
|
|
|
auto xx = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, x0, x1, fmf);
|
|
|
|
auto x1x1 = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, x1, x1, fmf);
|
|
|
|
auto yx = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, y0, x1, fmf);
|
|
|
|
auto xy = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, x0, y1, fmf);
|
|
|
|
auto yy = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, y0, y1, fmf);
|
|
|
|
auto y1y1 = rewriter.create<mlir::LLVM::FMulOp>(loc, eleTy, y1, y1, fmf);
|
|
|
|
auto d = rewriter.create<mlir::LLVM::FAddOp>(loc, eleTy, x1x1, y1y1, fmf);
|
|
|
|
auto rrn = rewriter.create<mlir::LLVM::FAddOp>(loc, eleTy, xx, yy, fmf);
|
|
|
|
auto rin = rewriter.create<mlir::LLVM::FSubOp>(loc, eleTy, yx, xy, fmf);
|
|
|
|
auto rr = rewriter.create<mlir::LLVM::FDivOp>(loc, eleTy, rrn, d, fmf);
|
|
|
|
auto ri = rewriter.create<mlir::LLVM::FDivOp>(loc, eleTy, rin, d, fmf);
|
2023-04-18 11:08:16 +00:00
|
|
|
auto ra = rewriter.create<mlir::LLVM::UndefOp>(loc, ty);
|
|
|
|
auto r1 = rewriter.create<mlir::LLVM::InsertValueOp>(loc, ra, rr, 0);
|
|
|
|
auto r0 = rewriter.create<mlir::LLVM::InsertValueOp>(loc, r1, ri, 1);
|
|
|
|
rewriter.replaceOp(divc, r0.getResult());
|
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Inlined complex negation
|
2024-03-22 12:56:45 -07:00
|
|
|
struct NegcOpConversion : public fir::FIROpConversion<fir::NegcOp> {
|
2022-03-02 11:22:07 +00:00
|
|
|
using FIROpConversion::FIROpConversion;
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(fir::NegcOp neg, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
// given: -(x + iy)
|
|
|
|
// result: -x - iy
|
|
|
|
auto eleTy = convertType(getComplexEleTy(neg.getType()));
|
|
|
|
auto loc = neg.getLoc();
|
|
|
|
mlir::Value o0 = adaptor.getOperands()[0];
|
2022-08-09 22:07:35 -04:00
|
|
|
auto rp = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, o0, 0);
|
|
|
|
auto ip = rewriter.create<mlir::LLVM::ExtractValueOp>(loc, o0, 1);
|
2022-03-02 11:22:07 +00:00
|
|
|
auto nrp = rewriter.create<mlir::LLVM::FNegOp>(loc, eleTy, rp);
|
|
|
|
auto nip = rewriter.create<mlir::LLVM::FNegOp>(loc, eleTy, ip);
|
2022-08-09 22:07:35 -04:00
|
|
|
auto r = rewriter.create<mlir::LLVM::InsertValueOp>(loc, o0, nrp, 0);
|
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::InsertValueOp>(neg, r, nip, 1);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2024-03-22 12:56:45 -07:00
|
|
|
struct BoxOffsetOpConversion : public fir::FIROpConversion<fir::BoxOffsetOp> {
|
2023-11-29 10:27:27 +01:00
|
|
|
using FIROpConversion::FIROpConversion;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2023-11-29 10:27:27 +01:00
|
|
|
matchAndRewrite(fir::BoxOffsetOp boxOffset, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const override {
|
|
|
|
|
|
|
|
mlir::Type pty = ::getLlvmPtrType(boxOffset.getContext());
|
|
|
|
mlir::Type boxType = fir::unwrapRefType(boxOffset.getBoxRef().getType());
|
|
|
|
mlir::Type llvmBoxTy =
|
|
|
|
lowerTy().convertBoxTypeAsStruct(mlir::cast<fir::BaseBoxType>(boxType));
|
2023-11-29 18:00:40 +01:00
|
|
|
int fieldId = boxOffset.getField() == fir::BoxFieldAttr::derived_type
|
|
|
|
? getTypeDescFieldId(boxType)
|
|
|
|
: kAddrPosInBox;
|
2023-11-29 10:27:27 +01:00
|
|
|
rewriter.replaceOpWithNewOp<mlir::LLVM::GEPOp>(
|
|
|
|
boxOffset, pty, llvmBoxTy, adaptor.getBoxRef(),
|
|
|
|
llvm::ArrayRef<mlir::LLVM::GEPArg>{0, fieldId});
|
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
/// Conversion pattern for operation that must be dead. The information in these
|
|
|
|
/// operations is used by other operation. At this point they should not have
|
|
|
|
/// anymore uses.
|
|
|
|
/// These operations are normally dead after the pre-codegen pass.
|
|
|
|
template <typename FromOp>
|
2024-03-22 12:56:45 -07:00
|
|
|
struct MustBeDeadConversion : public fir::FIROpConversion<FromOp> {
|
2023-08-14 08:40:13 +02:00
|
|
|
explicit MustBeDeadConversion(const fir::LLVMTypeConverter &lowering,
|
2023-03-21 16:32:26 -07:00
|
|
|
const fir::FIRToLLVMPassOptions &options)
|
2024-03-22 12:56:45 -07:00
|
|
|
: fir::FIROpConversion<FromOp>(lowering, options) {}
|
2022-03-02 11:22:07 +00:00
|
|
|
using OpAdaptor = typename FromOp::Adaptor;
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-03-02 11:22:07 +00:00
|
|
|
matchAndRewrite(FromOp op, OpAdaptor adaptor,
|
|
|
|
mlir::ConversionPatternRewriter &rewriter) const final {
|
|
|
|
if (!op->getUses().empty())
|
|
|
|
return rewriter.notifyMatchFailure(op, "op must be dead");
|
|
|
|
rewriter.eraseOp(op);
|
2022-04-26 13:44:34 -07:00
|
|
|
return mlir::success();
|
2022-03-02 11:22:07 +00:00
|
|
|
}
|
|
|
|
};
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
struct ShapeOpConversion : public MustBeDeadConversion<fir::ShapeOp> {
|
|
|
|
using MustBeDeadConversion::MustBeDeadConversion;
|
|
|
|
};
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
struct ShapeShiftOpConversion : public MustBeDeadConversion<fir::ShapeShiftOp> {
|
|
|
|
using MustBeDeadConversion::MustBeDeadConversion;
|
|
|
|
};
|
2021-11-23 18:13:51 +00:00
|
|
|
|
2022-03-02 11:22:07 +00:00
|
|
|
struct ShiftOpConversion : public MustBeDeadConversion<fir::ShiftOp> {
|
|
|
|
using MustBeDeadConversion::MustBeDeadConversion;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct SliceOpConversion : public MustBeDeadConversion<fir::SliceOp> {
|
|
|
|
using MustBeDeadConversion::MustBeDeadConversion;
|
2021-11-17 10:03:19 +00:00
|
|
|
};
|
|
|
|
|
2021-10-29 23:20:50 +02:00
|
|
|
} // namespace
|
|
|
|
|
2022-10-11 12:38:08 +00:00
|
|
|
namespace {
|
|
|
|
class RenameMSVCLibmCallees
|
|
|
|
: public mlir::OpRewritePattern<mlir::LLVM::CallOp> {
|
|
|
|
public:
|
|
|
|
using OpRewritePattern::OpRewritePattern;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-10-11 12:38:08 +00:00
|
|
|
matchAndRewrite(mlir::LLVM::CallOp op,
|
|
|
|
mlir::PatternRewriter &rewriter) const override {
|
2024-01-17 11:08:59 +01:00
|
|
|
rewriter.startOpModification(op);
|
2022-10-11 12:38:08 +00:00
|
|
|
auto callee = op.getCallee();
|
|
|
|
if (callee)
|
2024-05-12 23:08:40 -07:00
|
|
|
if (*callee == "hypotf")
|
2022-10-11 12:38:08 +00:00
|
|
|
op.setCalleeAttr(mlir::SymbolRefAttr::get(op.getContext(), "_hypotf"));
|
|
|
|
|
2024-01-17 11:08:59 +01:00
|
|
|
rewriter.finalizeOpModification(op);
|
2022-10-11 12:38:08 +00:00
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
class RenameMSVCLibmFuncs
|
|
|
|
: public mlir::OpRewritePattern<mlir::LLVM::LLVMFuncOp> {
|
|
|
|
public:
|
|
|
|
using OpRewritePattern::OpRewritePattern;
|
|
|
|
|
2024-07-02 10:42:33 +01:00
|
|
|
llvm::LogicalResult
|
2022-10-11 12:38:08 +00:00
|
|
|
matchAndRewrite(mlir::LLVM::LLVMFuncOp op,
|
|
|
|
mlir::PatternRewriter &rewriter) const override {
|
2024-01-17 11:08:59 +01:00
|
|
|
rewriter.startOpModification(op);
|
2024-05-12 23:08:40 -07:00
|
|
|
if (op.getSymName() == "hypotf")
|
2022-10-11 12:38:08 +00:00
|
|
|
op.setSymNameAttr(rewriter.getStringAttr("_hypotf"));
|
2024-01-17 11:08:59 +01:00
|
|
|
rewriter.finalizeOpModification(op);
|
2022-10-11 12:38:08 +00:00
|
|
|
return mlir::success();
|
|
|
|
}
|
|
|
|
};
|
|
|
|
} // namespace
|
|
|
|
|
2021-10-29 23:20:50 +02:00
|
|
|
namespace {
|
|
|
|
/// Convert FIR dialect to LLVM dialect
|
|
|
|
///
|
|
|
|
/// This pass lowers all FIR dialect operations to LLVM IR dialect. An
|
|
|
|
/// MLIR pass is used to lower residual Std dialect to LLVM IR dialect.
|
2022-08-31 10:16:29 +02:00
|
|
|
class FIRToLLVMLowering
|
|
|
|
: public fir::impl::FIRToLLVMLoweringBase<FIRToLLVMLowering> {
|
2021-10-29 23:20:50 +02:00
|
|
|
public:
|
2022-03-03 10:07:34 +01:00
|
|
|
FIRToLLVMLowering() = default;
|
|
|
|
FIRToLLVMLowering(fir::FIRToLLVMPassOptions options) : options{options} {}
|
2021-10-29 23:20:50 +02:00
|
|
|
mlir::ModuleOp getModule() { return getOperation(); }
|
|
|
|
|
|
|
|
void runOnOperation() override final {
|
2021-11-09 14:15:07 +01:00
|
|
|
auto mod = getModule();
|
2022-04-26 13:44:34 -07:00
|
|
|
if (!forcedTargetTriple.empty())
|
2021-11-09 14:15:07 +01:00
|
|
|
fir::setTargetTriple(mod, forcedTargetTriple);
|
|
|
|
|
[Flang][MLIR] Add basic initial support for alloca and program address space handling in FIR->LLVMIR codegen (#77518)
This is a slightly more slimmed down and up-to-date version of the older
PR from here: https://reviews.llvm.org/D144203, written by @jsjodin,
which has already under gone some review.
This PR places allocas in the alloca address space specified by the
provided data layout (default is 0 for all address spaces, unless
explicitly specified by the layout), and then will cast these alloca's
to the program address space if this address space is different from the
allocation address space. For most architectures data layouts, this will
be a no-op, as they have a flat address space. But in the case of AMDGPU
it will result in allocas being placed in the correct address space (5,
private), and then casted into the correct program address space (0,
generic). This results in correct (partially, a follow up PR will be
forthcoming soon) generation of allocations inside of device code.
This PR is in addition to the work by @skatrak in this PR:
https://github.com/llvm/llvm-project/pull/69599 and adds seperate and
neccesary functionality of casting alloca's from their address space to
the program address space, both are independent PRs, although there is
some minor overlap e.g. this PR incorporates some of the useful helper
functions from 69599, so whichever lands first will need a minor rebase.
Co-author: jsjodin
2024-01-17 17:37:16 +01:00
|
|
|
if (!forcedDataLayout.empty()) {
|
|
|
|
llvm::DataLayout dl(forcedDataLayout);
|
|
|
|
fir::support::setMLIRDataLayout(mod, dl);
|
|
|
|
}
|
|
|
|
|
2024-01-30 13:45:56 +00:00
|
|
|
if (!forcedTargetCPU.empty())
|
|
|
|
fir::setTargetCPU(mod, forcedTargetCPU);
|
|
|
|
|
2024-07-16 09:48:24 -06:00
|
|
|
if (!forcedTuneCPU.empty())
|
|
|
|
fir::setTuneCPU(mod, forcedTuneCPU);
|
|
|
|
|
2024-01-30 13:45:56 +00:00
|
|
|
if (!forcedTargetFeatures.empty())
|
|
|
|
fir::setTargetFeatures(mod, forcedTargetFeatures);
|
|
|
|
|
2024-08-21 13:37:03 -07:00
|
|
|
if (typeDescriptorsRenamedForAssembly)
|
|
|
|
options.typeDescriptorsRenamedForAssembly =
|
|
|
|
typeDescriptorsRenamedForAssembly;
|
|
|
|
|
2022-08-26 16:12:25 -07:00
|
|
|
// Run dynamic pass pipeline for converting Math dialect
|
|
|
|
// operations into other dialects (llvm, func, etc.).
|
|
|
|
// Some conversions of Math operations cannot be done
|
|
|
|
// by just using conversion patterns. This is true for
|
|
|
|
// conversions that affect the ModuleOp, e.g. create new
|
|
|
|
// function operations in it. We have to run such conversions
|
|
|
|
// as passes here.
|
|
|
|
mlir::OpPassManager mathConvertionPM("builtin.module");
|
2022-12-14 10:22:00 -08:00
|
|
|
|
2024-09-10 09:48:55 -04:00
|
|
|
bool isAMDGCN = fir::getTargetTriple(mod).isAMDGCN();
|
|
|
|
// If compiling for AMD target some math operations must be lowered to AMD
|
|
|
|
// GPU library calls, the rest can be converted to LLVM intrinsics, which
|
|
|
|
// is handled in the mathToLLVM conversion. The lowering to libm calls is
|
|
|
|
// not needed since all math operations are handled this way.
|
|
|
|
if (isAMDGCN)
|
|
|
|
mathConvertionPM.addPass(mlir::createConvertMathToROCDL());
|
|
|
|
|
2022-12-14 10:22:00 -08:00
|
|
|
// Convert math::FPowI operations to inline implementation
|
|
|
|
// only if the exponent's width is greater than 32, otherwise,
|
|
|
|
// it will be lowered to LLVM intrinsic operation by a later conversion.
|
|
|
|
mlir::ConvertMathToFuncsOptions mathToFuncsOptions{};
|
|
|
|
mathToFuncsOptions.minWidthOfFPowIExponent = 33;
|
|
|
|
mathConvertionPM.addPass(
|
|
|
|
mlir::createConvertMathToFuncs(mathToFuncsOptions));
|
2022-10-24 12:42:29 +00:00
|
|
|
mathConvertionPM.addPass(mlir::createConvertComplexToStandardPass());
|
2023-02-21 14:55:00 -08:00
|
|
|
// Convert Math dialect operations into LLVM dialect operations.
|
|
|
|
// There is no way to prefer MathToLLVM patterns over MathToLibm
|
|
|
|
// patterns (applied below), so we have to run MathToLLVM conversion here.
|
|
|
|
mathConvertionPM.addNestedPass<mlir::func::FuncOp>(
|
|
|
|
mlir::createConvertMathToLLVMPass());
|
2022-08-26 16:12:25 -07:00
|
|
|
if (mlir::failed(runPipeline(mathConvertionPM, mod)))
|
|
|
|
return signalPassFailure();
|
|
|
|
|
2023-12-12 11:52:39 +01:00
|
|
|
std::optional<mlir::DataLayout> dl =
|
2025-01-30 17:31:50 +01:00
|
|
|
fir::support::getOrSetMLIRDataLayout(mod, /*allowDefaultLayout=*/true);
|
2023-12-12 11:52:39 +01:00
|
|
|
if (!dl) {
|
|
|
|
mlir::emitError(mod.getLoc(),
|
|
|
|
"module operation must carry a data layout attribute "
|
|
|
|
"to generate llvm IR from FIR");
|
|
|
|
signalPassFailure();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2021-10-29 23:20:50 +02:00
|
|
|
auto *context = getModule().getContext();
|
2023-01-17 09:08:43 -08:00
|
|
|
fir::LLVMTypeConverter typeConverter{getModule(),
|
2023-09-14 09:09:29 +00:00
|
|
|
options.applyTBAA || applyTBAA,
|
2023-12-12 11:52:39 +01:00
|
|
|
options.forceUnifiedTBAATree, *dl};
|
2022-01-26 14:42:38 -08:00
|
|
|
mlir::RewritePatternSet pattern(context);
|
2024-03-04 00:11:59 -08:00
|
|
|
fir::populateFIRToLLVMConversionPatterns(typeConverter, pattern, options);
|
2022-03-01 14:53:41 -08:00
|
|
|
mlir::populateFuncToLLVMConversionPatterns(typeConverter, pattern);
|
2022-03-21 14:09:47 +00:00
|
|
|
mlir::populateOpenMPToLLVMConversionPatterns(typeConverter, pattern);
|
2022-09-29 11:55:17 -04:00
|
|
|
mlir::arith::populateArithToLLVMConversionPatterns(typeConverter, pattern);
|
2022-02-03 20:59:43 -08:00
|
|
|
mlir::cf::populateControlFlowToLLVMConversionPatterns(typeConverter,
|
|
|
|
pattern);
|
2025-01-06 12:00:11 +01:00
|
|
|
mlir::cf::populateAssertToLLVMConversionPattern(typeConverter, pattern);
|
2023-02-21 14:55:00 -08:00
|
|
|
// Math operations that have not been converted yet must be converted
|
|
|
|
// to Libm.
|
2024-09-10 09:48:55 -04:00
|
|
|
if (!isAMDGCN)
|
|
|
|
mlir::populateMathToLibmConversionPatterns(pattern);
|
2022-10-24 12:42:29 +00:00
|
|
|
mlir::populateComplexToLLVMConversionPatterns(typeConverter, pattern);
|
2023-05-29 16:10:12 -04:00
|
|
|
mlir::populateVectorToLLVMConversionPatterns(typeConverter, pattern);
|
2024-02-05 18:45:07 +01:00
|
|
|
|
|
|
|
// Flang specific overloads for OpenMP operations, to allow for special
|
|
|
|
// handling of things like Box types.
|
|
|
|
fir::populateOpenMPFIRToLLVMConversionPatterns(typeConverter, pattern);
|
|
|
|
|
2021-10-29 23:20:50 +02:00
|
|
|
mlir::ConversionTarget target{*context};
|
|
|
|
target.addLegalDialect<mlir::LLVM::LLVMDialect>();
|
2022-03-21 14:09:47 +00:00
|
|
|
// The OpenMP dialect is legal for Operations without regions, for those
|
|
|
|
// which contains regions it is legal if the region contains only the
|
2022-04-21 09:15:45 +05:30
|
|
|
// LLVM dialect. Add OpenMP dialect as a legal dialect for conversion and
|
|
|
|
// legalize conversion of OpenMP operations without regions.
|
|
|
|
mlir::configureOpenMPToLLVMConversionLegality(target, typeConverter);
|
2022-03-21 14:09:47 +00:00
|
|
|
target.addLegalDialect<mlir::omp::OpenMPDialect>();
|
2023-04-10 14:29:58 -07:00
|
|
|
target.addLegalDialect<mlir::acc::OpenACCDialect>();
|
2024-11-13 17:09:38 -08:00
|
|
|
target.addLegalDialect<mlir::gpu::GPUDialect>();
|
2021-10-29 23:20:50 +02:00
|
|
|
|
|
|
|
// required NOPs for applying a full conversion
|
|
|
|
target.addLegalOp<mlir::ModuleOp>();
|
|
|
|
|
2022-10-11 12:38:08 +00:00
|
|
|
// If we're on Windows, we might need to rename some libm calls.
|
|
|
|
bool isMSVC = fir::getTargetTriple(mod).isOSMSVCRT();
|
|
|
|
if (isMSVC) {
|
|
|
|
pattern.insert<RenameMSVCLibmCallees, RenameMSVCLibmFuncs>(context);
|
|
|
|
|
|
|
|
target.addDynamicallyLegalOp<mlir::LLVM::CallOp>(
|
|
|
|
[](mlir::LLVM::CallOp op) {
|
|
|
|
auto callee = op.getCallee();
|
|
|
|
if (!callee)
|
|
|
|
return true;
|
2024-05-12 23:08:40 -07:00
|
|
|
return *callee != "hypotf";
|
2022-10-11 12:38:08 +00:00
|
|
|
});
|
|
|
|
target.addDynamicallyLegalOp<mlir::LLVM::LLVMFuncOp>(
|
|
|
|
[](mlir::LLVM::LLVMFuncOp op) {
|
2024-05-12 23:08:40 -07:00
|
|
|
return op.getSymName() != "hypotf";
|
2022-10-11 12:38:08 +00:00
|
|
|
});
|
|
|
|
}
|
|
|
|
|
2021-10-29 23:20:50 +02:00
|
|
|
// apply the patterns
|
|
|
|
if (mlir::failed(mlir::applyFullConversion(getModule(), target,
|
|
|
|
std::move(pattern)))) {
|
|
|
|
signalPassFailure();
|
|
|
|
}
|
2023-09-19 15:00:04 +01:00
|
|
|
|
2024-07-15 16:07:48 +02:00
|
|
|
// Run pass to add comdats to functions that have weak linkage on relevant
|
|
|
|
// platforms
|
2023-09-19 15:00:04 +01:00
|
|
|
if (fir::getTargetTriple(mod).supportsCOMDAT()) {
|
|
|
|
mlir::OpPassManager comdatPM("builtin.module");
|
|
|
|
comdatPM.addPass(mlir::LLVM::createLLVMAddComdats());
|
|
|
|
if (mlir::failed(runPipeline(comdatPM, mod)))
|
|
|
|
return signalPassFailure();
|
|
|
|
}
|
2021-10-29 23:20:50 +02:00
|
|
|
}
|
2022-03-03 10:07:34 +01:00
|
|
|
|
|
|
|
private:
|
|
|
|
fir::FIRToLLVMPassOptions options;
|
2021-10-29 23:20:50 +02:00
|
|
|
};
|
2022-01-24 14:14:49 +01:00
|
|
|
|
|
|
|
/// Lower from LLVM IR dialect to proper LLVM-IR and dump the module
|
|
|
|
struct LLVMIRLoweringPass
|
|
|
|
: public mlir::PassWrapper<LLVMIRLoweringPass,
|
|
|
|
mlir::OperationPass<mlir::ModuleOp>> {
|
2022-03-30 17:00:37 -07:00
|
|
|
MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(LLVMIRLoweringPass)
|
|
|
|
|
2022-04-26 13:44:34 -07:00
|
|
|
LLVMIRLoweringPass(llvm::raw_ostream &output, fir::LLVMIRLoweringPrinter p)
|
2022-01-24 14:14:49 +01:00
|
|
|
: output{output}, printer{p} {}
|
|
|
|
|
|
|
|
mlir::ModuleOp getModule() { return getOperation(); }
|
|
|
|
|
|
|
|
void runOnOperation() override final {
|
|
|
|
auto *ctx = getModule().getContext();
|
|
|
|
auto optName = getModule().getName();
|
|
|
|
llvm::LLVMContext llvmCtx;
|
|
|
|
if (auto llvmModule = mlir::translateModuleToLLVMIR(
|
|
|
|
getModule(), llvmCtx, optName ? *optName : "FIRModule")) {
|
|
|
|
printer(*llvmModule, output);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
mlir::emitError(mlir::UnknownLoc::get(ctx), "could not emit LLVM-IR\n");
|
|
|
|
signalPassFailure();
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
2022-04-26 13:44:34 -07:00
|
|
|
llvm::raw_ostream &output;
|
|
|
|
fir::LLVMIRLoweringPrinter printer;
|
2022-01-24 14:14:49 +01:00
|
|
|
};
|
|
|
|
|
2021-10-29 23:20:50 +02:00
|
|
|
} // namespace
|
|
|
|
|
|
|
|
std::unique_ptr<mlir::Pass> fir::createFIRToLLVMPass() {
|
|
|
|
return std::make_unique<FIRToLLVMLowering>();
|
|
|
|
}
|
2022-01-24 14:14:49 +01:00
|
|
|
|
2022-03-03 10:07:34 +01:00
|
|
|
std::unique_ptr<mlir::Pass>
|
2022-04-26 13:44:34 -07:00
|
|
|
fir::createFIRToLLVMPass(fir::FIRToLLVMPassOptions options) {
|
2022-03-03 10:07:34 +01:00
|
|
|
return std::make_unique<FIRToLLVMLowering>(options);
|
|
|
|
}
|
|
|
|
|
2022-01-24 14:14:49 +01:00
|
|
|
std::unique_ptr<mlir::Pass>
|
2022-04-26 13:44:34 -07:00
|
|
|
fir::createLLVMDialectToLLVMPass(llvm::raw_ostream &output,
|
2022-01-24 14:14:49 +01:00
|
|
|
fir::LLVMIRLoweringPrinter printer) {
|
|
|
|
return std::make_unique<LLVMIRLoweringPass>(output, printer);
|
|
|
|
}
|
2024-03-04 00:11:59 -08:00
|
|
|
|
|
|
|
void fir::populateFIRToLLVMConversionPatterns(
|
2024-10-05 21:32:40 +02:00
|
|
|
const fir::LLVMTypeConverter &converter, mlir::RewritePatternSet &patterns,
|
2024-03-04 00:11:59 -08:00
|
|
|
fir::FIRToLLVMPassOptions &options) {
|
|
|
|
patterns.insert<
|
|
|
|
AbsentOpConversion, AddcOpConversion, AddrOfOpConversion,
|
|
|
|
AllocaOpConversion, AllocMemOpConversion, BoxAddrOpConversion,
|
|
|
|
BoxCharLenOpConversion, BoxDimsOpConversion, BoxEleSizeOpConversion,
|
|
|
|
BoxIsAllocOpConversion, BoxIsArrayOpConversion, BoxIsPtrOpConversion,
|
|
|
|
BoxOffsetOpConversion, BoxProcHostOpConversion, BoxRankOpConversion,
|
|
|
|
BoxTypeCodeOpConversion, BoxTypeDescOpConversion, CallOpConversion,
|
2024-10-02 16:16:57 +02:00
|
|
|
CmpcOpConversion, ConvertOpConversion, CoordinateOpConversion,
|
2025-03-11 09:31:03 +01:00
|
|
|
CopyOpConversion, DTEntryOpConversion, DeclareOpConversion,
|
|
|
|
DivcOpConversion, EmboxOpConversion, EmboxCharOpConversion,
|
|
|
|
EmboxProcOpConversion, ExtractValueOpConversion, FieldIndexOpConversion,
|
|
|
|
FirEndOpConversion, FreeMemOpConversion, GlobalLenOpConversion,
|
|
|
|
GlobalOpConversion, InsertOnRangeOpConversion, IsPresentOpConversion,
|
2024-07-15 16:07:48 +02:00
|
|
|
LenParamIndexOpConversion, LoadOpConversion, MulcOpConversion,
|
|
|
|
NegcOpConversion, NoReassocOpConversion, SelectCaseOpConversion,
|
|
|
|
SelectOpConversion, SelectRankOpConversion, SelectTypeOpConversion,
|
|
|
|
ShapeOpConversion, ShapeShiftOpConversion, ShiftOpConversion,
|
|
|
|
SliceOpConversion, StoreOpConversion, StringLitOpConversion,
|
|
|
|
SubcOpConversion, TypeDescOpConversion, TypeInfoOpConversion,
|
|
|
|
UnboxCharOpConversion, UnboxProcOpConversion, UndefOpConversion,
|
|
|
|
UnreachableOpConversion, XArrayCoorOpConversion, XEmboxOpConversion,
|
|
|
|
XReboxOpConversion, ZeroOpConversion>(converter, options);
|
|
|
|
|
|
|
|
// Patterns that are populated without a type converter do not trigger
|
|
|
|
// target materializations for the operands of the root op.
|
|
|
|
patterns.insert<HasValueOpConversion, InsertValueOpConversion>(
|
|
|
|
patterns.getContext());
|
2024-03-04 00:11:59 -08:00
|
|
|
}
|