2015-05-27 18:02:19 +00:00
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//===- MIRParser.cpp - MIR serialization format parser implementation -----===//
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//
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2019-01-19 08:50:56 +00:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2015-05-27 18:02:19 +00:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the class that parses the optional LLVM IR and machine
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// functions that are stored in MIR files.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MIRParser/MIRParser.h"
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2015-06-26 16:46:11 +00:00
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#include "llvm/ADT/DenseMap.h"
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2015-05-27 18:02:19 +00:00
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#include "llvm/ADT/STLExtras.h"
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2016-04-08 16:40:43 +00:00
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/StringRef.h"
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2015-05-27 18:02:19 +00:00
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#include "llvm/AsmParser/Parser.h"
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2015-06-26 22:56:48 +00:00
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#include "llvm/AsmParser/SlotMapping.h"
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2016-04-08 16:40:43 +00:00
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#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
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#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
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2019-03-14 22:54:43 +00:00
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#include "llvm/CodeGen/MIRParser/MIParser.h"
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2016-04-08 16:40:43 +00:00
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#include "llvm/CodeGen/MIRYamlMapping.h"
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2015-07-20 20:51:18 +00:00
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#include "llvm/CodeGen/MachineConstantPool.h"
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MIR Serialization: Serialize the simple MachineFrameInfo attributes.
This commit serializes the 13 scalar boolean and integer attributes from the
MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap,
HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack,
HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and
HasMustTailInVarArgFunc. These attributes are serialized as part
of the frameInfo YAML mapping, which itself is a part of the machine function's
YAML mapping.
llvm-svn: 241844
2015-07-09 19:55:27 +00:00
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#include "llvm/CodeGen/MachineFrameInfo.h"
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2016-04-08 16:40:43 +00:00
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#include "llvm/CodeGen/MachineFunction.h"
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2015-08-19 00:13:25 +00:00
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#include "llvm/CodeGen/MachineModuleInfo.h"
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2015-06-24 19:56:10 +00:00
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2019-06-17 09:13:29 +00:00
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#include "llvm/CodeGen/TargetFrameLowering.h"
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2015-06-19 17:43:07 +00:00
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#include "llvm/IR/BasicBlock.h"
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2016-04-14 18:29:59 +00:00
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#include "llvm/IR/DebugInfo.h"
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2015-06-15 20:30:22 +00:00
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#include "llvm/IR/DiagnosticInfo.h"
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2015-06-15 23:07:38 +00:00
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#include "llvm/IR/Instructions.h"
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2015-06-15 20:30:22 +00:00
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#include "llvm/IR/LLVMContext.h"
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2015-05-27 18:02:19 +00:00
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#include "llvm/IR/Module.h"
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2015-06-19 17:43:07 +00:00
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#include "llvm/IR/ValueSymbolTable.h"
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2015-05-29 17:05:41 +00:00
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#include "llvm/Support/LineIterator.h"
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2016-04-08 16:40:43 +00:00
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#include "llvm/Support/MemoryBuffer.h"
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2015-05-27 18:02:19 +00:00
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#include "llvm/Support/SMLoc.h"
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#include "llvm/Support/SourceMgr.h"
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#include "llvm/Support/YAMLTraits.h"
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2019-03-14 22:54:43 +00:00
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#include "llvm/Target/TargetMachine.h"
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2015-05-27 18:02:19 +00:00
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#include <memory>
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using namespace llvm;
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2015-06-15 20:30:22 +00:00
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namespace llvm {
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2015-05-27 18:02:19 +00:00
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/// This class implements the parsing of LLVM IR that's embedded inside a MIR
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/// file.
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class MIRParserImpl {
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SourceMgr SM;
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2021-02-18 18:46:39 -05:00
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LLVMContext &Context;
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2017-06-06 00:44:35 +00:00
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yaml::Input In;
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2015-05-27 18:02:19 +00:00
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StringRef Filename;
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2015-06-26 22:56:48 +00:00
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SlotMapping IRSlots;
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2019-03-12 20:42:12 +00:00
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std::unique_ptr<PerTargetMIParsingState> Target;
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2017-06-06 00:44:35 +00:00
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/// True when the MIR file doesn't have LLVM IR. Dummy IR functions are
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/// created and inserted into the given module when this is true.
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bool NoLLVMIR = false;
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/// True when a well formed MIR file does not contain any MIR/machine function
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/// parts.
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bool NoMIRDocuments = false;
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2015-05-27 18:02:19 +00:00
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2019-12-07 00:06:34 +05:30
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std::function<void(Function &)> ProcessIRFunction;
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2015-05-27 18:02:19 +00:00
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public:
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2019-12-07 00:06:34 +05:30
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MIRParserImpl(std::unique_ptr<MemoryBuffer> Contents, StringRef Filename,
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LLVMContext &Context,
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std::function<void(Function &)> ProcessIRFunction);
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2015-05-27 18:02:19 +00:00
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2015-06-15 20:30:22 +00:00
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void reportDiagnostic(const SMDiagnostic &Diag);
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/// Report an error with the given message at unknown location.
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///
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/// Always returns true.
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bool error(const Twine &Message);
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2015-07-08 20:22:20 +00:00
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/// Report an error with the given message at the given location.
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///
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/// Always returns true.
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bool error(SMLoc Loc, const Twine &Message);
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2015-06-30 17:55:00 +00:00
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/// Report a given error with the location translated from the location in an
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/// embedded string literal to a location in the MIR file.
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///
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/// Always returns true.
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bool error(const SMDiagnostic &Error, SMRange SourceRange);
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2015-05-28 22:41:12 +00:00
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/// Try to parse the optional LLVM module and the machine functions in the MIR
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/// file.
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2015-05-27 18:02:19 +00:00
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///
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2015-05-28 22:41:12 +00:00
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/// Return null if an error occurred.
|
Infer alignment of unmarked loads in IR/bitcode parsing.
For IR generated by a compiler, this is really simple: you just take the
datalayout from the beginning of the file, and apply it to all the IR
later in the file. For optimization testcases that don't care about the
datalayout, this is also really simple: we just use the default
datalayout.
The complexity here comes from the fact that some LLVM tools allow
overriding the datalayout: some tools have an explicit flag for this,
some tools will infer a datalayout based on the code generation target.
Supporting this properly required plumbing through a bunch of new
machinery: we want to allow overriding the datalayout after the
datalayout is parsed from the file, but before we use any information
from it. Therefore, IR/bitcode parsing now has a callback to allow tools
to compute the datalayout at the appropriate time.
Not sure if I covered all the LLVM tools that want to use the callback.
(clang? lli? Misc IR manipulation tools like llvm-link?). But this is at
least enough for all the LLVM regression tests, and IR without a
datalayout is not something frontends should generate.
This change had some sort of weird effects for certain CodeGen
regression tests: if the datalayout is overridden with a datalayout with
a different program or stack address space, we now parse IR based on the
overridden datalayout, instead of the one written in the file (or the
default one, if none is specified). This broke a few AVR tests, and one
AMDGPU test.
Outside the CodeGen tests I mentioned, the test changes are all just
fixing CHECK lines and moving around datalayout lines in weird places.
Differential Revision: https://reviews.llvm.org/D78403
2020-05-14 12:59:45 -07:00
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std::unique_ptr<Module>
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parseIRModule(DataLayoutCallbackTy DataLayoutCallback);
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2017-06-06 00:44:35 +00:00
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2019-12-07 00:06:34 +05:30
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/// Create an empty function with the given name.
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Function *createDummyFunction(StringRef Name, Module &M);
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2017-06-06 00:44:35 +00:00
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bool parseMachineFunctions(Module &M, MachineModuleInfo &MMI);
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2015-05-28 22:41:12 +00:00
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/// Parse the machine function in the current YAML document.
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///
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2015-06-15 23:07:38 +00:00
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///
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2015-05-28 22:41:12 +00:00
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/// Return true if an error occurred.
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2017-06-06 00:44:35 +00:00
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bool parseMachineFunction(Module &M, MachineModuleInfo &MMI);
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2015-05-29 17:05:41 +00:00
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2015-06-15 20:30:22 +00:00
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/// Initialize the machine function to the state that's described in the MIR
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/// file.
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///
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/// Return true if error occurred.
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2017-06-06 00:44:35 +00:00
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bool initializeMachineFunction(const yaml::MachineFunction &YamlMF,
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MachineFunction &MF);
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2015-06-15 20:30:22 +00:00
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2016-10-11 03:13:01 +00:00
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bool parseRegisterInfo(PerFunctionMIParsingState &PFS,
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const yaml::MachineFunction &YamlMF);
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2015-06-24 19:56:10 +00:00
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2016-10-11 03:13:01 +00:00
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bool setupRegisterInfo(const PerFunctionMIParsingState &PFS,
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2015-08-11 00:32:49 +00:00
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const yaml::MachineFunction &YamlMF);
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2016-07-13 22:23:23 +00:00
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bool initializeFrameInfo(PerFunctionMIParsingState &PFS,
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const yaml::MachineFunction &YamlMF);
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2015-07-24 22:22:50 +00:00
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2019-06-27 07:48:06 +00:00
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bool initializeCallSiteInfo(PerFunctionMIParsingState &PFS,
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const yaml::MachineFunction &YamlMF);
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2016-07-13 22:23:23 +00:00
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bool parseCalleeSavedRegister(PerFunctionMIParsingState &PFS,
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2015-07-24 22:22:50 +00:00
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std::vector<CalleeSavedInfo> &CSIInfo,
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const yaml::StringValue &RegisterSource,
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2017-09-28 18:52:14 +00:00
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bool IsRestored, int FrameIdx);
|
MIR Serialization: Serialize the simple MachineFrameInfo attributes.
This commit serializes the 13 scalar boolean and integer attributes from the
MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap,
HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack,
HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and
HasMustTailInVarArgFunc. These attributes are serialized as part
of the frameInfo YAML mapping, which itself is a part of the machine function's
YAML mapping.
llvm-svn: 241844
2015-07-09 19:55:27 +00:00
|
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2018-04-25 18:58:06 +00:00
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template <typename T>
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2016-07-13 22:23:23 +00:00
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bool parseStackObjectsDebugInfo(PerFunctionMIParsingState &PFS,
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2018-04-25 18:58:06 +00:00
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const T &Object,
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2015-08-19 00:13:25 +00:00
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int FrameIdx);
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2016-07-13 22:23:23 +00:00
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bool initializeConstantPool(PerFunctionMIParsingState &PFS,
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MachineConstantPool &ConstantPool,
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const yaml::MachineFunction &YamlMF);
|
2015-07-20 20:51:18 +00:00
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2016-07-13 22:23:23 +00:00
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bool initializeJumpTableInfo(PerFunctionMIParsingState &PFS,
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const yaml::MachineJumpTable &YamlJTI);
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2015-07-15 23:31:07 +00:00
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2015-05-29 17:05:41 +00:00
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private:
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2016-10-11 03:13:01 +00:00
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bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node,
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2016-07-13 22:23:23 +00:00
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const yaml::StringValue &Source);
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2015-08-19 00:13:25 +00:00
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2016-10-11 03:13:01 +00:00
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bool parseMBBReference(PerFunctionMIParsingState &PFS,
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2016-07-13 22:23:23 +00:00
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MachineBasicBlock *&MBB,
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const yaml::StringValue &Source);
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2015-07-29 20:57:11 +00:00
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2015-06-23 22:39:23 +00:00
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/// Return a MIR diagnostic converted from an MI string diagnostic.
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SMDiagnostic diagFromMIStringDiag(const SMDiagnostic &Error,
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SMRange SourceRange);
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2015-08-13 20:30:11 +00:00
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/// Return a MIR diagnostic converted from a diagnostic located in a YAML
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/// block scalar string.
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SMDiagnostic diagFromBlockStringDiag(const SMDiagnostic &Error,
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SMRange SourceRange);
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2015-06-15 23:07:38 +00:00
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2016-08-23 21:19:49 +00:00
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void computeFunctionProperties(MachineFunction &MF);
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2020-10-14 10:47:44 +01:00
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void setupDebugValueTracking(MachineFunction &MF,
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PerFunctionMIParsingState &PFS, const yaml::MachineFunction &YamlMF);
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2015-05-27 18:02:19 +00:00
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};
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2015-06-15 20:30:22 +00:00
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} // end namespace llvm
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2015-05-27 18:02:19 +00:00
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2017-06-06 00:44:35 +00:00
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static void handleYAMLDiag(const SMDiagnostic &Diag, void *Context) {
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reinterpret_cast<MIRParserImpl *>(Context)->reportDiagnostic(Diag);
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}
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2015-05-27 18:02:19 +00:00
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MIRParserImpl::MIRParserImpl(std::unique_ptr<MemoryBuffer> Contents,
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2019-12-07 00:06:34 +05:30
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StringRef Filename, LLVMContext &Context,
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std::function<void(Function &)> Callback)
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2017-06-06 00:44:35 +00:00
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: SM(),
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2021-02-18 18:46:39 -05:00
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Context(Context),
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2019-12-07 00:06:34 +05:30
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In(SM.getMemoryBuffer(SM.AddNewSourceBuffer(std::move(Contents), SMLoc()))
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->getBuffer(),
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nullptr, handleYAMLDiag, this),
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2021-02-18 18:46:39 -05:00
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Filename(Filename), ProcessIRFunction(Callback) {
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2017-06-06 00:44:35 +00:00
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In.setContext(&In);
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2015-05-27 18:02:19 +00:00
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}
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2015-06-15 20:30:22 +00:00
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bool MIRParserImpl::error(const Twine &Message) {
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Context.diagnose(DiagnosticInfoMIRParser(
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DS_Error, SMDiagnostic(Filename, SourceMgr::DK_Error, Message.str())));
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return true;
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}
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2015-07-08 20:22:20 +00:00
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bool MIRParserImpl::error(SMLoc Loc, const Twine &Message) {
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Context.diagnose(DiagnosticInfoMIRParser(
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DS_Error, SM.GetMessage(Loc, SourceMgr::DK_Error, Message)));
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return true;
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}
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2015-06-30 17:55:00 +00:00
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bool MIRParserImpl::error(const SMDiagnostic &Error, SMRange SourceRange) {
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assert(Error.getKind() == SourceMgr::DK_Error && "Expected an error");
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reportDiagnostic(diagFromMIStringDiag(Error, SourceRange));
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return true;
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}
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2015-06-15 20:30:22 +00:00
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void MIRParserImpl::reportDiagnostic(const SMDiagnostic &Diag) {
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DiagnosticSeverity Kind;
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switch (Diag.getKind()) {
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case SourceMgr::DK_Error:
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Kind = DS_Error;
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break;
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case SourceMgr::DK_Warning:
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Kind = DS_Warning;
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break;
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case SourceMgr::DK_Note:
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Kind = DS_Note;
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break;
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2017-10-12 23:56:02 +00:00
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case SourceMgr::DK_Remark:
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llvm_unreachable("remark unexpected");
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break;
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2015-06-15 20:30:22 +00:00
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}
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Context.diagnose(DiagnosticInfoMIRParser(Kind, Diag));
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}
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|
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|
|
Infer alignment of unmarked loads in IR/bitcode parsing.
For IR generated by a compiler, this is really simple: you just take the
datalayout from the beginning of the file, and apply it to all the IR
later in the file. For optimization testcases that don't care about the
datalayout, this is also really simple: we just use the default
datalayout.
The complexity here comes from the fact that some LLVM tools allow
overriding the datalayout: some tools have an explicit flag for this,
some tools will infer a datalayout based on the code generation target.
Supporting this properly required plumbing through a bunch of new
machinery: we want to allow overriding the datalayout after the
datalayout is parsed from the file, but before we use any information
from it. Therefore, IR/bitcode parsing now has a callback to allow tools
to compute the datalayout at the appropriate time.
Not sure if I covered all the LLVM tools that want to use the callback.
(clang? lli? Misc IR manipulation tools like llvm-link?). But this is at
least enough for all the LLVM regression tests, and IR without a
datalayout is not something frontends should generate.
This change had some sort of weird effects for certain CodeGen
regression tests: if the datalayout is overridden with a datalayout with
a different program or stack address space, we now parse IR based on the
overridden datalayout, instead of the one written in the file (or the
default one, if none is specified). This broke a few AVR tests, and one
AMDGPU test.
Outside the CodeGen tests I mentioned, the test changes are all just
fixing CHECK lines and moving around datalayout lines in weird places.
Differential Revision: https://reviews.llvm.org/D78403
2020-05-14 12:59:45 -07:00
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std::unique_ptr<Module>
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MIRParserImpl::parseIRModule(DataLayoutCallbackTy DataLayoutCallback) {
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2015-05-28 22:41:12 +00:00
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if (!In.setCurrentDocument()) {
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2015-06-15 20:30:22 +00:00
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if (In.error())
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2015-05-28 22:41:12 +00:00
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return nullptr;
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// Create an empty module when the MIR file is empty.
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2017-06-06 00:44:35 +00:00
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NoMIRDocuments = true;
|
Infer alignment of unmarked loads in IR/bitcode parsing.
For IR generated by a compiler, this is really simple: you just take the
datalayout from the beginning of the file, and apply it to all the IR
later in the file. For optimization testcases that don't care about the
datalayout, this is also really simple: we just use the default
datalayout.
The complexity here comes from the fact that some LLVM tools allow
overriding the datalayout: some tools have an explicit flag for this,
some tools will infer a datalayout based on the code generation target.
Supporting this properly required plumbing through a bunch of new
machinery: we want to allow overriding the datalayout after the
datalayout is parsed from the file, but before we use any information
from it. Therefore, IR/bitcode parsing now has a callback to allow tools
to compute the datalayout at the appropriate time.
Not sure if I covered all the LLVM tools that want to use the callback.
(clang? lli? Misc IR manipulation tools like llvm-link?). But this is at
least enough for all the LLVM regression tests, and IR without a
datalayout is not something frontends should generate.
This change had some sort of weird effects for certain CodeGen
regression tests: if the datalayout is overridden with a datalayout with
a different program or stack address space, we now parse IR based on the
overridden datalayout, instead of the one written in the file (or the
default one, if none is specified). This broke a few AVR tests, and one
AMDGPU test.
Outside the CodeGen tests I mentioned, the test changes are all just
fixing CHECK lines and moving around datalayout lines in weird places.
Differential Revision: https://reviews.llvm.org/D78403
2020-05-14 12:59:45 -07:00
|
|
|
auto M = std::make_unique<Module>(Filename, Context);
|
|
|
|
if (auto LayoutOverride = DataLayoutCallback(M->getTargetTriple()))
|
|
|
|
M->setDataLayout(*LayoutOverride);
|
|
|
|
return M;
|
2015-05-28 22:41:12 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
std::unique_ptr<Module> M;
|
2015-05-27 18:02:19 +00:00
|
|
|
// Parse the block scalar manually so that we can return unique pointer
|
|
|
|
// without having to go trough YAML traits.
|
2015-05-28 22:41:12 +00:00
|
|
|
if (const auto *BSN =
|
|
|
|
dyn_cast_or_null<yaml::BlockScalarNode>(In.getCurrentNode())) {
|
2015-06-15 20:30:22 +00:00
|
|
|
SMDiagnostic Error;
|
2015-05-28 22:41:12 +00:00
|
|
|
M = parseAssembly(MemoryBufferRef(BSN->getValue(), Filename), Error,
|
Infer alignment of unmarked loads in IR/bitcode parsing.
For IR generated by a compiler, this is really simple: you just take the
datalayout from the beginning of the file, and apply it to all the IR
later in the file. For optimization testcases that don't care about the
datalayout, this is also really simple: we just use the default
datalayout.
The complexity here comes from the fact that some LLVM tools allow
overriding the datalayout: some tools have an explicit flag for this,
some tools will infer a datalayout based on the code generation target.
Supporting this properly required plumbing through a bunch of new
machinery: we want to allow overriding the datalayout after the
datalayout is parsed from the file, but before we use any information
from it. Therefore, IR/bitcode parsing now has a callback to allow tools
to compute the datalayout at the appropriate time.
Not sure if I covered all the LLVM tools that want to use the callback.
(clang? lli? Misc IR manipulation tools like llvm-link?). But this is at
least enough for all the LLVM regression tests, and IR without a
datalayout is not something frontends should generate.
This change had some sort of weird effects for certain CodeGen
regression tests: if the datalayout is overridden with a datalayout with
a different program or stack address space, we now parse IR based on the
overridden datalayout, instead of the one written in the file (or the
default one, if none is specified). This broke a few AVR tests, and one
AMDGPU test.
Outside the CodeGen tests I mentioned, the test changes are all just
fixing CHECK lines and moving around datalayout lines in weird places.
Differential Revision: https://reviews.llvm.org/D78403
2020-05-14 12:59:45 -07:00
|
|
|
Context, &IRSlots, DataLayoutCallback);
|
2015-05-29 17:05:41 +00:00
|
|
|
if (!M) {
|
2015-08-13 20:30:11 +00:00
|
|
|
reportDiagnostic(diagFromBlockStringDiag(Error, BSN->getSourceRange()));
|
2016-07-14 00:42:37 +00:00
|
|
|
return nullptr;
|
2015-05-29 17:05:41 +00:00
|
|
|
}
|
2015-05-28 22:41:12 +00:00
|
|
|
In.nextDocument();
|
|
|
|
if (!In.setCurrentDocument())
|
2017-06-06 00:44:35 +00:00
|
|
|
NoMIRDocuments = true;
|
2015-05-28 22:41:12 +00:00
|
|
|
} else {
|
|
|
|
// Create an new, empty module.
|
2019-08-15 15:54:37 +00:00
|
|
|
M = std::make_unique<Module>(Filename, Context);
|
Infer alignment of unmarked loads in IR/bitcode parsing.
For IR generated by a compiler, this is really simple: you just take the
datalayout from the beginning of the file, and apply it to all the IR
later in the file. For optimization testcases that don't care about the
datalayout, this is also really simple: we just use the default
datalayout.
The complexity here comes from the fact that some LLVM tools allow
overriding the datalayout: some tools have an explicit flag for this,
some tools will infer a datalayout based on the code generation target.
Supporting this properly required plumbing through a bunch of new
machinery: we want to allow overriding the datalayout after the
datalayout is parsed from the file, but before we use any information
from it. Therefore, IR/bitcode parsing now has a callback to allow tools
to compute the datalayout at the appropriate time.
Not sure if I covered all the LLVM tools that want to use the callback.
(clang? lli? Misc IR manipulation tools like llvm-link?). But this is at
least enough for all the LLVM regression tests, and IR without a
datalayout is not something frontends should generate.
This change had some sort of weird effects for certain CodeGen
regression tests: if the datalayout is overridden with a datalayout with
a different program or stack address space, we now parse IR based on the
overridden datalayout, instead of the one written in the file (or the
default one, if none is specified). This broke a few AVR tests, and one
AMDGPU test.
Outside the CodeGen tests I mentioned, the test changes are all just
fixing CHECK lines and moving around datalayout lines in weird places.
Differential Revision: https://reviews.llvm.org/D78403
2020-05-14 12:59:45 -07:00
|
|
|
if (auto LayoutOverride = DataLayoutCallback(M->getTargetTriple()))
|
|
|
|
M->setDataLayout(*LayoutOverride);
|
2015-06-15 23:07:38 +00:00
|
|
|
NoLLVMIR = true;
|
2015-05-27 18:02:19 +00:00
|
|
|
}
|
2017-06-06 00:44:35 +00:00
|
|
|
return M;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIRParserImpl::parseMachineFunctions(Module &M, MachineModuleInfo &MMI) {
|
|
|
|
if (NoMIRDocuments)
|
|
|
|
return false;
|
2015-05-27 18:02:19 +00:00
|
|
|
|
2015-05-28 22:41:12 +00:00
|
|
|
// Parse the machine functions.
|
|
|
|
do {
|
2017-06-06 00:44:35 +00:00
|
|
|
if (parseMachineFunction(M, MMI))
|
|
|
|
return true;
|
2015-05-28 22:41:12 +00:00
|
|
|
In.nextDocument();
|
|
|
|
} while (In.setCurrentDocument());
|
|
|
|
|
2015-06-15 20:30:22 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2019-12-07 00:06:34 +05:30
|
|
|
Function *MIRParserImpl::createDummyFunction(StringRef Name, Module &M) {
|
2015-06-15 23:07:38 +00:00
|
|
|
auto &Context = M.getContext();
|
[opaque pointer types] Add a FunctionCallee wrapper type, and use it.
Recommit r352791 after tweaking DerivedTypes.h slightly, so that gcc
doesn't choke on it, hopefully.
Original Message:
The FunctionCallee type is effectively a {FunctionType*,Value*} pair,
and is a useful convenience to enable code to continue passing the
result of getOrInsertFunction() through to EmitCall, even once pointer
types lose their pointee-type.
Then:
- update the CallInst/InvokeInst instruction creation functions to
take a Callee,
- modify getOrInsertFunction to return FunctionCallee, and
- update all callers appropriately.
One area of particular note is the change to the sanitizer
code. Previously, they had been casting the result of
`getOrInsertFunction` to a `Function*` via
`checkSanitizerInterfaceFunction`, and storing that. That would report
an error if someone had already inserted a function declaraction with
a mismatching signature.
However, in general, LLVM allows for such mismatches, as
`getOrInsertFunction` will automatically insert a bitcast if
needed. As part of this cleanup, cause the sanitizer code to do the
same. (It will call its functions using the expected signature,
however they may have been declared.)
Finally, in a small number of locations, callers of
`getOrInsertFunction` actually were expecting/requiring that a brand
new function was being created. In such cases, I've switched them to
Function::Create instead.
Differential Revision: https://reviews.llvm.org/D57315
llvm-svn: 352827
2019-02-01 02:28:03 +00:00
|
|
|
Function *F =
|
|
|
|
Function::Create(FunctionType::get(Type::getVoidTy(Context), false),
|
|
|
|
Function::ExternalLinkage, Name, M);
|
2015-06-15 23:07:38 +00:00
|
|
|
BasicBlock *BB = BasicBlock::Create(Context, "entry", F);
|
|
|
|
new UnreachableInst(Context, BB);
|
2019-12-07 00:06:34 +05:30
|
|
|
|
|
|
|
if (ProcessIRFunction)
|
|
|
|
ProcessIRFunction(*F);
|
|
|
|
|
2017-06-06 00:44:35 +00:00
|
|
|
return F;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIRParserImpl::parseMachineFunction(Module &M, MachineModuleInfo &MMI) {
|
|
|
|
// Parse the yaml.
|
|
|
|
yaml::MachineFunction YamlMF;
|
|
|
|
yaml::EmptyContext Ctx;
|
2019-03-14 22:54:43 +00:00
|
|
|
|
|
|
|
const LLVMTargetMachine &TM = MMI.getTarget();
|
|
|
|
YamlMF.MachineFuncInfo = std::unique_ptr<yaml::MachineFunctionInfo>(
|
|
|
|
TM.createDefaultFuncInfoYAML());
|
|
|
|
|
2017-06-06 00:44:35 +00:00
|
|
|
yaml::yamlize(In, YamlMF, false, Ctx);
|
|
|
|
if (In.error())
|
|
|
|
return true;
|
|
|
|
|
|
|
|
// Search for the corresponding IR function.
|
|
|
|
StringRef FunctionName = YamlMF.Name;
|
|
|
|
Function *F = M.getFunction(FunctionName);
|
|
|
|
if (!F) {
|
|
|
|
if (NoLLVMIR) {
|
|
|
|
F = createDummyFunction(FunctionName, M);
|
|
|
|
} else {
|
|
|
|
return error(Twine("function '") + FunctionName +
|
|
|
|
"' isn't defined in the provided LLVM IR");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (MMI.getMachineFunction(*F) != nullptr)
|
|
|
|
return error(Twine("redefinition of machine function '") + FunctionName +
|
|
|
|
"'");
|
|
|
|
|
|
|
|
// Create the MachineFunction.
|
|
|
|
MachineFunction &MF = MMI.getOrCreateMachineFunction(*F);
|
|
|
|
if (initializeMachineFunction(YamlMF, MF))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
return false;
|
2015-06-15 23:07:38 +00:00
|
|
|
}
|
|
|
|
|
2016-08-24 01:32:41 +00:00
|
|
|
static bool isSSA(const MachineFunction &MF) {
|
|
|
|
const MachineRegisterInfo &MRI = MF.getRegInfo();
|
|
|
|
for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
|
2020-06-28 11:34:42 -04:00
|
|
|
Register Reg = Register::index2VirtReg(I);
|
2016-08-24 01:32:41 +00:00
|
|
|
if (!MRI.hasOneDef(Reg) && !MRI.def_empty(Reg))
|
|
|
|
return false;
|
2020-06-28 11:34:42 -04:00
|
|
|
|
|
|
|
// Subregister defs are invalid in SSA.
|
|
|
|
const MachineOperand *RegDef = MRI.getOneDef(Reg);
|
|
|
|
if (RegDef && RegDef->getSubReg() != 0)
|
|
|
|
return false;
|
2016-08-24 01:32:41 +00:00
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-08-23 21:19:49 +00:00
|
|
|
void MIRParserImpl::computeFunctionProperties(MachineFunction &MF) {
|
2016-08-24 01:32:41 +00:00
|
|
|
MachineFunctionProperties &Properties = MF.getProperties();
|
2016-08-24 22:34:06 +00:00
|
|
|
|
|
|
|
bool HasPHI = false;
|
|
|
|
bool HasInlineAsm = false;
|
|
|
|
for (const MachineBasicBlock &MBB : MF) {
|
|
|
|
for (const MachineInstr &MI : MBB) {
|
|
|
|
if (MI.isPHI())
|
|
|
|
HasPHI = true;
|
|
|
|
if (MI.isInlineAsm())
|
|
|
|
HasInlineAsm = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!HasPHI)
|
2016-08-24 01:32:41 +00:00
|
|
|
Properties.set(MachineFunctionProperties::Property::NoPHIs);
|
2016-08-24 22:34:06 +00:00
|
|
|
MF.setHasInlineAsm(HasInlineAsm);
|
2016-08-24 01:32:41 +00:00
|
|
|
|
|
|
|
if (isSSA(MF))
|
|
|
|
Properties.set(MachineFunctionProperties::Property::IsSSA);
|
|
|
|
else
|
2016-08-26 22:09:11 +00:00
|
|
|
Properties.reset(MachineFunctionProperties::Property::IsSSA);
|
2016-08-25 01:27:13 +00:00
|
|
|
|
|
|
|
const MachineRegisterInfo &MRI = MF.getRegInfo();
|
|
|
|
if (MRI.getNumVirtRegs() == 0)
|
|
|
|
Properties.set(MachineFunctionProperties::Property::NoVRegs);
|
2016-08-23 21:19:49 +00:00
|
|
|
}
|
|
|
|
|
2019-06-27 07:48:06 +00:00
|
|
|
bool MIRParserImpl::initializeCallSiteInfo(
|
|
|
|
PerFunctionMIParsingState &PFS, const yaml::MachineFunction &YamlMF) {
|
|
|
|
MachineFunction &MF = PFS.MF;
|
|
|
|
SMDiagnostic Error;
|
|
|
|
const LLVMTargetMachine &TM = MF.getTarget();
|
|
|
|
for (auto YamlCSInfo : YamlMF.CallSitesInfo) {
|
|
|
|
yaml::CallSiteInfo::MachineInstrLoc MILoc = YamlCSInfo.CallLocation;
|
|
|
|
if (MILoc.BlockNum >= MF.size())
|
|
|
|
return error(Twine(MF.getName()) +
|
|
|
|
Twine(" call instruction block out of range.") +
|
|
|
|
" Unable to reference bb:" + Twine(MILoc.BlockNum));
|
|
|
|
auto CallB = std::next(MF.begin(), MILoc.BlockNum);
|
|
|
|
if (MILoc.Offset >= CallB->size())
|
|
|
|
return error(Twine(MF.getName()) +
|
|
|
|
Twine(" call instruction offset out of range.") +
|
2019-09-20 14:41:41 +00:00
|
|
|
" Unable to reference instruction at bb: " +
|
2019-06-27 07:48:06 +00:00
|
|
|
Twine(MILoc.BlockNum) + " at offset:" + Twine(MILoc.Offset));
|
2019-08-19 12:41:22 +00:00
|
|
|
auto CallI = std::next(CallB->instr_begin(), MILoc.Offset);
|
|
|
|
if (!CallI->isCall(MachineInstr::IgnoreBundle))
|
2019-06-27 07:48:06 +00:00
|
|
|
return error(Twine(MF.getName()) +
|
|
|
|
Twine(" call site info should reference call "
|
|
|
|
"instruction. Instruction at bb:") +
|
|
|
|
Twine(MILoc.BlockNum) + " at offset:" + Twine(MILoc.Offset) +
|
|
|
|
" is not a call instruction");
|
|
|
|
MachineFunction::CallSiteInfo CSInfo;
|
|
|
|
for (auto ArgRegPair : YamlCSInfo.ArgForwardingRegs) {
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg;
|
2019-06-27 07:48:06 +00:00
|
|
|
if (parseNamedRegisterReference(PFS, Reg, ArgRegPair.Reg.Value, Error))
|
|
|
|
return error(Error, ArgRegPair.Reg.SourceRange);
|
|
|
|
CSInfo.emplace_back(Reg, ArgRegPair.ArgNo);
|
|
|
|
}
|
|
|
|
|
2020-03-09 11:02:35 +01:00
|
|
|
if (TM.Options.EmitCallSiteInfo)
|
2019-06-27 07:48:06 +00:00
|
|
|
MF.addCallArgsForwardingRegs(&*CallI, std::move(CSInfo));
|
|
|
|
}
|
|
|
|
|
2020-03-09 11:02:35 +01:00
|
|
|
if (YamlMF.CallSitesInfo.size() && !TM.Options.EmitCallSiteInfo)
|
2019-06-27 07:48:06 +00:00
|
|
|
return error(Twine("Call site info provided but not used"));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
[DebugInstrRef] Support recording of instruction reference substitutions
Add a table recording "substitutions" between pairs of <instruction,
operand> numbers, from old pairs to new pairs. Post-isel optimizations are
able to record the outcome of an optimization in this way. For example, if
there were a divide instruction that generated the quotient and remainder,
and it were replaced by one that only generated the quotient:
$rax, $rcx = DIV-AND-REMAINDER $rdx, $rsi, debug-instr-num 1
DBG_INSTR_REF 1, 0
DBG_INSTR_REF 1, 1
Became:
$rax = DIV $rdx, $rsi, debug-instr-num 2
DBG_INSTR_REF 1, 0
DBG_INSTR_REF 1, 1
We could enter a substitution from <1, 0> to <2, 0>, and no substitution
for <1, 1> as it's no longer generated.
This approach means that if an instruction or value is deleted once we've
left SSA form, all variables that used the value implicitly become
"optimized out", something that isn't true of the current DBG_VALUE
approach.
Differential Revision: https://reviews.llvm.org/D85749
2020-10-15 11:20:29 +01:00
|
|
|
void MIRParserImpl::setupDebugValueTracking(
|
|
|
|
MachineFunction &MF, PerFunctionMIParsingState &PFS,
|
|
|
|
const yaml::MachineFunction &YamlMF) {
|
|
|
|
// Compute the value of the "next instruction number" field.
|
2020-10-14 10:47:44 +01:00
|
|
|
unsigned MaxInstrNum = 0;
|
|
|
|
for (auto &MBB : MF)
|
|
|
|
for (auto &MI : MBB)
|
|
|
|
MaxInstrNum = std::max((unsigned)MI.peekDebugInstrNum(), MaxInstrNum);
|
|
|
|
MF.setDebugInstrNumberingCount(MaxInstrNum);
|
|
|
|
|
[DebugInstrRef] Support recording of instruction reference substitutions
Add a table recording "substitutions" between pairs of <instruction,
operand> numbers, from old pairs to new pairs. Post-isel optimizations are
able to record the outcome of an optimization in this way. For example, if
there were a divide instruction that generated the quotient and remainder,
and it were replaced by one that only generated the quotient:
$rax, $rcx = DIV-AND-REMAINDER $rdx, $rsi, debug-instr-num 1
DBG_INSTR_REF 1, 0
DBG_INSTR_REF 1, 1
Became:
$rax = DIV $rdx, $rsi, debug-instr-num 2
DBG_INSTR_REF 1, 0
DBG_INSTR_REF 1, 1
We could enter a substitution from <1, 0> to <2, 0>, and no substitution
for <1, 1> as it's no longer generated.
This approach means that if an instruction or value is deleted once we've
left SSA form, all variables that used the value implicitly become
"optimized out", something that isn't true of the current DBG_VALUE
approach.
Differential Revision: https://reviews.llvm.org/D85749
2020-10-15 11:20:29 +01:00
|
|
|
// Load any substitutions.
|
|
|
|
for (auto &Sub : YamlMF.DebugValueSubstitutions) {
|
|
|
|
MF.makeDebugValueSubstitution(std::make_pair(Sub.SrcInst, Sub.SrcOp),
|
|
|
|
std::make_pair(Sub.DstInst, Sub.DstOp));
|
|
|
|
}
|
|
|
|
}
|
2020-10-14 10:47:44 +01:00
|
|
|
|
2017-06-06 00:44:35 +00:00
|
|
|
bool
|
|
|
|
MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
|
|
|
|
MachineFunction &MF) {
|
2015-06-15 20:30:22 +00:00
|
|
|
// TODO: Recreate the machine function.
|
2019-03-12 20:42:12 +00:00
|
|
|
if (Target) {
|
|
|
|
// Avoid clearing state if we're using the same subtarget again.
|
|
|
|
Target->setTarget(MF.getSubtarget());
|
|
|
|
} else {
|
|
|
|
Target.reset(new PerTargetMIParsingState(MF.getSubtarget()));
|
|
|
|
}
|
|
|
|
|
2020-04-01 09:25:48 +00:00
|
|
|
MF.setAlignment(YamlMF.Alignment.valueOrOne());
|
2015-06-16 00:10:47 +00:00
|
|
|
MF.setExposesReturnsTwice(YamlMF.ExposesReturnsTwice);
|
2018-10-24 21:07:38 +00:00
|
|
|
MF.setHasWinCFI(YamlMF.HasWinCFI);
|
2016-08-02 15:10:25 +00:00
|
|
|
|
|
|
|
if (YamlMF.Legalized)
|
|
|
|
MF.getProperties().set(MachineFunctionProperties::Property::Legalized);
|
2016-08-02 16:17:10 +00:00
|
|
|
if (YamlMF.RegBankSelected)
|
|
|
|
MF.getProperties().set(
|
|
|
|
MachineFunctionProperties::Property::RegBankSelected);
|
2016-08-02 16:49:19 +00:00
|
|
|
if (YamlMF.Selected)
|
|
|
|
MF.getProperties().set(MachineFunctionProperties::Property::Selected);
|
[GlobalISel] Print/Parse FailedISel MachineFunction property
FailedISel MachineFunction property is part of the CodeGen pipeline
state as much as every other property, notably, Legalized,
RegBankSelected, and Selected. Let's make that part of the state also
serializable / de-serializable, so if GlobalISel aborts on some of the
functions of a large module, but not the others, it could be easily seen
and the state of the pipeline could be maintained through llc's
invocations with -stop-after / -start-after.
To make MIR printable and generally to not to break it too much too
soon, this patch also defers cleaning up the vreg -> LLT map until
ResetMachineFunctionPass.
To make MIR with FailedISel: true also machine verifiable, machine
verifier is changed so it treats a MIR-module as non-regbankselected and
non-selected if there is FailedISel property set.
Reviewers: qcolombet, ab
Reviewed By: dsanders
Subscribers: javed.absar, rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D42877
llvm-svn: 326343
2018-02-28 17:55:45 +00:00
|
|
|
if (YamlMF.FailedISel)
|
|
|
|
MF.getProperties().set(MachineFunctionProperties::Property::FailedISel);
|
2016-08-02 15:10:25 +00:00
|
|
|
|
2019-03-12 20:42:12 +00:00
|
|
|
PerFunctionMIParsingState PFS(MF, SM, IRSlots, *Target);
|
2016-10-11 03:13:01 +00:00
|
|
|
if (parseRegisterInfo(PFS, YamlMF))
|
2015-06-24 19:56:10 +00:00
|
|
|
return true;
|
2015-07-20 20:51:18 +00:00
|
|
|
if (!YamlMF.Constants.empty()) {
|
|
|
|
auto *ConstantPool = MF.getConstantPool();
|
|
|
|
assert(ConstantPool && "Constant pool must be created");
|
2016-07-13 22:23:23 +00:00
|
|
|
if (initializeConstantPool(PFS, *ConstantPool, YamlMF))
|
2015-07-20 20:51:18 +00:00
|
|
|
return true;
|
|
|
|
}
|
2015-06-24 19:56:10 +00:00
|
|
|
|
2016-07-13 23:27:50 +00:00
|
|
|
StringRef BlockStr = YamlMF.Body.Value.Value;
|
2015-08-13 23:10:16 +00:00
|
|
|
SMDiagnostic Error;
|
2016-07-13 23:27:50 +00:00
|
|
|
SourceMgr BlockSM;
|
|
|
|
BlockSM.AddNewSourceBuffer(
|
|
|
|
MemoryBuffer::getMemBuffer(BlockStr, "",/*RequiresNullTerminator=*/false),
|
|
|
|
SMLoc());
|
|
|
|
PFS.SM = &BlockSM;
|
|
|
|
if (parseMachineBasicBlockDefinitions(PFS, BlockStr, Error)) {
|
2015-08-13 23:10:16 +00:00
|
|
|
reportDiagnostic(
|
|
|
|
diagFromBlockStringDiag(Error, YamlMF.Body.Value.SourceRange));
|
|
|
|
return true;
|
2015-06-26 16:46:11 +00:00
|
|
|
}
|
2020-03-16 15:56:02 -07:00
|
|
|
// Check Basic Block Section Flags.
|
|
|
|
if (MF.getTarget().getBBSectionsType() == BasicBlockSection::Labels) {
|
|
|
|
MF.setBBSectionsType(BasicBlockSection::Labels);
|
|
|
|
} else if (MF.hasBBSections()) {
|
2020-04-13 12:14:42 -07:00
|
|
|
MF.assignBeginEndSections();
|
2020-03-16 15:56:02 -07:00
|
|
|
}
|
2016-07-13 23:27:50 +00:00
|
|
|
PFS.SM = &SM;
|
2015-06-26 16:46:11 +00:00
|
|
|
|
2015-07-29 21:09:09 +00:00
|
|
|
// Initialize the frame information after creating all the MBBs so that the
|
|
|
|
// MBB references in the frame information can be resolved.
|
2016-07-13 22:23:23 +00:00
|
|
|
if (initializeFrameInfo(PFS, YamlMF))
|
2015-07-29 21:09:09 +00:00
|
|
|
return true;
|
2015-07-15 23:31:07 +00:00
|
|
|
// Initialize the jump table after creating all the MBBs so that the MBB
|
|
|
|
// references can be resolved.
|
|
|
|
if (!YamlMF.JumpTableInfo.Entries.empty() &&
|
2016-07-13 22:23:23 +00:00
|
|
|
initializeJumpTableInfo(PFS, YamlMF.JumpTableInfo))
|
2015-07-15 23:31:07 +00:00
|
|
|
return true;
|
2015-08-13 23:10:16 +00:00
|
|
|
// Parse the machine instructions after creating all of the MBBs so that the
|
|
|
|
// parser can resolve the MBB references.
|
2016-07-13 23:27:50 +00:00
|
|
|
StringRef InsnStr = YamlMF.Body.Value.Value;
|
|
|
|
SourceMgr InsnSM;
|
|
|
|
InsnSM.AddNewSourceBuffer(
|
|
|
|
MemoryBuffer::getMemBuffer(InsnStr, "", /*RequiresNullTerminator=*/false),
|
|
|
|
SMLoc());
|
|
|
|
PFS.SM = &InsnSM;
|
|
|
|
if (parseMachineInstructions(PFS, InsnStr, Error)) {
|
2015-08-13 23:10:16 +00:00
|
|
|
reportDiagnostic(
|
|
|
|
diagFromBlockStringDiag(Error, YamlMF.Body.Value.SourceRange));
|
|
|
|
return true;
|
2015-06-19 17:43:07 +00:00
|
|
|
}
|
2016-07-13 23:27:50 +00:00
|
|
|
PFS.SM = &SM;
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
if (setupRegisterInfo(PFS, YamlMF))
|
|
|
|
return true;
|
2016-08-23 21:19:49 +00:00
|
|
|
|
2019-03-14 22:54:43 +00:00
|
|
|
if (YamlMF.MachineFuncInfo) {
|
|
|
|
const LLVMTargetMachine &TM = MF.getTarget();
|
|
|
|
// Note this is called after the initial constructor of the
|
|
|
|
// MachineFunctionInfo based on the MachineFunction, which may depend on the
|
|
|
|
// IR.
|
|
|
|
|
|
|
|
SMRange SrcRange;
|
|
|
|
if (TM.parseMachineFunctionInfo(*YamlMF.MachineFuncInfo, PFS, Error,
|
|
|
|
SrcRange)) {
|
|
|
|
return error(Error, SrcRange);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-27 16:12:26 +00:00
|
|
|
// Set the reserved registers after parsing MachineFuncInfo. The target may
|
|
|
|
// have been recording information used to select the reserved registers
|
|
|
|
// there.
|
|
|
|
// FIXME: This is a temporary workaround until the reserved registers can be
|
|
|
|
// serialized.
|
|
|
|
MachineRegisterInfo &MRI = MF.getRegInfo();
|
|
|
|
MRI.freezeReservedRegs(MF);
|
|
|
|
|
2016-08-23 21:19:49 +00:00
|
|
|
computeFunctionProperties(MF);
|
|
|
|
|
2019-06-27 07:48:06 +00:00
|
|
|
if (initializeCallSiteInfo(PFS, YamlMF))
|
|
|
|
return false;
|
|
|
|
|
2020-10-14 10:47:44 +01:00
|
|
|
setupDebugValueTracking(MF, PFS, YamlMF);
|
|
|
|
|
2018-01-19 03:16:36 +00:00
|
|
|
MF.getSubtarget().mirFileLoaded(MF);
|
|
|
|
|
2015-07-24 17:44:49 +00:00
|
|
|
MF.verify();
|
2015-06-19 17:43:07 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool MIRParserImpl::parseRegisterInfo(PerFunctionMIParsingState &PFS,
|
|
|
|
const yaml::MachineFunction &YamlMF) {
|
2016-07-13 22:23:23 +00:00
|
|
|
MachineFunction &MF = PFS.MF;
|
2015-07-28 16:48:37 +00:00
|
|
|
MachineRegisterInfo &RegInfo = MF.getRegInfo();
|
2015-06-24 19:56:10 +00:00
|
|
|
assert(RegInfo.tracksLiveness());
|
|
|
|
if (!YamlMF.TracksRegLiveness)
|
|
|
|
RegInfo.invalidateLiveness();
|
2015-07-09 22:23:13 +00:00
|
|
|
|
2015-07-24 20:35:40 +00:00
|
|
|
SMDiagnostic Error;
|
2015-07-09 22:23:13 +00:00
|
|
|
// Parse the virtual register information.
|
|
|
|
for (const auto &VReg : YamlMF.VirtualRegisters) {
|
2016-10-11 03:13:01 +00:00
|
|
|
VRegInfo &Info = PFS.getVRegInfo(VReg.ID.Value);
|
|
|
|
if (Info.Explicit)
|
|
|
|
return error(VReg.ID.SourceRange.Start,
|
|
|
|
Twine("redefinition of virtual register '%") +
|
|
|
|
Twine(VReg.ID.Value) + "'");
|
|
|
|
Info.Explicit = true;
|
|
|
|
|
2016-03-08 01:17:03 +00:00
|
|
|
if (StringRef(VReg.Class.Value).equals("_")) {
|
2016-10-11 03:13:01 +00:00
|
|
|
Info.Kind = VRegInfo::GENERIC;
|
2017-11-17 18:51:20 +00:00
|
|
|
Info.D.RegBank = nullptr;
|
2016-03-08 01:17:03 +00:00
|
|
|
} else {
|
2019-03-12 20:42:12 +00:00
|
|
|
const auto *RC = Target->getRegClass(VReg.Class.Value);
|
2016-04-08 16:40:43 +00:00
|
|
|
if (RC) {
|
2016-10-11 03:13:01 +00:00
|
|
|
Info.Kind = VRegInfo::NORMAL;
|
|
|
|
Info.D.RC = RC;
|
2016-04-08 16:40:43 +00:00
|
|
|
} else {
|
2019-03-12 20:42:12 +00:00
|
|
|
const RegisterBank *RegBank = Target->getRegBank(VReg.Class.Value);
|
2016-04-08 16:40:43 +00:00
|
|
|
if (!RegBank)
|
|
|
|
return error(
|
|
|
|
VReg.Class.SourceRange.Start,
|
|
|
|
Twine("use of undefined register class or register bank '") +
|
|
|
|
VReg.Class.Value + "'");
|
2016-10-11 03:13:01 +00:00
|
|
|
Info.Kind = VRegInfo::REGBANK;
|
|
|
|
Info.D.RegBank = RegBank;
|
2016-04-08 16:40:43 +00:00
|
|
|
}
|
2016-03-08 01:17:03 +00:00
|
|
|
}
|
2016-10-11 03:13:01 +00:00
|
|
|
|
2015-07-24 20:35:40 +00:00
|
|
|
if (!VReg.PreferredRegister.Value.empty()) {
|
2016-10-11 03:13:01 +00:00
|
|
|
if (Info.Kind != VRegInfo::NORMAL)
|
|
|
|
return error(VReg.Class.SourceRange.Start,
|
|
|
|
Twine("preferred register can only be set for normal vregs"));
|
2016-11-15 00:03:14 +00:00
|
|
|
|
|
|
|
if (parseRegisterReference(PFS, Info.PreferredReg,
|
|
|
|
VReg.PreferredRegister.Value, Error))
|
2015-07-24 20:35:40 +00:00
|
|
|
return error(Error, VReg.PreferredRegister.SourceRange);
|
|
|
|
}
|
2015-07-09 22:23:13 +00:00
|
|
|
}
|
2015-07-27 17:42:45 +00:00
|
|
|
|
|
|
|
// Parse the liveins.
|
|
|
|
for (const auto &LiveIn : YamlMF.LiveIns) {
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg;
|
2016-07-13 23:27:50 +00:00
|
|
|
if (parseNamedRegisterReference(PFS, Reg, LiveIn.Register.Value, Error))
|
2015-07-27 17:42:45 +00:00
|
|
|
return error(Error, LiveIn.Register.SourceRange);
|
2020-04-08 17:25:21 -04:00
|
|
|
Register VReg;
|
2015-07-27 17:42:45 +00:00
|
|
|
if (!LiveIn.VirtualRegister.Value.empty()) {
|
2016-10-11 03:13:01 +00:00
|
|
|
VRegInfo *Info;
|
|
|
|
if (parseVirtualRegisterReference(PFS, Info, LiveIn.VirtualRegister.Value,
|
2016-07-13 23:27:50 +00:00
|
|
|
Error))
|
2015-07-27 17:42:45 +00:00
|
|
|
return error(Error, LiveIn.VirtualRegister.SourceRange);
|
2016-10-11 03:13:01 +00:00
|
|
|
VReg = Info->VReg;
|
2015-07-27 17:42:45 +00:00
|
|
|
}
|
|
|
|
RegInfo.addLiveIn(Reg, VReg);
|
|
|
|
}
|
2015-08-11 00:32:49 +00:00
|
|
|
|
2017-03-19 08:14:18 +00:00
|
|
|
// Parse the callee saved registers (Registers that will
|
|
|
|
// be saved for the caller).
|
|
|
|
if (YamlMF.CalleeSavedRegisters) {
|
|
|
|
SmallVector<MCPhysReg, 16> CalleeSavedRegisters;
|
|
|
|
for (const auto &RegSource : YamlMF.CalleeSavedRegisters.getValue()) {
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg;
|
2017-03-19 08:14:18 +00:00
|
|
|
if (parseNamedRegisterReference(PFS, Reg, RegSource.Value, Error))
|
|
|
|
return error(Error, RegSource.SourceRange);
|
|
|
|
CalleeSavedRegisters.push_back(Reg);
|
|
|
|
}
|
|
|
|
RegInfo.setCalleeSavedRegs(CalleeSavedRegisters);
|
2015-08-11 00:32:49 +00:00
|
|
|
}
|
2017-03-19 08:14:18 +00:00
|
|
|
|
2015-06-24 19:56:10 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS,
|
2015-08-11 00:32:49 +00:00
|
|
|
const yaml::MachineFunction &YamlMF) {
|
2016-10-11 03:13:01 +00:00
|
|
|
MachineFunction &MF = PFS.MF;
|
|
|
|
MachineRegisterInfo &MRI = MF.getRegInfo();
|
|
|
|
bool Error = false;
|
|
|
|
// Create VRegs
|
2018-03-30 18:15:54 +00:00
|
|
|
auto populateVRegInfo = [&] (const VRegInfo &Info, Twine Name) {
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg = Info.VReg;
|
2016-10-11 03:13:01 +00:00
|
|
|
switch (Info.Kind) {
|
|
|
|
case VRegInfo::UNKNOWN:
|
|
|
|
error(Twine("Cannot determine class/bank of virtual register ") +
|
2018-03-30 18:15:54 +00:00
|
|
|
Name + " in function '" + MF.getName() + "'");
|
2016-10-11 03:13:01 +00:00
|
|
|
Error = true;
|
|
|
|
break;
|
|
|
|
case VRegInfo::NORMAL:
|
|
|
|
MRI.setRegClass(Reg, Info.D.RC);
|
|
|
|
if (Info.PreferredReg != 0)
|
|
|
|
MRI.setSimpleHint(Reg, Info.PreferredReg);
|
|
|
|
break;
|
|
|
|
case VRegInfo::GENERIC:
|
|
|
|
break;
|
|
|
|
case VRegInfo::REGBANK:
|
|
|
|
MRI.setRegBank(Reg, *Info.D.RegBank);
|
|
|
|
break;
|
|
|
|
}
|
2018-03-30 18:15:54 +00:00
|
|
|
};
|
|
|
|
|
2021-02-15 14:46:10 -08:00
|
|
|
for (const auto &P : PFS.VRegInfosNamed) {
|
|
|
|
const VRegInfo &Info = *P.second;
|
|
|
|
populateVRegInfo(Info, Twine(P.first()));
|
2018-03-30 18:15:54 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
for (auto P : PFS.VRegInfos) {
|
|
|
|
const VRegInfo &Info = *P.second;
|
|
|
|
populateVRegInfo(Info, Twine(P.first));
|
2016-10-11 03:13:01 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Compute MachineRegisterInfo::UsedPhysRegMask
|
2017-03-19 08:14:18 +00:00
|
|
|
for (const MachineBasicBlock &MBB : MF) {
|
2020-09-02 10:12:27 +01:00
|
|
|
// Make sure MRI knows about registers clobbered by unwinder.
|
|
|
|
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
|
|
|
|
if (MBB.isEHPad())
|
|
|
|
if (auto *RegMask = TRI->getCustomEHPadPreservedMask(MF))
|
|
|
|
MRI.addPhysRegsUsedFromRegMask(RegMask);
|
|
|
|
|
2017-03-19 08:14:18 +00:00
|
|
|
for (const MachineInstr &MI : MBB) {
|
|
|
|
for (const MachineOperand &MO : MI.operands()) {
|
|
|
|
if (!MO.isRegMask())
|
|
|
|
continue;
|
|
|
|
MRI.addPhysRegsUsedFromRegMask(MO.getRegMask());
|
2015-08-11 00:32:49 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2016-10-11 03:13:01 +00:00
|
|
|
|
|
|
|
return Error;
|
2015-08-11 00:32:49 +00:00
|
|
|
}
|
|
|
|
|
2016-07-13 22:23:23 +00:00
|
|
|
bool MIRParserImpl::initializeFrameInfo(PerFunctionMIParsingState &PFS,
|
|
|
|
const yaml::MachineFunction &YamlMF) {
|
|
|
|
MachineFunction &MF = PFS.MF;
|
2016-07-28 18:40:00 +00:00
|
|
|
MachineFrameInfo &MFI = MF.getFrameInfo();
|
2019-06-17 09:13:29 +00:00
|
|
|
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
|
2017-12-15 22:22:58 +00:00
|
|
|
const Function &F = MF.getFunction();
|
2015-07-10 18:13:57 +00:00
|
|
|
const yaml::MachineFrameInfo &YamlMFI = YamlMF.FrameInfo;
|
MIR Serialization: Serialize the simple MachineFrameInfo attributes.
This commit serializes the 13 scalar boolean and integer attributes from the
MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap,
HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack,
HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and
HasMustTailInVarArgFunc. These attributes are serialized as part
of the frameInfo YAML mapping, which itself is a part of the machine function's
YAML mapping.
llvm-svn: 241844
2015-07-09 19:55:27 +00:00
|
|
|
MFI.setFrameAddressIsTaken(YamlMFI.IsFrameAddressTaken);
|
|
|
|
MFI.setReturnAddressIsTaken(YamlMFI.IsReturnAddressTaken);
|
|
|
|
MFI.setHasStackMap(YamlMFI.HasStackMap);
|
|
|
|
MFI.setHasPatchPoint(YamlMFI.HasPatchPoint);
|
|
|
|
MFI.setStackSize(YamlMFI.StackSize);
|
|
|
|
MFI.setOffsetAdjustment(YamlMFI.OffsetAdjustment);
|
|
|
|
if (YamlMFI.MaxAlignment)
|
2020-03-18 17:04:10 +01:00
|
|
|
MFI.ensureMaxAlignment(Align(YamlMFI.MaxAlignment));
|
MIR Serialization: Serialize the simple MachineFrameInfo attributes.
This commit serializes the 13 scalar boolean and integer attributes from the
MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap,
HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack,
HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and
HasMustTailInVarArgFunc. These attributes are serialized as part
of the frameInfo YAML mapping, which itself is a part of the machine function's
YAML mapping.
llvm-svn: 241844
2015-07-09 19:55:27 +00:00
|
|
|
MFI.setAdjustsStack(YamlMFI.AdjustsStack);
|
|
|
|
MFI.setHasCalls(YamlMFI.HasCalls);
|
2017-05-01 22:32:25 +00:00
|
|
|
if (YamlMFI.MaxCallFrameSize != ~0u)
|
|
|
|
MFI.setMaxCallFrameSize(YamlMFI.MaxCallFrameSize);
|
[codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_REL
Summary:
Before this change, LLVM would always describe locals on the stack as
being relative to some specific register, RSP, ESP, EBP, ESI, etc.
Variables in stack memory are pretty common, so there is a special
S_DEFRANGE_FRAMEPOINTER_REL symbol for them. This change uses it to
reduce the size of our debug info.
On top of the size savings, there are cases on 32-bit x86 where local
variables are addressed from ESP, but ESP changes across the function.
Unlike in DWARF, there is no FPO data to describe the stack adjustments
made to push arguments onto the stack and pop them off after the call,
which makes it hard for the debugger to find the local variables in
frames further up the stack.
To handle this, CodeView has a special VFRAME register, which
corresponds to the $T0 variable set by our FPO data in 32-bit. Offsets
to local variables are instead relative to this value.
This is part of PR38857.
Reviewers: hans, zturner, javed.absar
Subscribers: aprantl, hiraditya, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D52217
llvm-svn: 343543
2018-10-01 21:59:45 +00:00
|
|
|
MFI.setCVBytesOfCalleeSavedRegisters(YamlMFI.CVBytesOfCalleeSavedRegisters);
|
MIR Serialization: Serialize the simple MachineFrameInfo attributes.
This commit serializes the 13 scalar boolean and integer attributes from the
MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap,
HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack,
HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and
HasMustTailInVarArgFunc. These attributes are serialized as part
of the frameInfo YAML mapping, which itself is a part of the machine function's
YAML mapping.
llvm-svn: 241844
2015-07-09 19:55:27 +00:00
|
|
|
MFI.setHasOpaqueSPAdjustment(YamlMFI.HasOpaqueSPAdjustment);
|
|
|
|
MFI.setHasVAStart(YamlMFI.HasVAStart);
|
|
|
|
MFI.setHasMustTailInVarArgFunc(YamlMFI.HasMustTailInVarArgFunc);
|
2018-04-06 08:56:25 +00:00
|
|
|
MFI.setLocalFrameSize(YamlMFI.LocalFrameSize);
|
2015-07-29 21:09:09 +00:00
|
|
|
if (!YamlMFI.SavePoint.Value.empty()) {
|
|
|
|
MachineBasicBlock *MBB = nullptr;
|
2016-07-13 22:23:23 +00:00
|
|
|
if (parseMBBReference(PFS, MBB, YamlMFI.SavePoint))
|
2015-07-29 21:09:09 +00:00
|
|
|
return true;
|
|
|
|
MFI.setSavePoint(MBB);
|
|
|
|
}
|
|
|
|
if (!YamlMFI.RestorePoint.Value.empty()) {
|
|
|
|
MachineBasicBlock *MBB = nullptr;
|
2016-07-13 22:23:23 +00:00
|
|
|
if (parseMBBReference(PFS, MBB, YamlMFI.RestorePoint))
|
2015-07-29 21:09:09 +00:00
|
|
|
return true;
|
|
|
|
MFI.setRestorePoint(MBB);
|
|
|
|
}
|
2015-07-10 18:13:57 +00:00
|
|
|
|
2015-07-24 22:22:50 +00:00
|
|
|
std::vector<CalleeSavedInfo> CSIInfo;
|
2015-07-13 18:07:26 +00:00
|
|
|
// Initialize the fixed frame objects.
|
|
|
|
for (const auto &Object : YamlMF.FixedStackObjects) {
|
|
|
|
int ObjectIdx;
|
|
|
|
if (Object.Type != yaml::FixedMachineStackObject::SpillSlot)
|
|
|
|
ObjectIdx = MFI.CreateFixedObject(Object.Size, Object.Offset,
|
|
|
|
Object.IsImmutable, Object.IsAliased);
|
|
|
|
else
|
|
|
|
ObjectIdx = MFI.CreateFixedSpillStackObject(Object.Size, Object.Offset);
|
2019-06-17 09:13:29 +00:00
|
|
|
|
|
|
|
if (!TFI->isSupportedStackID(Object.StackID))
|
|
|
|
return error(Object.ID.SourceRange.Start,
|
|
|
|
Twine("StackID is not supported by target"));
|
2017-07-20 21:03:45 +00:00
|
|
|
MFI.setStackID(ObjectIdx, Object.StackID);
|
2020-04-01 09:25:48 +00:00
|
|
|
MFI.setObjectAlignment(ObjectIdx, Object.Alignment.valueOrOne());
|
2015-08-10 23:45:02 +00:00
|
|
|
if (!PFS.FixedStackObjectSlots.insert(std::make_pair(Object.ID.Value,
|
|
|
|
ObjectIdx))
|
|
|
|
.second)
|
|
|
|
return error(Object.ID.SourceRange.Start,
|
|
|
|
Twine("redefinition of fixed stack object '%fixed-stack.") +
|
|
|
|
Twine(Object.ID.Value) + "'");
|
2016-07-13 22:23:23 +00:00
|
|
|
if (parseCalleeSavedRegister(PFS, CSIInfo, Object.CalleeSavedRegister,
|
2017-09-28 18:52:14 +00:00
|
|
|
Object.CalleeSavedRestored, ObjectIdx))
|
2015-07-24 22:22:50 +00:00
|
|
|
return true;
|
2018-04-25 18:58:06 +00:00
|
|
|
if (parseStackObjectsDebugInfo(PFS, Object, ObjectIdx))
|
|
|
|
return true;
|
2015-07-13 18:07:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Initialize the ordinary frame objects.
|
2015-07-10 18:13:57 +00:00
|
|
|
for (const auto &Object : YamlMF.StackObjects) {
|
2015-07-14 00:26:26 +00:00
|
|
|
int ObjectIdx;
|
2015-07-15 22:14:49 +00:00
|
|
|
const AllocaInst *Alloca = nullptr;
|
|
|
|
const yaml::StringValue &Name = Object.Name;
|
|
|
|
if (!Name.Value.empty()) {
|
|
|
|
Alloca = dyn_cast_or_null<AllocaInst>(
|
2016-09-17 06:00:02 +00:00
|
|
|
F.getValueSymbolTable()->lookup(Name.Value));
|
2015-07-15 22:14:49 +00:00
|
|
|
if (!Alloca)
|
|
|
|
return error(Name.SourceRange.Start,
|
|
|
|
"alloca instruction named '" + Name.Value +
|
|
|
|
"' isn't defined in the function '" + F.getName() +
|
|
|
|
"'");
|
|
|
|
}
|
2019-06-17 09:13:29 +00:00
|
|
|
if (!TFI->isSupportedStackID(Object.StackID))
|
|
|
|
return error(Object.ID.SourceRange.Start,
|
|
|
|
Twine("StackID is not supported by target"));
|
2015-07-14 00:26:26 +00:00
|
|
|
if (Object.Type == yaml::MachineStackObject::VariableSized)
|
2020-04-01 09:25:48 +00:00
|
|
|
ObjectIdx =
|
|
|
|
MFI.CreateVariableSizedObject(Object.Alignment.valueOrOne(), Alloca);
|
2015-07-14 00:26:26 +00:00
|
|
|
else
|
|
|
|
ObjectIdx = MFI.CreateStackObject(
|
2020-04-01 09:25:48 +00:00
|
|
|
Object.Size, Object.Alignment.valueOrOne(),
|
2019-04-02 09:46:52 +00:00
|
|
|
Object.Type == yaml::MachineStackObject::SpillSlot, Alloca,
|
|
|
|
Object.StackID);
|
2015-07-10 18:13:57 +00:00
|
|
|
MFI.setObjectOffset(ObjectIdx, Object.Offset);
|
2017-07-20 21:03:45 +00:00
|
|
|
|
2015-08-10 23:50:41 +00:00
|
|
|
if (!PFS.StackObjectSlots.insert(std::make_pair(Object.ID.Value, ObjectIdx))
|
|
|
|
.second)
|
|
|
|
return error(Object.ID.SourceRange.Start,
|
|
|
|
Twine("redefinition of stack object '%stack.") +
|
|
|
|
Twine(Object.ID.Value) + "'");
|
2016-07-13 22:23:23 +00:00
|
|
|
if (parseCalleeSavedRegister(PFS, CSIInfo, Object.CalleeSavedRegister,
|
2017-09-28 18:52:14 +00:00
|
|
|
Object.CalleeSavedRestored, ObjectIdx))
|
2015-07-24 22:22:50 +00:00
|
|
|
return true;
|
2015-08-17 22:17:42 +00:00
|
|
|
if (Object.LocalOffset)
|
|
|
|
MFI.mapLocalFrameObject(ObjectIdx, Object.LocalOffset.getValue());
|
2016-07-13 22:23:23 +00:00
|
|
|
if (parseStackObjectsDebugInfo(PFS, Object, ObjectIdx))
|
2015-08-19 00:13:25 +00:00
|
|
|
return true;
|
2015-07-10 18:13:57 +00:00
|
|
|
}
|
2015-07-24 22:22:50 +00:00
|
|
|
MFI.setCalleeSavedInfo(CSIInfo);
|
|
|
|
if (!CSIInfo.empty())
|
|
|
|
MFI.setCalleeSavedInfoValid(true);
|
2015-08-18 22:26:26 +00:00
|
|
|
|
|
|
|
// Initialize the various stack object references after initializing the
|
|
|
|
// stack objects.
|
|
|
|
if (!YamlMFI.StackProtector.Value.empty()) {
|
|
|
|
SMDiagnostic Error;
|
|
|
|
int FI;
|
2016-07-13 23:27:50 +00:00
|
|
|
if (parseStackObjectReference(PFS, FI, YamlMFI.StackProtector.Value, Error))
|
2015-08-18 22:26:26 +00:00
|
|
|
return error(Error, YamlMFI.StackProtector.SourceRange);
|
|
|
|
MFI.setStackProtectorIndex(FI);
|
|
|
|
}
|
2015-07-24 22:22:50 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-13 22:23:23 +00:00
|
|
|
bool MIRParserImpl::parseCalleeSavedRegister(PerFunctionMIParsingState &PFS,
|
2015-07-24 22:22:50 +00:00
|
|
|
std::vector<CalleeSavedInfo> &CSIInfo,
|
2017-09-28 18:52:14 +00:00
|
|
|
const yaml::StringValue &RegisterSource, bool IsRestored, int FrameIdx) {
|
2015-07-24 22:22:50 +00:00
|
|
|
if (RegisterSource.Value.empty())
|
|
|
|
return false;
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg;
|
2015-07-24 22:22:50 +00:00
|
|
|
SMDiagnostic Error;
|
2016-07-13 23:27:50 +00:00
|
|
|
if (parseNamedRegisterReference(PFS, Reg, RegisterSource.Value, Error))
|
2015-07-24 22:22:50 +00:00
|
|
|
return error(Error, RegisterSource.SourceRange);
|
2017-09-28 18:52:14 +00:00
|
|
|
CalleeSavedInfo CSI(Reg, FrameIdx);
|
|
|
|
CSI.setRestored(IsRestored);
|
|
|
|
CSIInfo.push_back(CSI);
|
MIR Serialization: Serialize the simple MachineFrameInfo attributes.
This commit serializes the 13 scalar boolean and integer attributes from the
MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap,
HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack,
HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and
HasMustTailInVarArgFunc. These attributes are serialized as part
of the frameInfo YAML mapping, which itself is a part of the machine function's
YAML mapping.
llvm-svn: 241844
2015-07-09 19:55:27 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-19 00:13:25 +00:00
|
|
|
/// Verify that given node is of a certain type. Return true on error.
|
|
|
|
template <typename T>
|
|
|
|
static bool typecheckMDNode(T *&Result, MDNode *Node,
|
|
|
|
const yaml::StringValue &Source,
|
|
|
|
StringRef TypeString, MIRParserImpl &Parser) {
|
|
|
|
if (!Node)
|
|
|
|
return false;
|
|
|
|
Result = dyn_cast<T>(Node);
|
|
|
|
if (!Result)
|
|
|
|
return Parser.error(Source.SourceRange.Start,
|
|
|
|
"expected a reference to a '" + TypeString +
|
|
|
|
"' metadata node");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-04-25 18:58:06 +00:00
|
|
|
template <typename T>
|
2016-07-13 22:23:23 +00:00
|
|
|
bool MIRParserImpl::parseStackObjectsDebugInfo(PerFunctionMIParsingState &PFS,
|
2018-04-25 18:58:06 +00:00
|
|
|
const T &Object, int FrameIdx) {
|
2015-08-19 00:13:25 +00:00
|
|
|
// Debug information can only be attached to stack objects; Fixed stack
|
|
|
|
// objects aren't supported.
|
|
|
|
MDNode *Var = nullptr, *Expr = nullptr, *Loc = nullptr;
|
2016-07-13 22:23:23 +00:00
|
|
|
if (parseMDNode(PFS, Var, Object.DebugVar) ||
|
|
|
|
parseMDNode(PFS, Expr, Object.DebugExpr) ||
|
|
|
|
parseMDNode(PFS, Loc, Object.DebugLoc))
|
2015-08-19 00:13:25 +00:00
|
|
|
return true;
|
|
|
|
if (!Var && !Expr && !Loc)
|
|
|
|
return false;
|
|
|
|
DILocalVariable *DIVar = nullptr;
|
|
|
|
DIExpression *DIExpr = nullptr;
|
|
|
|
DILocation *DILoc = nullptr;
|
|
|
|
if (typecheckMDNode(DIVar, Var, Object.DebugVar, "DILocalVariable", *this) ||
|
|
|
|
typecheckMDNode(DIExpr, Expr, Object.DebugExpr, "DIExpression", *this) ||
|
|
|
|
typecheckMDNode(DILoc, Loc, Object.DebugLoc, "DILocation", *this))
|
|
|
|
return true;
|
2018-04-25 18:58:06 +00:00
|
|
|
PFS.MF.setVariableDbgInfo(DIVar, DIExpr, FrameIdx, DILoc);
|
2015-08-19 00:13:25 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool MIRParserImpl::parseMDNode(PerFunctionMIParsingState &PFS,
|
2016-07-13 22:23:23 +00:00
|
|
|
MDNode *&Node, const yaml::StringValue &Source) {
|
2015-08-19 00:13:25 +00:00
|
|
|
if (Source.Value.empty())
|
|
|
|
return false;
|
|
|
|
SMDiagnostic Error;
|
2016-07-13 23:27:50 +00:00
|
|
|
if (llvm::parseMDNode(PFS, Node, Source.Value, Error))
|
2015-08-19 00:13:25 +00:00
|
|
|
return error(Error, Source.SourceRange);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-13 22:23:23 +00:00
|
|
|
bool MIRParserImpl::initializeConstantPool(PerFunctionMIParsingState &PFS,
|
|
|
|
MachineConstantPool &ConstantPool, const yaml::MachineFunction &YamlMF) {
|
|
|
|
DenseMap<unsigned, unsigned> &ConstantPoolSlots = PFS.ConstantPoolSlots;
|
|
|
|
const MachineFunction &MF = PFS.MF;
|
2017-12-15 22:22:58 +00:00
|
|
|
const auto &M = *MF.getFunction().getParent();
|
2015-07-20 20:51:18 +00:00
|
|
|
SMDiagnostic Error;
|
|
|
|
for (const auto &YamlConstant : YamlMF.Constants) {
|
2017-08-02 11:09:30 +00:00
|
|
|
if (YamlConstant.IsTargetSpecific)
|
|
|
|
// FIXME: Support target-specific constant pools
|
|
|
|
return error(YamlConstant.Value.SourceRange.Start,
|
|
|
|
"Can't parse target-specific constant pool entries yet");
|
2015-07-20 20:51:18 +00:00
|
|
|
const Constant *Value = dyn_cast_or_null<Constant>(
|
|
|
|
parseConstantValue(YamlConstant.Value.Value, Error, M));
|
|
|
|
if (!Value)
|
|
|
|
return error(Error, YamlConstant.Value.SourceRange);
|
2020-04-01 09:25:48 +00:00
|
|
|
const Align PrefTypeAlign =
|
|
|
|
M.getDataLayout().getPrefTypeAlign(Value->getType());
|
|
|
|
const Align Alignment = YamlConstant.Alignment.getValueOr(PrefTypeAlign);
|
2020-05-12 09:43:24 -07:00
|
|
|
unsigned Index = ConstantPool.getConstantPoolIndex(Value, Alignment);
|
2015-07-30 22:00:17 +00:00
|
|
|
if (!ConstantPoolSlots.insert(std::make_pair(YamlConstant.ID.Value, Index))
|
|
|
|
.second)
|
|
|
|
return error(YamlConstant.ID.SourceRange.Start,
|
|
|
|
Twine("redefinition of constant pool item '%const.") +
|
|
|
|
Twine(YamlConstant.ID.Value) + "'");
|
2015-07-20 20:51:18 +00:00
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-13 22:23:23 +00:00
|
|
|
bool MIRParserImpl::initializeJumpTableInfo(PerFunctionMIParsingState &PFS,
|
|
|
|
const yaml::MachineJumpTable &YamlJTI) {
|
|
|
|
MachineJumpTableInfo *JTI = PFS.MF.getOrCreateJumpTableInfo(YamlJTI.Kind);
|
2015-07-15 23:31:07 +00:00
|
|
|
for (const auto &Entry : YamlJTI.Entries) {
|
|
|
|
std::vector<MachineBasicBlock *> Blocks;
|
|
|
|
for (const auto &MBBSource : Entry.Blocks) {
|
|
|
|
MachineBasicBlock *MBB = nullptr;
|
2016-07-13 22:23:23 +00:00
|
|
|
if (parseMBBReference(PFS, MBB, MBBSource.Value))
|
2015-07-29 20:57:11 +00:00
|
|
|
return true;
|
2015-07-15 23:31:07 +00:00
|
|
|
Blocks.push_back(MBB);
|
|
|
|
}
|
2015-07-15 23:38:35 +00:00
|
|
|
unsigned Index = JTI->createJumpTableIndex(Blocks);
|
2015-07-31 23:13:23 +00:00
|
|
|
if (!PFS.JumpTableSlots.insert(std::make_pair(Entry.ID.Value, Index))
|
|
|
|
.second)
|
|
|
|
return error(Entry.ID.SourceRange.Start,
|
|
|
|
Twine("redefinition of jump table entry '%jump-table.") +
|
|
|
|
Twine(Entry.ID.Value) + "'");
|
2015-07-15 23:31:07 +00:00
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool MIRParserImpl::parseMBBReference(PerFunctionMIParsingState &PFS,
|
2016-07-13 22:23:23 +00:00
|
|
|
MachineBasicBlock *&MBB,
|
|
|
|
const yaml::StringValue &Source) {
|
2015-07-29 20:57:11 +00:00
|
|
|
SMDiagnostic Error;
|
2016-07-13 23:27:50 +00:00
|
|
|
if (llvm::parseMBBReference(PFS, MBB, Source.Value, Error))
|
2015-07-29 20:57:11 +00:00
|
|
|
return error(Error, Source.SourceRange);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-06-23 22:39:23 +00:00
|
|
|
SMDiagnostic MIRParserImpl::diagFromMIStringDiag(const SMDiagnostic &Error,
|
|
|
|
SMRange SourceRange) {
|
|
|
|
assert(SourceRange.isValid() && "Invalid source range");
|
|
|
|
SMLoc Loc = SourceRange.Start;
|
|
|
|
bool HasQuote = Loc.getPointer() < SourceRange.End.getPointer() &&
|
|
|
|
*Loc.getPointer() == '\'';
|
|
|
|
// Translate the location of the error from the location in the MI string to
|
|
|
|
// the corresponding location in the MIR file.
|
|
|
|
Loc = Loc.getFromPointer(Loc.getPointer() + Error.getColumnNo() +
|
|
|
|
(HasQuote ? 1 : 0));
|
|
|
|
|
|
|
|
// TODO: Translate any source ranges as well.
|
|
|
|
return SM.GetMessage(Loc, Error.getKind(), Error.getMessage(), None,
|
|
|
|
Error.getFixIts());
|
|
|
|
}
|
|
|
|
|
2015-08-13 20:30:11 +00:00
|
|
|
SMDiagnostic MIRParserImpl::diagFromBlockStringDiag(const SMDiagnostic &Error,
|
|
|
|
SMRange SourceRange) {
|
2015-05-29 17:05:41 +00:00
|
|
|
assert(SourceRange.isValid());
|
|
|
|
|
|
|
|
// Translate the location of the error from the location in the llvm IR string
|
|
|
|
// to the corresponding location in the MIR file.
|
|
|
|
auto LineAndColumn = SM.getLineAndColumn(SourceRange.Start);
|
|
|
|
unsigned Line = LineAndColumn.first + Error.getLineNo() - 1;
|
|
|
|
unsigned Column = Error.getColumnNo();
|
|
|
|
StringRef LineStr = Error.getLineContents();
|
|
|
|
SMLoc Loc = Error.getLoc();
|
|
|
|
|
|
|
|
// Get the full line and adjust the column number by taking the indentation of
|
|
|
|
// LLVM IR into account.
|
|
|
|
for (line_iterator L(*SM.getMemoryBuffer(SM.getMainFileID()), false), E;
|
|
|
|
L != E; ++L) {
|
|
|
|
if (L.line_number() == Line) {
|
|
|
|
LineStr = *L;
|
|
|
|
Loc = SMLoc::getFromPointer(LineStr.data());
|
|
|
|
auto Indent = LineStr.find(Error.getLineContents());
|
|
|
|
if (Indent != StringRef::npos)
|
|
|
|
Column += Indent;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return SMDiagnostic(SM, Loc, Filename, Line, Column, Error.getKind(),
|
|
|
|
Error.getMessage(), LineStr, Error.getRanges(),
|
|
|
|
Error.getFixIts());
|
|
|
|
}
|
|
|
|
|
2015-06-15 20:30:22 +00:00
|
|
|
MIRParser::MIRParser(std::unique_ptr<MIRParserImpl> Impl)
|
|
|
|
: Impl(std::move(Impl)) {}
|
|
|
|
|
|
|
|
MIRParser::~MIRParser() {}
|
|
|
|
|
Infer alignment of unmarked loads in IR/bitcode parsing.
For IR generated by a compiler, this is really simple: you just take the
datalayout from the beginning of the file, and apply it to all the IR
later in the file. For optimization testcases that don't care about the
datalayout, this is also really simple: we just use the default
datalayout.
The complexity here comes from the fact that some LLVM tools allow
overriding the datalayout: some tools have an explicit flag for this,
some tools will infer a datalayout based on the code generation target.
Supporting this properly required plumbing through a bunch of new
machinery: we want to allow overriding the datalayout after the
datalayout is parsed from the file, but before we use any information
from it. Therefore, IR/bitcode parsing now has a callback to allow tools
to compute the datalayout at the appropriate time.
Not sure if I covered all the LLVM tools that want to use the callback.
(clang? lli? Misc IR manipulation tools like llvm-link?). But this is at
least enough for all the LLVM regression tests, and IR without a
datalayout is not something frontends should generate.
This change had some sort of weird effects for certain CodeGen
regression tests: if the datalayout is overridden with a datalayout with
a different program or stack address space, we now parse IR based on the
overridden datalayout, instead of the one written in the file (or the
default one, if none is specified). This broke a few AVR tests, and one
AMDGPU test.
Outside the CodeGen tests I mentioned, the test changes are all just
fixing CHECK lines and moving around datalayout lines in weird places.
Differential Revision: https://reviews.llvm.org/D78403
2020-05-14 12:59:45 -07:00
|
|
|
std::unique_ptr<Module>
|
|
|
|
MIRParser::parseIRModule(DataLayoutCallbackTy DataLayoutCallback) {
|
|
|
|
return Impl->parseIRModule(DataLayoutCallback);
|
2017-06-06 00:44:35 +00:00
|
|
|
}
|
2015-06-15 20:30:22 +00:00
|
|
|
|
2017-06-06 00:44:35 +00:00
|
|
|
bool MIRParser::parseMachineFunctions(Module &M, MachineModuleInfo &MMI) {
|
|
|
|
return Impl->parseMachineFunctions(M, MMI);
|
2015-06-15 20:30:22 +00:00
|
|
|
}
|
|
|
|
|
2019-12-07 00:06:34 +05:30
|
|
|
std::unique_ptr<MIRParser> llvm::createMIRParserFromFile(
|
|
|
|
StringRef Filename, SMDiagnostic &Error, LLVMContext &Context,
|
|
|
|
std::function<void(Function &)> ProcessIRFunction) {
|
2017-06-06 20:06:57 +00:00
|
|
|
auto FileOrErr = MemoryBuffer::getFileOrSTDIN(Filename);
|
2015-05-27 18:02:19 +00:00
|
|
|
if (std::error_code EC = FileOrErr.getError()) {
|
|
|
|
Error = SMDiagnostic(Filename, SourceMgr::DK_Error,
|
|
|
|
"Could not open input file: " + EC.message());
|
2015-06-15 20:30:22 +00:00
|
|
|
return nullptr;
|
2015-05-27 18:02:19 +00:00
|
|
|
}
|
2019-12-07 00:06:34 +05:30
|
|
|
return createMIRParser(std::move(FileOrErr.get()), Context,
|
|
|
|
ProcessIRFunction);
|
2015-05-27 18:02:19 +00:00
|
|
|
}
|
|
|
|
|
2015-06-15 20:30:22 +00:00
|
|
|
std::unique_ptr<MIRParser>
|
|
|
|
llvm::createMIRParser(std::unique_ptr<MemoryBuffer> Contents,
|
2019-12-07 00:06:34 +05:30
|
|
|
LLVMContext &Context,
|
|
|
|
std::function<void(Function &)> ProcessIRFunction) {
|
2016-09-17 05:41:02 +00:00
|
|
|
auto Filename = Contents->getBufferIdentifier();
|
2016-09-17 05:33:58 +00:00
|
|
|
if (Context.shouldDiscardValueNames()) {
|
|
|
|
Context.diagnose(DiagnosticInfoMIRParser(
|
|
|
|
DS_Error,
|
|
|
|
SMDiagnostic(
|
|
|
|
Filename, SourceMgr::DK_Error,
|
|
|
|
"Can't read MIR with a Context that discards named Values")));
|
|
|
|
return nullptr;
|
|
|
|
}
|
2019-12-07 00:06:34 +05:30
|
|
|
return std::make_unique<MIRParser>(std::make_unique<MIRParserImpl>(
|
|
|
|
std::move(Contents), Filename, Context, ProcessIRFunction));
|
2015-05-27 18:02:19 +00:00
|
|
|
}
|