2017-08-08 16:29:35 +00:00
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//===-- KnownBits.cpp - Stores known zeros/ones ---------------------------===//
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//
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2019-01-19 08:50:56 +00:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2017-08-08 16:29:35 +00:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a class for representing known zeros and ones used by
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// computeKnownBits.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Support/KnownBits.h"
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2021-03-31 15:34:57 -07:00
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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2020-03-02 18:24:11 +01:00
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#include <cassert>
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2017-08-08 16:29:35 +00:00
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using namespace llvm;
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2019-04-12 18:18:08 +00:00
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static KnownBits computeForAddCarry(
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const KnownBits &LHS, const KnownBits &RHS,
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bool CarryZero, bool CarryOne) {
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assert(!(CarryZero && CarryOne) &&
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"Carry can't be zero and one at the same time");
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2017-08-08 16:29:35 +00:00
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2019-12-03 17:45:47 +03:00
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APInt PossibleSumZero = LHS.getMaxValue() + RHS.getMaxValue() + !CarryZero;
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APInt PossibleSumOne = LHS.getMinValue() + RHS.getMinValue() + CarryOne;
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2017-08-08 16:29:35 +00:00
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// Compute known bits of the carry.
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APInt CarryKnownZero = ~(PossibleSumZero ^ LHS.Zero ^ RHS.Zero);
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APInt CarryKnownOne = PossibleSumOne ^ LHS.One ^ RHS.One;
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// Compute set of known bits (where all three relevant bits are known).
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APInt LHSKnownUnion = LHS.Zero | LHS.One;
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APInt RHSKnownUnion = RHS.Zero | RHS.One;
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APInt CarryKnownUnion = std::move(CarryKnownZero) | CarryKnownOne;
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APInt Known = std::move(LHSKnownUnion) & RHSKnownUnion & CarryKnownUnion;
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assert((PossibleSumZero & Known) == (PossibleSumOne & Known) &&
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"known bits of sum differ");
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// Compute known bits of the result.
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KnownBits KnownOut;
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KnownOut.Zero = ~std::move(PossibleSumZero) & Known;
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KnownOut.One = std::move(PossibleSumOne) & Known;
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2019-04-12 18:18:08 +00:00
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return KnownOut;
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}
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KnownBits KnownBits::computeForAddCarry(
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const KnownBits &LHS, const KnownBits &RHS, const KnownBits &Carry) {
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assert(Carry.getBitWidth() == 1 && "Carry must be 1-bit");
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return ::computeForAddCarry(
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LHS, RHS, Carry.Zero.getBoolValue(), Carry.One.getBoolValue());
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}
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KnownBits KnownBits::computeForAddSub(bool Add, bool NSW,
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const KnownBits &LHS, KnownBits RHS) {
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KnownBits KnownOut;
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if (Add) {
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// Sum = LHS + RHS + 0
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KnownOut = ::computeForAddCarry(
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LHS, RHS, /*CarryZero*/true, /*CarryOne*/false);
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} else {
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// Sum = LHS + ~RHS + 1
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std::swap(RHS.Zero, RHS.One);
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KnownOut = ::computeForAddCarry(
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LHS, RHS, /*CarryZero*/false, /*CarryOne*/true);
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}
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2017-08-08 16:29:35 +00:00
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// Are we still trying to solve for the sign bit?
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2019-04-12 18:18:08 +00:00
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if (!KnownOut.isNegative() && !KnownOut.isNonNegative()) {
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2017-08-08 16:29:35 +00:00
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if (NSW) {
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// Adding two non-negative numbers, or subtracting a negative number from
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// a non-negative one, can't wrap into negative.
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if (LHS.isNonNegative() && RHS.isNonNegative())
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KnownOut.makeNonNegative();
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// Adding two negative numbers, or subtracting a non-negative number from
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// a negative one, can't wrap into non-negative.
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else if (LHS.isNegative() && RHS.isNegative())
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KnownOut.makeNegative();
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}
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}
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return KnownOut;
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}
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2020-02-05 16:15:53 +00:00
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2020-12-04 18:08:53 +00:00
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KnownBits KnownBits::sextInReg(unsigned SrcBitWidth) const {
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unsigned BitWidth = getBitWidth();
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2021-01-14 14:50:09 +00:00
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assert(0 < SrcBitWidth && SrcBitWidth <= BitWidth &&
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"Illegal sext-in-register");
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if (SrcBitWidth == BitWidth)
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return *this;
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2020-12-04 18:08:53 +00:00
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2021-01-14 15:14:11 +00:00
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unsigned ExtBits = BitWidth - SrcBitWidth;
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2020-12-04 18:08:53 +00:00
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KnownBits Result;
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2021-01-14 15:14:11 +00:00
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Result.One = One << ExtBits;
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Result.Zero = Zero << ExtBits;
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Result.One.ashrInPlace(ExtBits);
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Result.Zero.ashrInPlace(ExtBits);
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2020-12-04 18:08:53 +00:00
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return Result;
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}
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2020-09-02 16:01:48 +01:00
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KnownBits KnownBits::makeGE(const APInt &Val) const {
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// Count the number of leading bit positions where our underlying value is
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// known to be less than or equal to Val.
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2023-02-19 22:04:47 -08:00
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unsigned N = (Zero | Val).countl_one();
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2020-09-02 16:01:48 +01:00
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// For each of those bit positions, if Val has a 1 in that bit then our
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// underlying value must also have a 1.
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APInt MaskedVal(Val);
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MaskedVal.clearLowBits(getBitWidth() - N);
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return KnownBits(Zero, One | MaskedVal);
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}
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KnownBits KnownBits::umax(const KnownBits &LHS, const KnownBits &RHS) {
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// If we can prove that LHS >= RHS then use LHS as the result. Likewise for
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// RHS. Ideally our caller would already have spotted these cases and
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// optimized away the umax operation, but we handle them here for
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// completeness.
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if (LHS.getMinValue().uge(RHS.getMaxValue()))
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return LHS;
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if (RHS.getMinValue().uge(LHS.getMaxValue()))
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return RHS;
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// If the result of the umax is LHS then it must be greater than or equal to
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// the minimum possible value of RHS. Likewise for RHS. Any known bits that
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// are common to these two values are also known in the result.
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KnownBits L = LHS.makeGE(RHS.getMinValue());
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KnownBits R = RHS.makeGE(LHS.getMinValue());
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2023-05-10 16:50:33 +01:00
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return L.intersectWith(R);
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2020-09-02 16:01:48 +01:00
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}
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KnownBits KnownBits::umin(const KnownBits &LHS, const KnownBits &RHS) {
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// Flip the range of values: [0, 0xFFFFFFFF] <-> [0xFFFFFFFF, 0]
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2020-09-07 21:07:02 +02:00
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auto Flip = [](const KnownBits &Val) { return KnownBits(Val.One, Val.Zero); };
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2020-09-02 16:01:48 +01:00
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return Flip(umax(Flip(LHS), Flip(RHS)));
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}
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KnownBits KnownBits::smax(const KnownBits &LHS, const KnownBits &RHS) {
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// Flip the range of values: [-0x80000000, 0x7FFFFFFF] <-> [0, 0xFFFFFFFF]
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2020-09-07 21:07:02 +02:00
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auto Flip = [](const KnownBits &Val) {
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2020-09-02 16:01:48 +01:00
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unsigned SignBitPosition = Val.getBitWidth() - 1;
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APInt Zero = Val.Zero;
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APInt One = Val.One;
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Zero.setBitVal(SignBitPosition, Val.One[SignBitPosition]);
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One.setBitVal(SignBitPosition, Val.Zero[SignBitPosition]);
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return KnownBits(Zero, One);
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};
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return Flip(umax(Flip(LHS), Flip(RHS)));
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}
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KnownBits KnownBits::smin(const KnownBits &LHS, const KnownBits &RHS) {
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// Flip the range of values: [-0x80000000, 0x7FFFFFFF] <-> [0xFFFFFFFF, 0]
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2020-09-07 21:07:02 +02:00
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auto Flip = [](const KnownBits &Val) {
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2020-09-02 16:01:48 +01:00
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unsigned SignBitPosition = Val.getBitWidth() - 1;
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APInt Zero = Val.One;
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APInt One = Val.Zero;
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Zero.setBitVal(SignBitPosition, Val.Zero[SignBitPosition]);
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One.setBitVal(SignBitPosition, Val.One[SignBitPosition]);
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return KnownBits(Zero, One);
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};
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return Flip(umax(Flip(LHS), Flip(RHS)));
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}
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2023-05-22 14:21:56 +02:00
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KnownBits KnownBits::shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW,
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bool NSW) {
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2020-11-03 13:49:00 +00:00
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unsigned BitWidth = LHS.getBitWidth();
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2023-05-22 14:21:56 +02:00
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auto ShiftByConst = [&](const KnownBits &LHS,
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uint64_t ShiftAmt) -> std::optional<KnownBits> {
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KnownBits Known;
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Known.Zero = LHS.Zero << ShiftAmt;
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Known.Zero.setLowBits(ShiftAmt);
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Known.One = LHS.One << ShiftAmt;
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if ((!NUW && !NSW) || ShiftAmt == 0)
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return Known;
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KnownBits ShiftedOutBits = LHS.extractBits(ShiftAmt, BitWidth - ShiftAmt);
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if (NUW && !ShiftedOutBits.One.isZero())
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// One bit has been shifted out.
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return std::nullopt;
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if (NSW) {
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if (!ShiftedOutBits.Zero.isZero() && !ShiftedOutBits.One.isZero())
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// Both zeros and ones have been shifted out.
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return std::nullopt;
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if (NUW || !ShiftedOutBits.Zero.isZero()) {
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if (Known.isNegative())
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// Zero bit has been shifted out, but result sign is negative.
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return std::nullopt;
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Known.makeNonNegative();
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} else if (!ShiftedOutBits.One.isZero()) {
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if (Known.isNonNegative())
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// One bit has been shifted out, but result sign is negative.
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return std::nullopt;
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Known.makeNegative();
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}
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}
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return Known;
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};
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2020-11-03 13:49:00 +00:00
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// If the shift amount is a valid constant then transform LHS directly.
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if (RHS.isConstant() && RHS.getConstant().ult(BitWidth)) {
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2023-05-22 14:21:56 +02:00
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if (auto Res = ShiftByConst(LHS, RHS.getConstant().getZExtValue()))
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return *Res;
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KnownBits Known(BitWidth);
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Known.setAllZero();
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2020-11-03 13:49:00 +00:00
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return Known;
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}
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2023-05-22 14:21:56 +02:00
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KnownBits Known(BitWidth);
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2021-02-22 18:40:43 +00:00
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APInt MinShiftAmount = RHS.getMinValue();
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2023-05-15 17:56:02 +02:00
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if (MinShiftAmount.uge(BitWidth)) {
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// Always poison. Return zero because we don't like returning conflict.
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Known.setAllZero();
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2023-05-15 17:38:49 +02:00
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return Known;
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2023-05-15 17:56:02 +02:00
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}
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2023-05-15 17:38:49 +02:00
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2023-05-24 11:02:16 +02:00
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if (LHS.isUnknown()) {
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// No matter the shift amount, the trailing zeros will stay zero.
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unsigned MinTrailingZeros = LHS.countMinTrailingZeros();
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// Minimum shift amount low bits are known zero.
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MinTrailingZeros += MinShiftAmount.getZExtValue();
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MinTrailingZeros = std::min(MinTrailingZeros, BitWidth);
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Known.Zero.setLowBits(MinTrailingZeros);
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2023-05-22 14:21:56 +02:00
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if (NUW && NSW && !MinShiftAmount.isZero())
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Known.makeNonNegative();
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2023-05-24 11:02:16 +02:00
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return Known;
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}
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2020-11-03 13:49:00 +00:00
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2023-05-24 11:02:16 +02:00
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// Find the common bits from all possible shifts.
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2021-03-08 11:44:15 +00:00
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APInt MaxShiftAmount = RHS.getMaxValue();
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2023-05-24 11:02:16 +02:00
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uint64_t ShiftAmtZeroMask = (~RHS.Zero).zextOrTrunc(64).getZExtValue();
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uint64_t ShiftAmtOneMask = RHS.One.zextOrTrunc(64).getZExtValue();
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assert(MinShiftAmount.ult(MaxShiftAmount) && "Illegal shift range");
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Known.Zero.setAllBits();
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Known.One.setAllBits();
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for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(),
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MaxShiftAmt = MaxShiftAmount.getLimitedValue(BitWidth - 1);
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ShiftAmt <= MaxShiftAmt; ++ShiftAmt) {
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// Skip if the shift amount is impossible.
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if ((ShiftAmtZeroMask & ShiftAmt) != ShiftAmt ||
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(ShiftAmtOneMask | ShiftAmt) != ShiftAmt)
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continue;
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2023-05-22 14:21:56 +02:00
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auto Res = ShiftByConst(LHS, ShiftAmt);
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if (!Res)
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// All larger shift amounts will overflow as well.
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break;
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Known = Known.intersectWith(*Res);
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2023-05-24 11:02:16 +02:00
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if (Known.isUnknown())
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break;
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2021-03-08 11:44:15 +00:00
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}
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2023-05-22 14:21:56 +02:00
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// All shift amounts may result in poison.
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if (Known.hasConflict()) {
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assert((NUW || NSW) && "Can only happen with nowrap flags");
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Known.setAllZero();
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}
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2020-11-03 13:49:00 +00:00
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return Known;
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}
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2020-11-03 17:30:17 +00:00
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KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS) {
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unsigned BitWidth = LHS.getBitWidth();
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KnownBits Known(BitWidth);
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if (RHS.isConstant() && RHS.getConstant().ult(BitWidth)) {
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unsigned Shift = RHS.getConstant().getZExtValue();
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Known = LHS;
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Known.Zero.lshrInPlace(Shift);
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Known.One.lshrInPlace(Shift);
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// High bits are known zero.
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Known.Zero.setHighBits(Shift);
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return Known;
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}
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// Minimum shift amount high bits are known zero.
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2021-02-22 18:40:43 +00:00
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APInt MinShiftAmount = RHS.getMinValue();
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2023-05-15 17:56:02 +02:00
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if (MinShiftAmount.uge(BitWidth)) {
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// Always poison. Return zero because we don't like returning conflict.
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Known.setAllZero();
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2023-05-15 17:38:49 +02:00
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return Known;
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2023-05-15 17:56:02 +02:00
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}
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2023-05-15 17:38:49 +02:00
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2023-05-24 11:02:16 +02:00
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if (LHS.isUnknown()) {
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// No matter the shift amount, the leading zeros will stay zero.
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unsigned MinLeadingZeros = LHS.countMinLeadingZeros();
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MinLeadingZeros += MinShiftAmount.getZExtValue();
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MinLeadingZeros = std::min(MinLeadingZeros, BitWidth);
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Known.Zero.setHighBits(MinLeadingZeros);
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return Known;
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}
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2020-11-03 17:30:17 +00:00
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2023-05-24 11:02:16 +02:00
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// Find the common bits from all possible shifts.
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2021-03-08 11:44:15 +00:00
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APInt MaxShiftAmount = RHS.getMaxValue();
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2023-05-24 11:02:16 +02:00
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uint64_t ShiftAmtZeroMask = (~RHS.Zero).zextOrTrunc(64).getZExtValue();
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uint64_t ShiftAmtOneMask = RHS.One.zextOrTrunc(64).getZExtValue();
|
|
|
|
assert(MinShiftAmount.ult(MaxShiftAmount) && "Illegal shift range");
|
|
|
|
Known.Zero.setAllBits();
|
|
|
|
Known.One.setAllBits();
|
|
|
|
for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(),
|
|
|
|
MaxShiftAmt = MaxShiftAmount.getLimitedValue(BitWidth - 1);
|
|
|
|
ShiftAmt <= MaxShiftAmt; ++ShiftAmt) {
|
|
|
|
// Skip if the shift amount is impossible.
|
|
|
|
if ((ShiftAmtZeroMask & ShiftAmt) != ShiftAmt ||
|
|
|
|
(ShiftAmtOneMask | ShiftAmt) != ShiftAmt)
|
|
|
|
continue;
|
|
|
|
KnownBits SpecificShift = LHS;
|
|
|
|
SpecificShift.Zero.lshrInPlace(ShiftAmt);
|
|
|
|
SpecificShift.Zero.setHighBits(ShiftAmt);
|
|
|
|
SpecificShift.One.lshrInPlace(ShiftAmt);
|
|
|
|
Known = Known.intersectWith(SpecificShift);
|
|
|
|
if (Known.isUnknown())
|
|
|
|
break;
|
2021-03-08 11:44:15 +00:00
|
|
|
}
|
|
|
|
|
2020-11-03 17:30:17 +00:00
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
2020-11-03 18:09:15 +00:00
|
|
|
KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
|
|
KnownBits Known(BitWidth);
|
|
|
|
|
|
|
|
if (RHS.isConstant() && RHS.getConstant().ult(BitWidth)) {
|
|
|
|
unsigned Shift = RHS.getConstant().getZExtValue();
|
|
|
|
Known = LHS;
|
|
|
|
Known.Zero.ashrInPlace(Shift);
|
|
|
|
Known.One.ashrInPlace(Shift);
|
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
2020-11-13 16:25:44 +00:00
|
|
|
// Minimum shift amount high bits are known sign bits.
|
2021-02-22 18:40:43 +00:00
|
|
|
APInt MinShiftAmount = RHS.getMinValue();
|
2023-05-15 17:56:02 +02:00
|
|
|
if (MinShiftAmount.uge(BitWidth)) {
|
|
|
|
// Always poison. Return zero because we don't like returning conflict.
|
|
|
|
Known.setAllZero();
|
2023-05-15 17:38:49 +02:00
|
|
|
return Known;
|
2023-05-15 17:56:02 +02:00
|
|
|
}
|
2023-05-15 17:38:49 +02:00
|
|
|
|
2023-05-24 11:02:16 +02:00
|
|
|
if (LHS.isUnknown()) {
|
|
|
|
// No matter the shift amount, the leading sign bits will stay.
|
|
|
|
unsigned MinLeadingZeros = LHS.countMinLeadingZeros();
|
|
|
|
unsigned MinLeadingOnes = LHS.countMinLeadingOnes();
|
|
|
|
if (MinLeadingZeros) {
|
|
|
|
MinLeadingZeros += MinShiftAmount.getZExtValue();
|
|
|
|
MinLeadingZeros = std::min(MinLeadingZeros, BitWidth);
|
|
|
|
}
|
|
|
|
if (MinLeadingOnes) {
|
|
|
|
MinLeadingOnes += MinShiftAmount.getZExtValue();
|
|
|
|
MinLeadingOnes = std::min(MinLeadingOnes, BitWidth);
|
|
|
|
}
|
|
|
|
Known.Zero.setHighBits(MinLeadingZeros);
|
|
|
|
Known.One.setHighBits(MinLeadingOnes);
|
|
|
|
return Known;
|
2020-11-13 16:25:44 +00:00
|
|
|
}
|
|
|
|
|
2023-05-24 11:02:16 +02:00
|
|
|
// Find the common bits from all possible shifts.
|
2021-03-08 11:44:15 +00:00
|
|
|
APInt MaxShiftAmount = RHS.getMaxValue();
|
2023-05-24 11:02:16 +02:00
|
|
|
uint64_t ShiftAmtZeroMask = (~RHS.Zero).zextOrTrunc(64).getZExtValue();
|
|
|
|
uint64_t ShiftAmtOneMask = RHS.One.zextOrTrunc(64).getZExtValue();
|
|
|
|
assert(MinShiftAmount.ult(MaxShiftAmount) && "Illegal shift range");
|
|
|
|
Known.Zero.setAllBits();
|
|
|
|
Known.One.setAllBits();
|
|
|
|
for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(),
|
|
|
|
MaxShiftAmt = MaxShiftAmount.getLimitedValue(BitWidth - 1);
|
|
|
|
ShiftAmt <= MaxShiftAmt; ++ShiftAmt) {
|
|
|
|
// Skip if the shift amount is impossible.
|
|
|
|
if ((ShiftAmtZeroMask & ShiftAmt) != ShiftAmt ||
|
|
|
|
(ShiftAmtOneMask | ShiftAmt) != ShiftAmt)
|
|
|
|
continue;
|
|
|
|
KnownBits SpecificShift = LHS;
|
|
|
|
SpecificShift.Zero.ashrInPlace(ShiftAmt);
|
|
|
|
SpecificShift.One.ashrInPlace(ShiftAmt);
|
|
|
|
Known = Known.intersectWith(SpecificShift);
|
|
|
|
if (Known.isUnknown())
|
|
|
|
break;
|
2021-03-08 11:44:15 +00:00
|
|
|
}
|
|
|
|
|
2020-11-03 18:09:15 +00:00
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::eq(const KnownBits &LHS, const KnownBits &RHS) {
|
2021-01-04 12:18:59 +00:00
|
|
|
if (LHS.isConstant() && RHS.isConstant())
|
2022-12-16 08:49:10 +00:00
|
|
|
return std::optional<bool>(LHS.getConstant() == RHS.getConstant());
|
2021-01-04 12:18:59 +00:00
|
|
|
if (LHS.One.intersects(RHS.Zero) || RHS.One.intersects(LHS.Zero))
|
2022-12-16 08:49:10 +00:00
|
|
|
return std::optional<bool>(false);
|
2022-12-02 21:11:44 -08:00
|
|
|
return std::nullopt;
|
2021-01-04 12:18:59 +00:00
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::ne(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
if (std::optional<bool> KnownEQ = eq(LHS, RHS))
|
|
|
|
return std::optional<bool>(!*KnownEQ);
|
2022-12-02 21:11:44 -08:00
|
|
|
return std::nullopt;
|
2021-01-04 12:18:59 +00:00
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::ugt(const KnownBits &LHS, const KnownBits &RHS) {
|
2021-01-04 12:18:59 +00:00
|
|
|
// LHS >u RHS -> false if umax(LHS) <= umax(RHS)
|
|
|
|
if (LHS.getMaxValue().ule(RHS.getMinValue()))
|
2022-12-16 08:49:10 +00:00
|
|
|
return std::optional<bool>(false);
|
2021-01-04 12:18:59 +00:00
|
|
|
// LHS >u RHS -> true if umin(LHS) > umax(RHS)
|
|
|
|
if (LHS.getMinValue().ugt(RHS.getMaxValue()))
|
2022-12-16 08:49:10 +00:00
|
|
|
return std::optional<bool>(true);
|
2022-12-02 21:11:44 -08:00
|
|
|
return std::nullopt;
|
2021-01-04 12:18:59 +00:00
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::uge(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
if (std::optional<bool> IsUGT = ugt(RHS, LHS))
|
|
|
|
return std::optional<bool>(!*IsUGT);
|
2022-12-02 21:11:44 -08:00
|
|
|
return std::nullopt;
|
2021-01-04 12:18:59 +00:00
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::ult(const KnownBits &LHS, const KnownBits &RHS) {
|
2021-01-04 12:18:59 +00:00
|
|
|
return ugt(RHS, LHS);
|
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::ule(const KnownBits &LHS, const KnownBits &RHS) {
|
2021-01-04 12:18:59 +00:00
|
|
|
return uge(RHS, LHS);
|
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::sgt(const KnownBits &LHS, const KnownBits &RHS) {
|
2021-01-04 12:18:59 +00:00
|
|
|
// LHS >s RHS -> false if smax(LHS) <= smax(RHS)
|
|
|
|
if (LHS.getSignedMaxValue().sle(RHS.getSignedMinValue()))
|
2022-12-16 08:49:10 +00:00
|
|
|
return std::optional<bool>(false);
|
2021-01-04 12:18:59 +00:00
|
|
|
// LHS >s RHS -> true if smin(LHS) > smax(RHS)
|
|
|
|
if (LHS.getSignedMinValue().sgt(RHS.getSignedMaxValue()))
|
2022-12-16 08:49:10 +00:00
|
|
|
return std::optional<bool>(true);
|
2022-12-02 21:11:44 -08:00
|
|
|
return std::nullopt;
|
2021-01-04 12:18:59 +00:00
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::sge(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
if (std::optional<bool> KnownSGT = sgt(RHS, LHS))
|
|
|
|
return std::optional<bool>(!*KnownSGT);
|
2022-12-02 21:11:44 -08:00
|
|
|
return std::nullopt;
|
2021-01-04 12:18:59 +00:00
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::slt(const KnownBits &LHS, const KnownBits &RHS) {
|
2021-01-04 12:18:59 +00:00
|
|
|
return sgt(RHS, LHS);
|
|
|
|
}
|
|
|
|
|
2022-12-16 08:49:10 +00:00
|
|
|
std::optional<bool> KnownBits::sle(const KnownBits &LHS, const KnownBits &RHS) {
|
2021-01-04 12:18:59 +00:00
|
|
|
return sge(RHS, LHS);
|
|
|
|
}
|
|
|
|
|
2020-11-13 22:17:26 +01:00
|
|
|
KnownBits KnownBits::abs(bool IntMinIsPoison) const {
|
2020-09-09 13:22:39 +01:00
|
|
|
// If the source's MSB is zero then we know the rest of the bits already.
|
|
|
|
if (isNonNegative())
|
|
|
|
return *this;
|
|
|
|
|
2020-11-13 22:17:26 +01:00
|
|
|
// Absolute value preserves trailing zero count.
|
2020-09-09 13:22:39 +01:00
|
|
|
KnownBits KnownAbs(getBitWidth());
|
|
|
|
|
2023-05-23 11:11:09 -05:00
|
|
|
// If the input is negative, then abs(x) == -x.
|
|
|
|
if (isNegative()) {
|
|
|
|
KnownBits Tmp = *this;
|
|
|
|
// Special case for IntMinIsPoison. We know the sign bit is set and we know
|
|
|
|
// all the rest of the bits except one to be zero. Since we have
|
|
|
|
// IntMinIsPoison, that final bit MUST be a one, as otherwise the input is
|
|
|
|
// INT_MIN.
|
|
|
|
if (IntMinIsPoison && (Zero.popcount() + 2) == getBitWidth())
|
|
|
|
Tmp.One.setBit(countMinTrailingZeros());
|
|
|
|
|
|
|
|
KnownAbs = computeForAddSub(
|
|
|
|
/*Add*/ false, IntMinIsPoison,
|
|
|
|
KnownBits::makeConstant(APInt(getBitWidth(), 0)), Tmp);
|
|
|
|
|
|
|
|
// One more special case for IntMinIsPoison. If we don't know any ones other
|
|
|
|
// than the signbit, we know for certain that all the unknowns can't be
|
|
|
|
// zero. So if we know high zero bits, but have unknown low bits, we know
|
|
|
|
// for certain those high-zero bits will end up as one. This is because,
|
|
|
|
// the low bits can't be all zeros, so the +1 in (~x + 1) cannot carry up
|
|
|
|
// to the high bits. If we know a known INT_MIN input skip this. The result
|
|
|
|
// is poison anyways.
|
|
|
|
if (IntMinIsPoison && Tmp.countMinPopulation() == 1 &&
|
|
|
|
Tmp.countMaxPopulation() != 1) {
|
|
|
|
Tmp.One.clearSignBit();
|
|
|
|
Tmp.Zero.setSignBit();
|
|
|
|
KnownAbs.One.setBits(getBitWidth() - Tmp.countMinLeadingZeros(),
|
|
|
|
getBitWidth() - 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
} else {
|
|
|
|
unsigned MaxTZ = countMaxTrailingZeros();
|
|
|
|
unsigned MinTZ = countMinTrailingZeros();
|
|
|
|
|
|
|
|
KnownAbs.Zero.setLowBits(MinTZ);
|
|
|
|
// If we know the lowest set 1, then preserve it.
|
|
|
|
if (MaxTZ == MinTZ && MaxTZ < getBitWidth())
|
|
|
|
KnownAbs.One.setBit(MaxTZ);
|
|
|
|
|
|
|
|
// We only know that the absolute values's MSB will be zero if INT_MIN is
|
|
|
|
// poison, or there is a set bit that isn't the sign bit (otherwise it could
|
|
|
|
// be INT_MIN).
|
|
|
|
if (IntMinIsPoison || (!One.isZero() && !One.isMinSignedValue())) {
|
|
|
|
KnownAbs.One.clearSignBit();
|
|
|
|
KnownAbs.Zero.setSignBit();
|
|
|
|
}
|
|
|
|
}
|
2020-09-09 13:22:39 +01:00
|
|
|
|
2023-05-23 11:11:09 -05:00
|
|
|
assert(!KnownAbs.hasConflict() && "Bad Output");
|
2020-09-09 13:22:39 +01:00
|
|
|
return KnownAbs;
|
|
|
|
}
|
|
|
|
|
2023-05-23 11:13:13 -05:00
|
|
|
static KnownBits computeForSatAddSub(bool Add, bool Signed,
|
|
|
|
const KnownBits &LHS,
|
|
|
|
const KnownBits &RHS) {
|
|
|
|
assert(!LHS.hasConflict() && !RHS.hasConflict() && "Bad inputs");
|
|
|
|
// We don't see NSW even for sadd/ssub as we want to check if the result has
|
|
|
|
// signed overflow.
|
|
|
|
KnownBits Res = KnownBits::computeForAddSub(Add, /*NSW*/ false, LHS, RHS);
|
|
|
|
unsigned BitWidth = Res.getBitWidth();
|
|
|
|
auto SignBitKnown = [&](const KnownBits &K) {
|
|
|
|
return K.Zero[BitWidth - 1] || K.One[BitWidth - 1];
|
|
|
|
};
|
|
|
|
std::optional<bool> Overflow;
|
|
|
|
|
|
|
|
if (Signed) {
|
|
|
|
// If we can actually detect overflow do so. Otherwise leave Overflow as
|
|
|
|
// nullopt (we assume it may have happened).
|
|
|
|
if (SignBitKnown(LHS) && SignBitKnown(RHS) && SignBitKnown(Res)) {
|
|
|
|
if (Add) {
|
|
|
|
// sadd.sat
|
|
|
|
Overflow = (LHS.isNonNegative() == RHS.isNonNegative() &&
|
|
|
|
Res.isNonNegative() != LHS.isNonNegative());
|
|
|
|
} else {
|
|
|
|
// ssub.sat
|
|
|
|
Overflow = (LHS.isNonNegative() != RHS.isNonNegative() &&
|
|
|
|
Res.isNonNegative() != LHS.isNonNegative());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else if (Add) {
|
|
|
|
// uadd.sat
|
2023-05-24 11:14:26 +02:00
|
|
|
bool Of;
|
|
|
|
(void)LHS.getMaxValue().uadd_ov(RHS.getMaxValue(), Of);
|
|
|
|
if (!Of) {
|
|
|
|
Overflow = false;
|
|
|
|
} else {
|
2023-05-23 11:13:13 -05:00
|
|
|
(void)LHS.getMinValue().uadd_ov(RHS.getMinValue(), Of);
|
|
|
|
if (Of)
|
|
|
|
Overflow = true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// usub.sat
|
2023-05-24 11:14:26 +02:00
|
|
|
bool Of;
|
|
|
|
(void)LHS.getMinValue().usub_ov(RHS.getMaxValue(), Of);
|
|
|
|
if (!Of) {
|
|
|
|
Overflow = false;
|
|
|
|
} else {
|
2023-05-23 11:13:13 -05:00
|
|
|
(void)LHS.getMaxValue().usub_ov(RHS.getMinValue(), Of);
|
|
|
|
if (Of)
|
2023-05-24 11:14:26 +02:00
|
|
|
Overflow = true;
|
2023-05-23 11:13:13 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Signed) {
|
|
|
|
if (Add) {
|
|
|
|
if (LHS.isNonNegative() && RHS.isNonNegative()) {
|
|
|
|
// Pos + Pos -> Pos
|
|
|
|
Res.One.clearSignBit();
|
|
|
|
Res.Zero.setSignBit();
|
|
|
|
}
|
|
|
|
if (LHS.isNegative() && RHS.isNegative()) {
|
|
|
|
// Neg + Neg -> Neg
|
|
|
|
Res.One.setSignBit();
|
|
|
|
Res.Zero.clearSignBit();
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (LHS.isNegative() && RHS.isNonNegative()) {
|
|
|
|
// Neg - Pos -> Neg
|
|
|
|
Res.One.setSignBit();
|
|
|
|
Res.Zero.clearSignBit();
|
|
|
|
} else if (LHS.isNonNegative() && RHS.isNegative()) {
|
|
|
|
// Pos - Neg -> Pos
|
|
|
|
Res.One.clearSignBit();
|
|
|
|
Res.Zero.setSignBit();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// Add: Leading ones of either operand are preserved.
|
|
|
|
// Sub: Leading zeros of LHS and leading ones of RHS are preserved
|
|
|
|
// as leading zeros in the result.
|
|
|
|
unsigned LeadingKnown;
|
|
|
|
if (Add)
|
|
|
|
LeadingKnown =
|
|
|
|
std::max(LHS.countMinLeadingOnes(), RHS.countMinLeadingOnes());
|
|
|
|
else
|
|
|
|
LeadingKnown =
|
|
|
|
std::max(LHS.countMinLeadingZeros(), RHS.countMinLeadingOnes());
|
|
|
|
|
|
|
|
// We select between the operation result and all-ones/zero
|
|
|
|
// respectively, so we can preserve known ones/zeros.
|
|
|
|
APInt Mask = APInt::getHighBitsSet(BitWidth, LeadingKnown);
|
|
|
|
if (Add) {
|
|
|
|
Res.One |= Mask;
|
|
|
|
Res.Zero &= ~Mask;
|
|
|
|
} else {
|
|
|
|
Res.Zero |= Mask;
|
|
|
|
Res.One &= ~Mask;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Overflow) {
|
|
|
|
// We know whether or not we overflowed.
|
|
|
|
if (!(*Overflow)) {
|
|
|
|
// No overflow.
|
|
|
|
assert(!Res.hasConflict() && "Bad Output");
|
|
|
|
return Res;
|
|
|
|
}
|
|
|
|
|
|
|
|
// We overflowed
|
|
|
|
APInt C;
|
|
|
|
if (Signed) {
|
|
|
|
// sadd.sat / ssub.sat
|
|
|
|
assert(SignBitKnown(LHS) &&
|
|
|
|
"We somehow know overflow without knowing input sign");
|
|
|
|
C = LHS.isNegative() ? APInt::getSignedMinValue(BitWidth)
|
|
|
|
: APInt::getSignedMaxValue(BitWidth);
|
|
|
|
} else if (Add) {
|
|
|
|
// uadd.sat
|
|
|
|
C = APInt::getMaxValue(BitWidth);
|
|
|
|
} else {
|
|
|
|
// uadd.sat
|
|
|
|
C = APInt::getMinValue(BitWidth);
|
|
|
|
}
|
|
|
|
|
|
|
|
Res.One = C;
|
|
|
|
Res.Zero = ~C;
|
|
|
|
assert(!Res.hasConflict() && "Bad Output");
|
|
|
|
return Res;
|
|
|
|
}
|
|
|
|
|
|
|
|
// We don't know if we overflowed.
|
|
|
|
if (Signed) {
|
|
|
|
// sadd.sat/ssub.sat
|
|
|
|
// We can keep our information about the sign bits.
|
|
|
|
Res.Zero.clearLowBits(BitWidth - 1);
|
|
|
|
Res.One.clearLowBits(BitWidth - 1);
|
|
|
|
} else if (Add) {
|
|
|
|
// uadd.sat
|
|
|
|
// We need to clear all the known zeros as we can only use the leading ones.
|
|
|
|
Res.Zero.clearAllBits();
|
|
|
|
} else {
|
|
|
|
// usub.sat
|
|
|
|
// We need to clear all the known ones as we can only use the leading zero.
|
|
|
|
Res.One.clearAllBits();
|
|
|
|
}
|
|
|
|
|
|
|
|
assert(!Res.hasConflict() && "Bad Output");
|
|
|
|
return Res;
|
|
|
|
}
|
|
|
|
|
|
|
|
KnownBits KnownBits::sadd_sat(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
return computeForSatAddSub(/*Add*/ true, /*Signed*/ true, LHS, RHS);
|
|
|
|
}
|
|
|
|
KnownBits KnownBits::ssub_sat(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
return computeForSatAddSub(/*Add*/ false, /*Signed*/ true, LHS, RHS);
|
|
|
|
}
|
|
|
|
KnownBits KnownBits::uadd_sat(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
return computeForSatAddSub(/*Add*/ true, /*Signed*/ false, LHS, RHS);
|
|
|
|
}
|
|
|
|
KnownBits KnownBits::usub_sat(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
return computeForSatAddSub(/*Add*/ false, /*Signed*/ false, LHS, RHS);
|
|
|
|
}
|
|
|
|
|
2021-09-07 11:43:26 +01:00
|
|
|
KnownBits KnownBits::mul(const KnownBits &LHS, const KnownBits &RHS,
|
2022-02-06 19:40:08 +00:00
|
|
|
bool NoUndefSelfMultiply) {
|
2020-10-06 14:41:31 -07:00
|
|
|
unsigned BitWidth = LHS.getBitWidth();
|
2021-03-25 17:04:47 +00:00
|
|
|
assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
|
|
|
|
!RHS.hasConflict() && "Operand mismatch");
|
2022-05-16 17:20:19 +02:00
|
|
|
assert((!NoUndefSelfMultiply || LHS == RHS) &&
|
|
|
|
"Self multiplication knownbits mismatch");
|
2020-10-06 14:41:31 -07:00
|
|
|
|
2021-12-20 09:10:50 -05:00
|
|
|
// Compute the high known-0 bits by multiplying the unsigned max of each side.
|
|
|
|
// Conservatively, M active bits * N active bits results in M + N bits in the
|
|
|
|
// result. But if we know a value is a power-of-2 for example, then this
|
|
|
|
// computes one more leading zero.
|
2021-12-08 11:39:36 -05:00
|
|
|
// TODO: This could be generalized to number of sign bits (negative numbers).
|
2021-12-20 09:10:50 -05:00
|
|
|
APInt UMaxLHS = LHS.getMaxValue();
|
|
|
|
APInt UMaxRHS = RHS.getMaxValue();
|
|
|
|
|
|
|
|
// For leading zeros in the result to be valid, the unsigned max product must
|
|
|
|
// fit in the bitwidth (it must not overflow).
|
|
|
|
bool HasOverflow;
|
|
|
|
APInt UMaxResult = UMaxLHS.umul_ov(UMaxRHS, HasOverflow);
|
2023-02-19 22:04:47 -08:00
|
|
|
unsigned LeadZ = HasOverflow ? 0 : UMaxResult.countl_zero();
|
2020-10-06 14:41:31 -07:00
|
|
|
|
|
|
|
// The result of the bottom bits of an integer multiply can be
|
|
|
|
// inferred by looking at the bottom bits of both operands and
|
|
|
|
// multiplying them together.
|
|
|
|
// We can infer at least the minimum number of known trailing bits
|
|
|
|
// of both operands. Depending on number of trailing zeros, we can
|
|
|
|
// infer more bits, because (a*b) <=> ((a/m) * (b/n)) * (m*n) assuming
|
|
|
|
// a and b are divisible by m and n respectively.
|
|
|
|
// We then calculate how many of those bits are inferrable and set
|
|
|
|
// the output. For example, the i8 mul:
|
|
|
|
// a = XXXX1100 (12)
|
|
|
|
// b = XXXX1110 (14)
|
|
|
|
// We know the bottom 3 bits are zero since the first can be divided by
|
|
|
|
// 4 and the second by 2, thus having ((12/4) * (14/2)) * (2*4).
|
|
|
|
// Applying the multiplication to the trimmed arguments gets:
|
|
|
|
// XX11 (3)
|
|
|
|
// X111 (7)
|
|
|
|
// -------
|
|
|
|
// XX11
|
|
|
|
// XX11
|
|
|
|
// XX11
|
|
|
|
// XX11
|
|
|
|
// -------
|
|
|
|
// XXXXX01
|
|
|
|
// Which allows us to infer the 2 LSBs. Since we're multiplying the result
|
|
|
|
// by 8, the bottom 3 bits will be 0, so we can infer a total of 5 bits.
|
|
|
|
// The proof for this can be described as:
|
|
|
|
// Pre: (C1 >= 0) && (C1 < (1 << C5)) && (C2 >= 0) && (C2 < (1 << C6)) &&
|
|
|
|
// (C7 == (1 << (umin(countTrailingZeros(C1), C5) +
|
|
|
|
// umin(countTrailingZeros(C2), C6) +
|
|
|
|
// umin(C5 - umin(countTrailingZeros(C1), C5),
|
|
|
|
// C6 - umin(countTrailingZeros(C2), C6)))) - 1)
|
|
|
|
// %aa = shl i8 %a, C5
|
|
|
|
// %bb = shl i8 %b, C6
|
|
|
|
// %aaa = or i8 %aa, C1
|
|
|
|
// %bbb = or i8 %bb, C2
|
|
|
|
// %mul = mul i8 %aaa, %bbb
|
|
|
|
// %mask = and i8 %mul, C7
|
|
|
|
// =>
|
|
|
|
// %mask = i8 ((C1*C2)&C7)
|
|
|
|
// Where C5, C6 describe the known bits of %a, %b
|
|
|
|
// C1, C2 describe the known bottom bits of %a, %b.
|
|
|
|
// C7 describes the mask of the known bits of the result.
|
2020-11-04 17:15:54 +00:00
|
|
|
const APInt &Bottom0 = LHS.One;
|
|
|
|
const APInt &Bottom1 = RHS.One;
|
2020-10-06 14:41:31 -07:00
|
|
|
|
|
|
|
// How many times we'd be able to divide each argument by 2 (shr by 1).
|
|
|
|
// This gives us the number of trailing zeros on the multiplication result.
|
2023-02-19 22:04:47 -08:00
|
|
|
unsigned TrailBitsKnown0 = (LHS.Zero | LHS.One).countr_one();
|
|
|
|
unsigned TrailBitsKnown1 = (RHS.Zero | RHS.One).countr_one();
|
2020-10-06 14:41:31 -07:00
|
|
|
unsigned TrailZero0 = LHS.countMinTrailingZeros();
|
|
|
|
unsigned TrailZero1 = RHS.countMinTrailingZeros();
|
|
|
|
unsigned TrailZ = TrailZero0 + TrailZero1;
|
|
|
|
|
|
|
|
// Figure out the fewest known-bits operand.
|
|
|
|
unsigned SmallestOperand =
|
|
|
|
std::min(TrailBitsKnown0 - TrailZero0, TrailBitsKnown1 - TrailZero1);
|
|
|
|
unsigned ResultBitsKnown = std::min(SmallestOperand + TrailZ, BitWidth);
|
|
|
|
|
|
|
|
APInt BottomKnown =
|
|
|
|
Bottom0.getLoBits(TrailBitsKnown0) * Bottom1.getLoBits(TrailBitsKnown1);
|
|
|
|
|
|
|
|
KnownBits Res(BitWidth);
|
|
|
|
Res.Zero.setHighBits(LeadZ);
|
|
|
|
Res.Zero |= (~BottomKnown).getLoBits(ResultBitsKnown);
|
|
|
|
Res.One = BottomKnown.getLoBits(ResultBitsKnown);
|
2021-09-07 11:43:26 +01:00
|
|
|
|
|
|
|
// If we're self-multiplying then bit[1] is guaranteed to be zero.
|
2022-02-06 19:40:08 +00:00
|
|
|
if (NoUndefSelfMultiply && BitWidth > 1) {
|
2021-09-07 11:43:26 +01:00
|
|
|
assert(Res.One[1] == 0 &&
|
|
|
|
"Self-multiplication failed Quadratic Reciprocity!");
|
|
|
|
Res.Zero.setBit(1);
|
|
|
|
}
|
|
|
|
|
2020-10-06 14:41:31 -07:00
|
|
|
return Res;
|
|
|
|
}
|
|
|
|
|
2021-03-18 22:36:01 +00:00
|
|
|
KnownBits KnownBits::mulhs(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
|
|
assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
|
|
|
|
!RHS.hasConflict() && "Operand mismatch");
|
|
|
|
KnownBits WideLHS = LHS.sext(2 * BitWidth);
|
|
|
|
KnownBits WideRHS = RHS.sext(2 * BitWidth);
|
2021-03-25 17:04:47 +00:00
|
|
|
return mul(WideLHS, WideRHS).extractBits(BitWidth, BitWidth);
|
2021-03-18 22:36:01 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
KnownBits KnownBits::mulhu(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
|
|
assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
|
|
|
|
!RHS.hasConflict() && "Operand mismatch");
|
|
|
|
KnownBits WideLHS = LHS.zext(2 * BitWidth);
|
|
|
|
KnownBits WideRHS = RHS.zext(2 * BitWidth);
|
2021-03-25 17:04:47 +00:00
|
|
|
return mul(WideLHS, WideRHS).extractBits(BitWidth, BitWidth);
|
2021-03-18 22:36:01 +00:00
|
|
|
}
|
|
|
|
|
2023-05-06 20:58:08 -05:00
|
|
|
KnownBits KnownBits::sdiv(const KnownBits &LHS, const KnownBits &RHS,
|
|
|
|
bool Exact) {
|
|
|
|
// Equivilent of `udiv`. We must have caught this before it was folded.
|
|
|
|
if (LHS.isNonNegative() && RHS.isNonNegative())
|
2023-05-06 20:58:23 -05:00
|
|
|
return udiv(LHS, RHS, Exact);
|
2023-05-06 20:58:08 -05:00
|
|
|
|
|
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
|
|
assert(!LHS.hasConflict() && !RHS.hasConflict() && "Bad inputs");
|
|
|
|
KnownBits Known(BitWidth);
|
|
|
|
|
|
|
|
APInt Num, Denum;
|
|
|
|
// Positive -> true
|
|
|
|
// Negative -> false
|
|
|
|
// Unknown -> nullopt
|
|
|
|
std::optional<bool> ResultSign;
|
|
|
|
if (LHS.isNegative() && RHS.isNegative()) {
|
|
|
|
Denum = RHS.getSignedMaxValue();
|
|
|
|
Num = LHS.getSignedMinValue();
|
|
|
|
ResultSign = true;
|
|
|
|
// Result non-negative.
|
|
|
|
} else if (LHS.isNegative() && RHS.isStrictlyPositive()) {
|
|
|
|
// Result is non-negative if Exact OR -LHS u>= RHS.
|
|
|
|
if (Exact || (-LHS.getSignedMaxValue()).uge(RHS.getSignedMaxValue())) {
|
|
|
|
Denum = RHS.getSignedMinValue();
|
|
|
|
Num = LHS.getSignedMinValue();
|
|
|
|
ResultSign = false;
|
|
|
|
}
|
|
|
|
} else if (LHS.isStrictlyPositive() && RHS.isNegative()) {
|
|
|
|
// Result is non-negative if Exact OR LHS u>= -RHS.
|
|
|
|
if (Exact || LHS.getSignedMinValue().uge(-RHS.getSignedMinValue())) {
|
|
|
|
Denum = RHS.getSignedMaxValue();
|
|
|
|
Num = LHS.getSignedMaxValue();
|
|
|
|
ResultSign = false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ResultSign) {
|
|
|
|
APInt Res = Num.sdiv(Denum);
|
|
|
|
if (*ResultSign) {
|
|
|
|
unsigned LeadZ = Res.countLeadingZeros();
|
|
|
|
Known.Zero.setHighBits(LeadZ);
|
|
|
|
Known.makeNonNegative();
|
|
|
|
} else {
|
|
|
|
unsigned LeadO = Res.countLeadingOnes();
|
|
|
|
Known.One.setHighBits(LeadO);
|
|
|
|
Known.makeNegative();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Exact) {
|
|
|
|
// Odd / Odd -> Odd
|
|
|
|
if (LHS.One[0] && RHS.One[0]) {
|
|
|
|
Known.Zero.clearBit(0);
|
|
|
|
Known.One.setBit(0);
|
|
|
|
}
|
|
|
|
// Even / Odd -> Even
|
|
|
|
else if (LHS.Zero[0] && RHS.One[0]) {
|
|
|
|
Known.One.clearBit(0);
|
|
|
|
Known.Zero.setBit(0);
|
|
|
|
}
|
|
|
|
// Odd / Even -> impossible
|
|
|
|
// Even / Even -> unknown
|
|
|
|
}
|
|
|
|
|
|
|
|
assert(!Known.hasConflict() && "Bad Output");
|
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
2023-05-06 20:58:23 -05:00
|
|
|
KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS,
|
|
|
|
bool Exact) {
|
2020-11-05 13:42:27 +00:00
|
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
|
|
assert(!LHS.hasConflict() && !RHS.hasConflict());
|
|
|
|
KnownBits Known(BitWidth);
|
|
|
|
|
2023-05-06 20:58:23 -05:00
|
|
|
// We can figure out the minimum number of upper zero bits by doing
|
|
|
|
// MaxNumerator / MinDenominator. If the Numerator gets smaller or Denominator
|
|
|
|
// gets larger, the number of upper zero bits increases.
|
|
|
|
APInt MinDenum = RHS.getMinValue();
|
|
|
|
APInt MaxNum = LHS.getMaxValue();
|
|
|
|
APInt MaxRes = MinDenum.isZero() ? MaxNum : MaxNum.udiv(MinDenum);
|
2020-11-05 13:42:27 +00:00
|
|
|
|
2023-05-06 20:58:23 -05:00
|
|
|
unsigned LeadZ = MaxRes.countLeadingZeros();
|
2020-11-05 13:42:27 +00:00
|
|
|
|
|
|
|
Known.Zero.setHighBits(LeadZ);
|
2023-05-06 20:58:23 -05:00
|
|
|
if (Exact) {
|
|
|
|
// Odd / Odd -> Odd
|
|
|
|
if (LHS.One[0] && RHS.One[0])
|
|
|
|
Known.One.setBit(0);
|
|
|
|
// Even / Odd -> Even
|
|
|
|
else if (LHS.Zero[0] && RHS.One[0])
|
|
|
|
Known.Zero.setBit(0);
|
|
|
|
// Odd / Even -> impossible
|
|
|
|
// Even / Even -> unknown
|
2023-05-24 10:32:20 +02:00
|
|
|
if (Known.hasConflict())
|
|
|
|
Known.setAllZero();
|
2023-05-06 20:58:23 -05:00
|
|
|
}
|
|
|
|
|
2020-11-05 13:42:27 +00:00
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
2023-05-07 16:46:49 -05:00
|
|
|
KnownBits KnownBits::remGetLowBits(const KnownBits &LHS, const KnownBits &RHS) {
|
2020-11-05 14:29:13 +00:00
|
|
|
unsigned BitWidth = LHS.getBitWidth();
|
2023-05-07 16:46:49 -05:00
|
|
|
if (!RHS.isZero() && RHS.Zero[0]) {
|
|
|
|
// rem X, Y where Y[0:N] is zero will preserve X[0:N] in the result.
|
|
|
|
unsigned RHSZeros = RHS.countMinTrailingZeros();
|
|
|
|
APInt Mask = APInt::getLowBitsSet(BitWidth, RHSZeros);
|
|
|
|
APInt OnesMask = LHS.One & Mask;
|
|
|
|
APInt ZerosMask = LHS.Zero & Mask;
|
|
|
|
return KnownBits(ZerosMask, OnesMask);
|
|
|
|
}
|
|
|
|
return KnownBits(BitWidth);
|
|
|
|
}
|
|
|
|
|
|
|
|
KnownBits KnownBits::urem(const KnownBits &LHS, const KnownBits &RHS) {
|
2020-11-05 14:29:13 +00:00
|
|
|
assert(!LHS.hasConflict() && !RHS.hasConflict());
|
|
|
|
|
2023-05-07 16:46:49 -05:00
|
|
|
KnownBits Known = remGetLowBits(LHS, RHS);
|
2020-11-05 14:29:13 +00:00
|
|
|
if (RHS.isConstant() && RHS.getConstant().isPowerOf2()) {
|
2023-05-07 16:46:49 -05:00
|
|
|
// NB: Low bits set in `remGetLowBits`.
|
|
|
|
APInt HighBits = ~(RHS.getConstant() - 1);
|
|
|
|
Known.Zero |= HighBits;
|
2020-11-05 14:29:13 +00:00
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Since the result is less than or equal to either operand, any leading
|
|
|
|
// zero bits in either operand must also exist in the result.
|
|
|
|
uint32_t Leaders =
|
|
|
|
std::max(LHS.countMinLeadingZeros(), RHS.countMinLeadingZeros());
|
|
|
|
Known.Zero.setHighBits(Leaders);
|
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
2020-11-05 14:55:42 +00:00
|
|
|
KnownBits KnownBits::srem(const KnownBits &LHS, const KnownBits &RHS) {
|
|
|
|
assert(!LHS.hasConflict() && !RHS.hasConflict());
|
|
|
|
|
2023-05-07 16:46:49 -05:00
|
|
|
KnownBits Known = remGetLowBits(LHS, RHS);
|
2020-11-05 14:55:42 +00:00
|
|
|
if (RHS.isConstant() && RHS.getConstant().isPowerOf2()) {
|
2023-05-07 16:46:49 -05:00
|
|
|
// NB: Low bits are set in `remGetLowBits`.
|
2020-11-05 14:55:42 +00:00
|
|
|
APInt LowBits = RHS.getConstant() - 1;
|
|
|
|
// If the first operand is non-negative or has all low bits zero, then
|
|
|
|
// the upper bits are all zero.
|
|
|
|
if (LHS.isNonNegative() || LowBits.isSubsetOf(LHS.Zero))
|
|
|
|
Known.Zero |= ~LowBits;
|
|
|
|
|
|
|
|
// If the first operand is negative and not all low bits are zero, then
|
|
|
|
// the upper bits are all one.
|
|
|
|
if (LHS.isNegative() && LowBits.intersects(LHS.One))
|
|
|
|
Known.One |= ~LowBits;
|
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
|
|
|
// The sign bit is the LHS's sign bit, except when the result of the
|
2021-02-21 14:48:27 -08:00
|
|
|
// remainder is zero. The magnitude of the result should be less than or
|
|
|
|
// equal to the magnitude of the LHS. Therefore any leading zeros that exist
|
|
|
|
// in the left hand side must also exist in the result.
|
|
|
|
Known.Zero.setHighBits(LHS.countMinLeadingZeros());
|
2020-11-05 14:55:42 +00:00
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
2020-02-05 16:15:53 +00:00
|
|
|
KnownBits &KnownBits::operator&=(const KnownBits &RHS) {
|
|
|
|
// Result bit is 0 if either operand bit is 0.
|
|
|
|
Zero |= RHS.Zero;
|
|
|
|
// Result bit is 1 if both operand bits are 1.
|
|
|
|
One &= RHS.One;
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
|
|
|
KnownBits &KnownBits::operator|=(const KnownBits &RHS) {
|
|
|
|
// Result bit is 0 if both operand bits are 0.
|
|
|
|
Zero &= RHS.Zero;
|
|
|
|
// Result bit is 1 if either operand bit is 1.
|
|
|
|
One |= RHS.One;
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
|
|
|
KnownBits &KnownBits::operator^=(const KnownBits &RHS) {
|
|
|
|
// Result bit is 0 if both operand bits are 0 or both are 1.
|
|
|
|
APInt Z = (Zero & RHS.Zero) | (One & RHS.One);
|
|
|
|
// Result bit is 1 if one operand bit is 0 and the other is 1.
|
|
|
|
One = (Zero & RHS.One) | (One & RHS.Zero);
|
|
|
|
Zero = std::move(Z);
|
|
|
|
return *this;
|
|
|
|
}
|
2021-03-31 15:34:57 -07:00
|
|
|
|
2023-01-26 11:34:50 -06:00
|
|
|
KnownBits KnownBits::blsi() const {
|
|
|
|
unsigned BitWidth = getBitWidth();
|
|
|
|
KnownBits Known(Zero, APInt(BitWidth, 0));
|
|
|
|
unsigned Max = countMaxTrailingZeros();
|
|
|
|
Known.Zero.setBitsFrom(std::min(Max + 1, BitWidth));
|
|
|
|
unsigned Min = countMinTrailingZeros();
|
|
|
|
if (Max == Min && Max < BitWidth)
|
|
|
|
Known.One.setBit(Max);
|
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
|
|
|
KnownBits KnownBits::blsmsk() const {
|
|
|
|
unsigned BitWidth = getBitWidth();
|
|
|
|
KnownBits Known(BitWidth);
|
|
|
|
unsigned Max = countMaxTrailingZeros();
|
|
|
|
Known.Zero.setBitsFrom(std::min(Max + 1, BitWidth));
|
|
|
|
unsigned Min = countMinTrailingZeros();
|
|
|
|
Known.One.setLowBits(std::min(Min + 1, BitWidth));
|
|
|
|
return Known;
|
|
|
|
}
|
|
|
|
|
2021-03-31 15:34:57 -07:00
|
|
|
void KnownBits::print(raw_ostream &OS) const {
|
2023-05-15 15:41:16 +02:00
|
|
|
unsigned BitWidth = getBitWidth();
|
|
|
|
for (unsigned I = 0; I < BitWidth; ++I) {
|
|
|
|
unsigned N = BitWidth - I - 1;
|
|
|
|
if (Zero[N] && One[N])
|
|
|
|
OS << "!";
|
|
|
|
else if (Zero[N])
|
|
|
|
OS << "0";
|
|
|
|
else if (One[N])
|
|
|
|
OS << "1";
|
|
|
|
else
|
|
|
|
OS << "?";
|
|
|
|
}
|
2021-03-31 15:34:57 -07:00
|
|
|
}
|
|
|
|
void KnownBits::dump() const {
|
|
|
|
print(dbgs());
|
|
|
|
dbgs() << "\n";
|
|
|
|
}
|