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llvm-project/llvm/docs/AMDGPU/gfx90a_vdata_0c567e.rst

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[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX90A; - minor bugfixing and improvements.
2021-05-14 16:11:36 +03:00
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[AMDGPU][GFX90A][DOC][NFC] Update assembler syntax description Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable VOP3 variants of dot2c/dot4c/dot8c instructions (https://reviews.llvm.org/D138494). - Enable omod modifiers for v_max3_f16, v_min3_f16, etc. (https://reviews.llvm.org/D139469). - Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900). - Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet). - Enable abs and neg modifiers for v_dot2c_f32_f16_dpp. - Minor corrections and improvements.
2022-12-13 14:18:20 +03:00
.. _amdgpu_synid_gfx90a_vdata_0c567e:
[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX90A; - minor bugfixing and improvements.
2021-05-14 16:11:36 +03:00
vdata
=====
Input data for an atomic instruction.
[AMDGPU][GFX90A][DOC][NFC] Update assembler syntax description Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable VOP3 variants of dot2c/dot4c/dot8c instructions (https://reviews.llvm.org/D138494). - Enable omod modifiers for v_max3_f16, v_min3_f16, etc. (https://reviews.llvm.org/D139469). - Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900). - Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet). - Enable abs and neg modifiers for v_dot2c_f32_f16_dpp. - Minor corrections and improvements.
2022-12-13 14:18:20 +03:00
Optionally, this operand may be used to store output data:
[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX90A; - minor bugfixing and improvements.
2021-05-14 16:11:36 +03:00
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
*Size:* 4 dwords.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
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