2018-03-08 13:05:02 +00:00
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//===-- llvm-mca.cpp - Machine Code Analyzer -------------------*- C++ -* -===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This utility is a simple driver that allows static performance analysis on
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// machine code similarly to how IACA (Intel Architecture Code Analyzer) works.
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//
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// llvm-mca [options] <file-name>
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// -march <type>
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// -mcpu <cpu>
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// -o <file>
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//
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// The target defaults to the host target.
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2018-04-25 10:18:25 +00:00
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// The cpu defaults to the 'native' host cpu.
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2018-03-08 13:05:02 +00:00
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// The output defaults to standard output.
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//
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//===----------------------------------------------------------------------===//
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2018-04-09 16:39:52 +00:00
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#include "CodeRegion.h"
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2018-07-06 18:03:14 +00:00
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#include "Context.h"
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2018-04-10 14:55:14 +00:00
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#include "DispatchStatistics.h"
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2018-03-23 19:40:04 +00:00
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#include "InstructionInfoView.h"
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2018-03-26 12:04:53 +00:00
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#include "InstructionTables.h"
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2018-06-25 16:53:00 +00:00
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#include "Pipeline.h"
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#include "PipelinePrinter.h"
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2018-04-03 16:46:23 +00:00
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#include "RegisterFileStatistics.h"
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2018-03-09 12:50:42 +00:00
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#include "ResourcePressureView.h"
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2018-04-11 12:12:53 +00:00
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#include "RetireControlUnitStatistics.h"
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2018-04-11 11:37:46 +00:00
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#include "SchedulerStatistics.h"
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2018-03-09 13:52:03 +00:00
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#include "SummaryView.h"
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2018-03-09 12:50:42 +00:00
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#include "TimelineView.h"
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2018-03-08 13:05:02 +00:00
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCObjectFileInfo.h"
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#include "llvm/MC/MCParser/MCTargetAsmParser.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/Support/CommandLine.h"
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2018-03-08 16:08:43 +00:00
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#include "llvm/Support/ErrorOr.h"
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#include "llvm/Support/FileSystem.h"
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2018-04-25 10:27:30 +00:00
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#include "llvm/Support/Host.h"
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2018-04-13 18:26:06 +00:00
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#include "llvm/Support/InitLLVM.h"
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2018-03-08 13:05:02 +00:00
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#include "llvm/Support/MemoryBuffer.h"
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#include "llvm/Support/SourceMgr.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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2018-03-08 16:08:43 +00:00
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#include "llvm/Support/ToolOutputFile.h"
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2018-04-18 15:26:51 +00:00
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#include "llvm/Support/WithColor.h"
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2018-03-08 13:05:02 +00:00
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using namespace llvm;
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2018-05-17 15:35:14 +00:00
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static cl::OptionCategory ToolOptions("Tool Options");
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static cl::OptionCategory ViewOptions("View Options");
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2018-04-25 11:33:14 +00:00
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2018-05-17 15:35:14 +00:00
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static cl::opt<std::string> InputFilename(cl::Positional,
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cl::desc("<input file>"),
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cl::cat(ToolOptions), cl::init("-"));
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2018-03-08 13:05:02 +00:00
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static cl::opt<std::string> OutputFilename("o", cl::desc("Output filename"),
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2018-05-17 15:35:14 +00:00
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cl::init("-"), cl::cat(ToolOptions),
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2018-03-08 13:05:02 +00:00
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cl::value_desc("filename"));
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static cl::opt<std::string>
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[llvm-mca] Introduce a sequential container of Stages
Summary:
Remove explicit stages and introduce a list of stages.
A pipeline should be composed of an arbitrary list of stages, and not any
predefined list of stages in the Backend. The Backend should not know of any
particular stage, rather it should only be concerned that it has a list of
stages, and that those stages will fulfill the contract of what it means to be
a Stage (namely pre/post/execute a given instruction).
For now, we leave the original set of stages defined in the Backend ctor;
however, I imagine these will be moved out at a later time.
This patch makes an adjustment to the semantics of Stage::isReady.
Specifically, what the Backend really needs to know is if a Stage has
unfinished work. With that said, it is more appropriately renamed
Stage::hasWorkToComplete(). This change will clean up the check in
Backend::run(), allowing us to query each stage to see if there is unfinished
work, regardless of what subclass a stage might be. I feel that this change
simplifies the semantics too, but that's a subjective statement.
Given how RetireStage and ExecuteStage handle data in their preExecute(), I've
had to change the order of Retire and Execute in our stage list. Retire must
complete any of its preExecute actions before ExecuteStage's preExecute can
take control. This is mainly because both stages utilize the RCU. In the
meantime, I want to see if I can adjust that or remove that coupling.
Reviewers: andreadb, RKSimon, courbet
Reviewed By: andreadb
Subscribers: tschuett, gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D46907
llvm-svn: 335361
2018-06-22 16:17:26 +00:00
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ArchName("march", cl::desc("Target arch to assemble for, "
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"see -version for available targets"),
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2018-05-17 15:35:14 +00:00
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cl::cat(ToolOptions));
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2018-03-08 13:05:02 +00:00
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static cl::opt<std::string>
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[llvm-mca] Introduce a sequential container of Stages
Summary:
Remove explicit stages and introduce a list of stages.
A pipeline should be composed of an arbitrary list of stages, and not any
predefined list of stages in the Backend. The Backend should not know of any
particular stage, rather it should only be concerned that it has a list of
stages, and that those stages will fulfill the contract of what it means to be
a Stage (namely pre/post/execute a given instruction).
For now, we leave the original set of stages defined in the Backend ctor;
however, I imagine these will be moved out at a later time.
This patch makes an adjustment to the semantics of Stage::isReady.
Specifically, what the Backend really needs to know is if a Stage has
unfinished work. With that said, it is more appropriately renamed
Stage::hasWorkToComplete(). This change will clean up the check in
Backend::run(), allowing us to query each stage to see if there is unfinished
work, regardless of what subclass a stage might be. I feel that this change
simplifies the semantics too, but that's a subjective statement.
Given how RetireStage and ExecuteStage handle data in their preExecute(), I've
had to change the order of Retire and Execute in our stage list. Retire must
complete any of its preExecute actions before ExecuteStage's preExecute can
take control. This is mainly because both stages utilize the RCU. In the
meantime, I want to see if I can adjust that or remove that coupling.
Reviewers: andreadb, RKSimon, courbet
Reviewed By: andreadb
Subscribers: tschuett, gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D46907
llvm-svn: 335361
2018-06-22 16:17:26 +00:00
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TripleName("mtriple", cl::desc("Target triple to assemble for, "
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"see -version for available targets"),
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2018-05-17 15:35:14 +00:00
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cl::cat(ToolOptions));
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2018-03-08 13:05:02 +00:00
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static cl::opt<std::string>
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MCPU("mcpu",
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cl::desc("Target a specific cpu type (-mcpu=help for details)"),
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2018-05-17 15:35:14 +00:00
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cl::value_desc("cpu-name"), cl::cat(ToolOptions), cl::init("native"));
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2018-03-08 13:05:02 +00:00
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2018-04-24 16:19:08 +00:00
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static cl::opt<int>
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2018-03-08 13:05:02 +00:00
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OutputAsmVariant("output-asm-variant",
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2018-04-24 16:19:08 +00:00
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cl::desc("Syntax variant to use for output printing"),
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2018-05-17 15:35:14 +00:00
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cl::cat(ToolOptions), cl::init(-1));
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2018-03-08 13:05:02 +00:00
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static cl::opt<unsigned> Iterations("iterations",
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cl::desc("Number of iterations to run"),
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2018-05-17 15:35:14 +00:00
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cl::cat(ToolOptions), cl::init(0));
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2018-03-08 13:05:02 +00:00
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2018-05-17 15:35:14 +00:00
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static cl::opt<unsigned>
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DispatchWidth("dispatch", cl::desc("Override the processor dispatch width"),
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cl::cat(ToolOptions), cl::init(0));
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2018-03-08 13:05:02 +00:00
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static cl::opt<unsigned>
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RegisterFileSize("register-file-size",
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cl::desc("Maximum number of temporary registers which can "
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"be used for register mappings"),
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2018-05-17 15:35:14 +00:00
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cl::cat(ToolOptions), cl::init(0));
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2018-03-08 13:05:02 +00:00
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2018-04-03 16:46:23 +00:00
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static cl::opt<bool>
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PrintRegisterFileStats("register-file-stats",
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cl::desc("Print register file statistics"),
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2018-05-05 15:36:47 +00:00
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cl::cat(ViewOptions), cl::init(false));
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2018-04-03 16:46:23 +00:00
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2018-04-25 10:27:30 +00:00
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static cl::opt<bool> PrintDispatchStats("dispatch-stats",
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cl::desc("Print dispatch statistics"),
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2018-05-05 15:36:47 +00:00
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cl::cat(ViewOptions), cl::init(false));
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2018-04-10 14:55:14 +00:00
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2018-06-15 14:01:43 +00:00
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static cl::opt<bool>
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PrintSummaryView("summary-view", cl::Hidden,
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cl::desc("Print summary view (enabled by default)"),
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cl::cat(ViewOptions), cl::init(true));
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2018-04-25 10:27:30 +00:00
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static cl::opt<bool> PrintSchedulerStats("scheduler-stats",
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cl::desc("Print scheduler statistics"),
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2018-05-05 15:36:47 +00:00
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cl::cat(ViewOptions), cl::init(false));
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2018-04-11 11:37:46 +00:00
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2018-04-11 12:12:53 +00:00
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static cl::opt<bool>
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PrintRetireStats("retire-stats",
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2018-04-25 10:27:30 +00:00
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cl::desc("Print retire control unit statistics"),
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2018-05-05 15:36:47 +00:00
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cl::cat(ViewOptions), cl::init(false));
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2018-04-11 12:12:53 +00:00
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2018-05-05 15:36:47 +00:00
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static cl::opt<bool> PrintResourcePressureView(
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"resource-pressure",
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cl::desc("Print the resource pressure view (enabled by default)"),
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cl::cat(ViewOptions), cl::init(true));
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2018-03-23 11:33:09 +00:00
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2018-03-08 13:05:02 +00:00
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static cl::opt<bool> PrintTimelineView("timeline",
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cl::desc("Print the timeline view"),
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2018-05-05 15:36:47 +00:00
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cl::cat(ViewOptions), cl::init(false));
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2018-03-08 13:05:02 +00:00
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static cl::opt<unsigned> TimelineMaxIterations(
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"timeline-max-iterations",
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cl::desc("Maximum number of iterations to print in timeline view"),
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2018-05-05 15:36:47 +00:00
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cl::cat(ViewOptions), cl::init(0));
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2018-03-08 13:05:02 +00:00
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static cl::opt<unsigned> TimelineMaxCycles(
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"timeline-max-cycles",
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cl::desc(
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"Maximum number of cycles in the timeline view. Defaults to 80 cycles"),
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2018-05-05 15:36:47 +00:00
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cl::cat(ViewOptions), cl::init(80));
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2018-03-08 13:05:02 +00:00
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2018-05-17 15:35:14 +00:00
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static cl::opt<bool>
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AssumeNoAlias("noalias",
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cl::desc("If set, assume that loads and stores do not alias"),
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cl::cat(ToolOptions), cl::init(true));
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2018-03-08 13:05:02 +00:00
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static cl::opt<unsigned>
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2018-05-17 15:35:14 +00:00
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LoadQueueSize("lqueue",
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cl::desc("Size of the load queue (unbound by default)"),
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cl::cat(ToolOptions), cl::init(0));
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2018-03-26 12:04:53 +00:00
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2018-03-08 13:05:02 +00:00
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static cl::opt<unsigned>
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2018-05-17 15:35:14 +00:00
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StoreQueueSize("squeue",
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cl::desc("Size of the store queue (unbound by default)"),
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cl::cat(ToolOptions), cl::init(0));
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2018-03-08 13:05:02 +00:00
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2018-03-26 12:04:53 +00:00
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static cl::opt<bool>
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PrintInstructionTables("instruction-tables",
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cl::desc("Print instruction tables"),
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2018-05-17 15:35:14 +00:00
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cl::cat(ToolOptions), cl::init(false));
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2018-03-26 12:04:53 +00:00
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2018-05-05 15:36:47 +00:00
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static cl::opt<bool> PrintInstructionInfoView(
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"instruction-info",
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cl::desc("Print the instruction info view (enabled by default)"),
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cl::cat(ViewOptions), cl::init(true));
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2018-03-26 13:44:54 +00:00
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2018-05-17 12:27:03 +00:00
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static cl::opt<bool> EnableAllStats("all-stats",
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cl::desc("Print all hardware statistics"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool>
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EnableAllViews("all-views",
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cl::desc("Print all views including hardware statistics"),
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cl::cat(ViewOptions), cl::init(false));
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2018-04-08 15:10:19 +00:00
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namespace {
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const Target *getTarget(const char *ProgName) {
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2018-03-08 13:05:02 +00:00
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TripleName = Triple::normalize(TripleName);
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if (TripleName.empty())
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TripleName = Triple::normalize(sys::getDefaultTargetTriple());
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Triple TheTriple(TripleName);
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// Get the target specific parser.
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std::string Error;
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const Target *TheTarget =
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TargetRegistry::lookupTarget(ArchName, TheTriple, Error);
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if (!TheTarget) {
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errs() << ProgName << ": " << Error;
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return nullptr;
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}
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// Return the found target.
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return TheTarget;
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}
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2018-04-09 16:39:52 +00:00
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// A comment consumer that parses strings.
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// The only valid tokens are strings.
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class MCACommentConsumer : public AsmCommentConsumer {
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public:
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mca::CodeRegions &Regions;
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MCACommentConsumer(mca::CodeRegions &R) : Regions(R) {}
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void HandleComment(SMLoc Loc, StringRef CommentText) override {
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// Skip empty comments.
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StringRef Comment(CommentText);
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if (Comment.empty())
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return;
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// Skip spaces and tabs
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unsigned Position = Comment.find_first_not_of(" \t");
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if (Position >= Comment.size())
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// we reached the end of the comment. Bail out.
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return;
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Comment = Comment.drop_front(Position);
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if (Comment.consume_front("LLVM-MCA-END")) {
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Regions.endRegion(Loc);
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return;
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}
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// Now try to parse string LLVM-MCA-BEGIN
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if (!Comment.consume_front("LLVM-MCA-BEGIN"))
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return;
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// Skip spaces and tabs
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Position = Comment.find_first_not_of(" \t");
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if (Position < Comment.size())
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2018-04-09 17:06:57 +00:00
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Comment = Comment.drop_front(Position);
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2018-04-09 16:39:52 +00:00
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// Use the rest of the string as a descriptor for this code snippet.
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Regions.beginRegion(Comment, Loc);
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}
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};
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2018-04-08 15:10:19 +00:00
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int AssembleInput(const char *ProgName, MCAsmParser &Parser,
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const Target *TheTarget, MCSubtargetInfo &STI,
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MCInstrInfo &MCII, MCTargetOptions &MCOptions) {
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2018-03-08 13:05:02 +00:00
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std::unique_ptr<MCTargetAsmParser> TAP(
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2018-04-08 15:10:19 +00:00
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TheTarget->createMCAsmParser(STI, Parser, MCII, MCOptions));
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2018-03-08 13:05:02 +00:00
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if (!TAP) {
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2018-05-04 13:52:12 +00:00
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WithColor::error() << "this target does not support assembly parsing.\n";
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2018-03-08 13:05:02 +00:00
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return 1;
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}
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2018-04-08 15:10:19 +00:00
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Parser.setTargetParser(*TAP);
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return Parser.Run(false);
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2018-03-08 13:05:02 +00:00
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}
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2018-04-08 15:10:19 +00:00
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ErrorOr<std::unique_ptr<ToolOutputFile>> getOutputStream() {
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2018-03-08 16:08:43 +00:00
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if (OutputFilename == "")
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OutputFilename = "-";
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std::error_code EC;
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auto Out =
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llvm::make_unique<ToolOutputFile>(OutputFilename, EC, sys::fs::F_None);
|
|
|
|
if (!EC)
|
|
|
|
return std::move(Out);
|
|
|
|
return EC;
|
|
|
|
}
|
|
|
|
|
2018-03-08 13:05:02 +00:00
|
|
|
class MCStreamerWrapper final : public MCStreamer {
|
2018-04-09 16:39:52 +00:00
|
|
|
mca::CodeRegions &Regions;
|
2018-03-08 13:05:02 +00:00
|
|
|
|
|
|
|
public:
|
2018-04-09 16:39:52 +00:00
|
|
|
MCStreamerWrapper(MCContext &Context, mca::CodeRegions &R)
|
|
|
|
: MCStreamer(Context), Regions(R) {}
|
2018-03-08 13:05:02 +00:00
|
|
|
|
|
|
|
// We only want to intercept the emission of new instructions.
|
|
|
|
virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
|
|
|
|
bool /* unused */) override {
|
2018-04-09 16:39:52 +00:00
|
|
|
Regions.addInstruction(llvm::make_unique<const MCInst>(Inst));
|
2018-03-08 13:05:02 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bool EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute) override {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
|
|
|
|
unsigned ByteAlignment) override {}
|
|
|
|
void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
|
2018-07-02 17:29:43 +00:00
|
|
|
uint64_t Size = 0, unsigned ByteAlignment = 0,
|
|
|
|
SMLoc Loc = SMLoc()) override {}
|
2018-03-08 13:05:02 +00:00
|
|
|
void EmitGPRel32Value(const MCExpr *Value) override {}
|
|
|
|
void BeginCOFFSymbolDef(const MCSymbol *Symbol) override {}
|
|
|
|
void EmitCOFFSymbolStorageClass(int StorageClass) override {}
|
|
|
|
void EmitCOFFSymbolType(int Type) override {}
|
|
|
|
void EndCOFFSymbolDef() override {}
|
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
const std::vector<std::unique_ptr<const MCInst>> &
|
|
|
|
GetInstructionSequence(unsigned Index) const {
|
|
|
|
return Regions.getInstructionSequence(Index);
|
|
|
|
}
|
2018-03-08 13:05:02 +00:00
|
|
|
};
|
|
|
|
} // end of anonymous namespace
|
|
|
|
|
2018-05-17 12:27:03 +00:00
|
|
|
static void processOptionImpl(cl::opt<bool> &O, const cl::opt<bool> &Default) {
|
|
|
|
if (!O.getNumOccurrences() || O.getPosition() < Default.getPosition())
|
|
|
|
O = Default.getValue();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void processViewOptions() {
|
|
|
|
if (!EnableAllViews.getNumOccurrences() &&
|
|
|
|
!EnableAllStats.getNumOccurrences())
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (EnableAllViews.getNumOccurrences()) {
|
2018-06-15 14:01:43 +00:00
|
|
|
processOptionImpl(PrintSummaryView, EnableAllViews);
|
2018-05-17 12:27:03 +00:00
|
|
|
processOptionImpl(PrintResourcePressureView, EnableAllViews);
|
|
|
|
processOptionImpl(PrintTimelineView, EnableAllViews);
|
|
|
|
processOptionImpl(PrintInstructionInfoView, EnableAllViews);
|
|
|
|
}
|
|
|
|
|
|
|
|
const cl::opt<bool> &Default =
|
|
|
|
EnableAllViews.getPosition() < EnableAllStats.getPosition()
|
|
|
|
? EnableAllStats
|
|
|
|
: EnableAllViews;
|
2018-06-15 14:01:43 +00:00
|
|
|
processOptionImpl(PrintSummaryView, Default);
|
2018-05-17 12:27:03 +00:00
|
|
|
processOptionImpl(PrintRegisterFileStats, Default);
|
|
|
|
processOptionImpl(PrintDispatchStats, Default);
|
|
|
|
processOptionImpl(PrintSchedulerStats, Default);
|
|
|
|
processOptionImpl(PrintRetireStats, Default);
|
|
|
|
}
|
|
|
|
|
2018-03-08 13:05:02 +00:00
|
|
|
int main(int argc, char **argv) {
|
2018-04-13 18:26:06 +00:00
|
|
|
InitLLVM X(argc, argv);
|
2018-03-08 13:05:02 +00:00
|
|
|
|
|
|
|
// Initialize targets and assembly parsers.
|
|
|
|
llvm::InitializeAllTargetInfos();
|
|
|
|
llvm::InitializeAllTargetMCs();
|
|
|
|
llvm::InitializeAllAsmParsers();
|
|
|
|
|
|
|
|
// Enable printing of available targets when flag --version is specified.
|
|
|
|
cl::AddExtraVersionPrinter(TargetRegistry::printRegisteredTargetsForVersion);
|
|
|
|
|
2018-05-17 15:35:14 +00:00
|
|
|
cl::HideUnrelatedOptions({&ToolOptions, &ViewOptions});
|
|
|
|
|
2018-03-08 13:05:02 +00:00
|
|
|
// Parse flags and initialize target options.
|
|
|
|
cl::ParseCommandLineOptions(argc, argv,
|
|
|
|
"llvm machine code performance analyzer.\n");
|
2018-05-17 15:35:14 +00:00
|
|
|
|
2018-03-08 13:05:02 +00:00
|
|
|
MCTargetOptions MCOptions;
|
|
|
|
MCOptions.PreserveAsmComments = false;
|
|
|
|
|
|
|
|
// Get the target from the triple. If a triple is not specified, then select
|
|
|
|
// the default triple for the host. If the triple doesn't correspond to any
|
|
|
|
// registered target, then exit with an error message.
|
|
|
|
const char *ProgName = argv[0];
|
|
|
|
const Target *TheTarget = getTarget(ProgName);
|
|
|
|
if (!TheTarget)
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
// GetTarget() may replaced TripleName with a default triple.
|
|
|
|
// For safety, reconstruct the Triple object.
|
|
|
|
Triple TheTriple(TripleName);
|
|
|
|
|
|
|
|
ErrorOr<std::unique_ptr<MemoryBuffer>> BufferPtr =
|
|
|
|
MemoryBuffer::getFileOrSTDIN(InputFilename);
|
|
|
|
if (std::error_code EC = BufferPtr.getError()) {
|
2018-04-18 15:26:51 +00:00
|
|
|
WithColor::error() << InputFilename << ": " << EC.message() << '\n';
|
2018-03-08 13:05:02 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-05-17 12:27:03 +00:00
|
|
|
// Apply overrides to llvm-mca specific options.
|
|
|
|
processViewOptions();
|
|
|
|
|
2018-03-08 13:05:02 +00:00
|
|
|
SourceMgr SrcMgr;
|
|
|
|
|
|
|
|
// Tell SrcMgr about this buffer, which is what the parser will pick up.
|
|
|
|
SrcMgr.AddNewSourceBuffer(std::move(*BufferPtr), SMLoc());
|
|
|
|
|
|
|
|
std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
|
|
|
|
assert(MRI && "Unable to create target register info!");
|
|
|
|
|
|
|
|
std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
|
|
|
|
assert(MAI && "Unable to create target asm info!");
|
|
|
|
|
|
|
|
MCObjectFileInfo MOFI;
|
|
|
|
MCContext Ctx(MAI.get(), MRI.get(), &MOFI, &SrcMgr);
|
|
|
|
MOFI.InitMCObjectFileInfo(TheTriple, /* PIC= */ false, Ctx);
|
|
|
|
|
|
|
|
std::unique_ptr<buffer_ostream> BOS;
|
2018-03-26 12:04:53 +00:00
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
mca::CodeRegions Regions(SrcMgr);
|
|
|
|
MCStreamerWrapper Str(Ctx, Regions);
|
2018-03-08 13:05:02 +00:00
|
|
|
|
|
|
|
std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo());
|
2018-04-25 10:18:25 +00:00
|
|
|
|
2018-06-20 10:08:11 +00:00
|
|
|
std::unique_ptr<MCInstrAnalysis> MCIA(
|
|
|
|
TheTarget->createMCInstrAnalysis(MCII.get()));
|
|
|
|
|
2018-04-25 10:18:25 +00:00
|
|
|
if (!MCPU.compare("native"))
|
|
|
|
MCPU = llvm::sys::getHostCPUName();
|
|
|
|
|
2018-03-08 13:05:02 +00:00
|
|
|
std::unique_ptr<MCSubtargetInfo> STI(
|
|
|
|
TheTarget->createMCSubtargetInfo(TripleName, MCPU, /* FeaturesStr */ ""));
|
|
|
|
if (!STI->isCPUStringValid(MCPU))
|
|
|
|
return 1;
|
|
|
|
|
2018-04-30 12:05:34 +00:00
|
|
|
if (!PrintInstructionTables && !STI->getSchedModel().isOutOfOrder()) {
|
2018-04-18 15:26:51 +00:00
|
|
|
WithColor::error() << "please specify an out-of-order cpu. '" << MCPU
|
|
|
|
<< "' is an in-order cpu.\n";
|
2018-03-08 13:05:02 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!STI->getSchedModel().hasInstrSchedModel()) {
|
2018-04-18 15:26:51 +00:00
|
|
|
WithColor::error()
|
|
|
|
<< "unable to find instruction-level scheduling information for"
|
2018-03-08 13:05:02 +00:00
|
|
|
<< " target triple '" << TheTriple.normalize() << "' and cpu '" << MCPU
|
|
|
|
<< "'.\n";
|
|
|
|
|
|
|
|
if (STI->getSchedModel().InstrItineraries)
|
2018-04-18 15:26:51 +00:00
|
|
|
WithColor::note()
|
|
|
|
<< "cpu '" << MCPU << "' provides itineraries. However, "
|
|
|
|
<< "instruction itineraries are currently unsupported.\n";
|
2018-03-08 13:05:02 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-04-08 15:10:19 +00:00
|
|
|
std::unique_ptr<MCAsmParser> P(createMCAsmParser(SrcMgr, Ctx, Str, *MAI));
|
2018-04-09 16:39:52 +00:00
|
|
|
MCAsmLexer &Lexer = P->getLexer();
|
|
|
|
MCACommentConsumer CC(Regions);
|
|
|
|
Lexer.setCommentConsumer(&CC);
|
|
|
|
|
2018-04-08 15:10:19 +00:00
|
|
|
if (AssembleInput(ProgName, *P, TheTarget, *STI, *MCII, MCOptions))
|
|
|
|
return 1;
|
2018-03-08 13:05:02 +00:00
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
if (Regions.empty()) {
|
2018-04-18 15:26:51 +00:00
|
|
|
WithColor::error() << "no assembly instructions found.\n";
|
2018-03-08 13:05:02 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-03-08 16:08:43 +00:00
|
|
|
// Now initialize the output file.
|
|
|
|
auto OF = getOutputStream();
|
|
|
|
if (std::error_code EC = OF.getError()) {
|
2018-04-18 15:26:51 +00:00
|
|
|
WithColor::error() << EC.message() << '\n';
|
2018-03-08 16:08:43 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-04-24 16:19:08 +00:00
|
|
|
unsigned AssemblerDialect = P->getAssemblerDialect();
|
|
|
|
if (OutputAsmVariant >= 0)
|
|
|
|
AssemblerDialect = static_cast<unsigned>(OutputAsmVariant);
|
|
|
|
std::unique_ptr<MCInstPrinter> IP(TheTarget->createMCInstPrinter(
|
|
|
|
Triple(TripleName), AssemblerDialect, *MAI, *MCII, *MRI));
|
|
|
|
if (!IP) {
|
|
|
|
WithColor::error()
|
|
|
|
<< "unable to create instruction printer for target triple '"
|
|
|
|
<< TheTriple.normalize() << "' with assembly variant "
|
|
|
|
<< AssemblerDialect << ".\n";
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-03-08 16:08:43 +00:00
|
|
|
std::unique_ptr<llvm::ToolOutputFile> TOF = std::move(*OF);
|
|
|
|
|
2018-03-08 13:05:02 +00:00
|
|
|
const MCSchedModel &SM = STI->getSchedModel();
|
|
|
|
|
|
|
|
unsigned Width = SM.IssueWidth;
|
|
|
|
if (DispatchWidth)
|
|
|
|
Width = DispatchWidth;
|
|
|
|
|
2018-03-23 11:50:43 +00:00
|
|
|
// Create an instruction builder.
|
2018-07-09 12:30:55 +00:00
|
|
|
mca::InstrBuilder IB(*STI, *MCII, *MRI, *MCIA, *IP);
|
2018-03-23 11:50:43 +00:00
|
|
|
|
2018-07-06 18:03:14 +00:00
|
|
|
// Create a context to control ownership of the pipeline hardware.
|
|
|
|
mca::Context MCA(*MRI, *STI);
|
|
|
|
|
|
|
|
mca::PipelineOptions PO(Width, RegisterFileSize, LoadQueueSize,
|
|
|
|
StoreQueueSize, AssumeNoAlias);
|
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
// Number each region in the sequence.
|
|
|
|
unsigned RegionIdx = 0;
|
|
|
|
for (const std::unique_ptr<mca::CodeRegion> &Region : Regions) {
|
|
|
|
// Skip empty code regions.
|
|
|
|
if (Region->empty())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// Don't print the header of this region if it is the default region, and
|
|
|
|
// it doesn't have an end location.
|
|
|
|
if (Region->startLoc().isValid() || Region->endLoc().isValid()) {
|
|
|
|
TOF->os() << "\n[" << RegionIdx++ << "] Code Region";
|
|
|
|
StringRef Desc = Region->getDescription();
|
|
|
|
if (!Desc.empty())
|
|
|
|
TOF->os() << " - " << Desc;
|
|
|
|
TOF->os() << "\n\n";
|
2018-03-26 13:44:54 +00:00
|
|
|
}
|
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
mca::SourceMgr S(Region->getInstructions(),
|
|
|
|
PrintInstructionTables ? 1 : Iterations);
|
|
|
|
|
|
|
|
if (PrintInstructionTables) {
|
[llvm-mca] Introduce a sequential container of Stages
Summary:
Remove explicit stages and introduce a list of stages.
A pipeline should be composed of an arbitrary list of stages, and not any
predefined list of stages in the Backend. The Backend should not know of any
particular stage, rather it should only be concerned that it has a list of
stages, and that those stages will fulfill the contract of what it means to be
a Stage (namely pre/post/execute a given instruction).
For now, we leave the original set of stages defined in the Backend ctor;
however, I imagine these will be moved out at a later time.
This patch makes an adjustment to the semantics of Stage::isReady.
Specifically, what the Backend really needs to know is if a Stage has
unfinished work. With that said, it is more appropriately renamed
Stage::hasWorkToComplete(). This change will clean up the check in
Backend::run(), allowing us to query each stage to see if there is unfinished
work, regardless of what subclass a stage might be. I feel that this change
simplifies the semantics too, but that's a subjective statement.
Given how RetireStage and ExecuteStage handle data in their preExecute(), I've
had to change the order of Retire and Execute in our stage list. Retire must
complete any of its preExecute actions before ExecuteStage's preExecute can
take control. This is mainly because both stages utilize the RCU. In the
meantime, I want to see if I can adjust that or remove that coupling.
Reviewers: andreadb, RKSimon, courbet
Reviewed By: andreadb
Subscribers: tschuett, gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D46907
llvm-svn: 335361
2018-06-22 16:17:26 +00:00
|
|
|
mca::InstructionTables IT(SM, IB, S);
|
2018-04-09 16:39:52 +00:00
|
|
|
|
|
|
|
if (PrintInstructionInfoView) {
|
|
|
|
IT.addView(
|
|
|
|
llvm::make_unique<mca::InstructionInfoView>(*STI, *MCII, S, *IP));
|
|
|
|
}
|
2018-03-26 12:04:53 +00:00
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
IT.addView(llvm::make_unique<mca::ResourcePressureView>(*STI, *IP, S));
|
|
|
|
IT.run();
|
|
|
|
IT.printReport(TOF->os());
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2018-07-06 18:03:14 +00:00
|
|
|
// Create a basic pipeline simulating an out-of-order backend.
|
|
|
|
auto P = MCA.createDefaultPipeline(PO, IB, S);
|
2018-06-25 16:53:00 +00:00
|
|
|
mca::PipelinePrinter Printer(*P);
|
2018-03-09 13:52:03 +00:00
|
|
|
|
2018-06-15 14:01:43 +00:00
|
|
|
if (PrintSummaryView)
|
|
|
|
Printer.addView(llvm::make_unique<mca::SummaryView>(SM, S, Width));
|
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
if (PrintInstructionInfoView)
|
|
|
|
Printer.addView(
|
|
|
|
llvm::make_unique<mca::InstructionInfoView>(*STI, *MCII, S, *IP));
|
2018-03-23 19:40:04 +00:00
|
|
|
|
2018-04-10 14:55:14 +00:00
|
|
|
if (PrintDispatchStats)
|
2018-04-11 12:31:44 +00:00
|
|
|
Printer.addView(llvm::make_unique<mca::DispatchStatistics>());
|
2018-04-10 14:55:14 +00:00
|
|
|
|
2018-04-11 12:12:53 +00:00
|
|
|
if (PrintSchedulerStats)
|
2018-04-11 11:37:46 +00:00
|
|
|
Printer.addView(llvm::make_unique<mca::SchedulerStatistics>(*STI));
|
|
|
|
|
2018-04-11 12:12:53 +00:00
|
|
|
if (PrintRetireStats)
|
|
|
|
Printer.addView(llvm::make_unique<mca::RetireControlUnitStatistics>());
|
2018-03-08 16:08:43 +00:00
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
if (PrintRegisterFileStats)
|
|
|
|
Printer.addView(llvm::make_unique<mca::RegisterFileStatistics>(*STI));
|
2018-03-08 16:08:43 +00:00
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
if (PrintResourcePressureView)
|
|
|
|
Printer.addView(
|
|
|
|
llvm::make_unique<mca::ResourcePressureView>(*STI, *IP, S));
|
2018-04-03 16:46:23 +00:00
|
|
|
|
2018-04-09 16:39:52 +00:00
|
|
|
if (PrintTimelineView) {
|
|
|
|
Printer.addView(llvm::make_unique<mca::TimelineView>(
|
|
|
|
*STI, *IP, S, TimelineMaxIterations, TimelineMaxCycles));
|
|
|
|
}
|
2018-03-08 16:08:43 +00:00
|
|
|
|
2018-06-25 16:53:00 +00:00
|
|
|
P->run();
|
2018-04-09 16:39:52 +00:00
|
|
|
Printer.printReport(TOF->os());
|
2018-07-02 20:39:57 +00:00
|
|
|
|
|
|
|
// Clear the InstrBuilder internal state in preparation for another round.
|
|
|
|
IB.clear();
|
2018-03-08 16:08:43 +00:00
|
|
|
}
|
2018-03-08 13:05:02 +00:00
|
|
|
|
2018-03-08 16:08:43 +00:00
|
|
|
TOF->keep();
|
2018-03-08 13:05:02 +00:00
|
|
|
return 0;
|
|
|
|
}
|