2015-06-22 17:02:30 +00:00
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//===- MIParser.cpp - Machine instructions parser implementation ----------===//
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//
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2019-01-19 08:50:56 +00:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2015-06-22 17:02:30 +00:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the parsing of machine instructions.
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//
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//===----------------------------------------------------------------------===//
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2019-03-14 22:54:43 +00:00
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#include "llvm/CodeGen/MIRParser/MIParser.h"
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2017-11-08 01:01:31 +00:00
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#include "MILexer.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/APSInt.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallVector.h"
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2015-06-22 17:02:30 +00:00
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#include "llvm/ADT/StringMap.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/ADT/StringRef.h"
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2017-11-08 01:01:31 +00:00
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#include "llvm/ADT/StringSwitch.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/ADT/Twine.h"
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2018-08-20 20:37:57 +00:00
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#include "llvm/Analysis/MemoryLocation.h"
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2015-07-31 20:49:21 +00:00
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#include "llvm/AsmParser/Parser.h"
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2015-06-26 22:56:48 +00:00
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#include "llvm/AsmParser/SlotMapping.h"
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2023-04-11 00:05:24 +09:00
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#include "llvm/CodeGen/LowLevelType.h"
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2020-01-08 20:02:37 -08:00
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#include "llvm/CodeGen/MIRFormatter.h"
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2017-05-05 21:09:30 +00:00
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#include "llvm/CodeGen/MIRPrinter.h"
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2015-06-22 17:02:30 +00:00
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#include "llvm/CodeGen/MachineBasicBlock.h"
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2015-07-16 23:37:45 +00:00
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#include "llvm/CodeGen/MachineFrameInfo.h"
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2016-03-07 21:48:43 +00:00
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#include "llvm/CodeGen/MachineFunction.h"
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2015-06-22 17:02:30 +00:00
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#include "llvm/CodeGen/MachineInstr.h"
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2015-07-06 23:07:26 +00:00
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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2015-08-03 23:08:19 +00:00
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#include "llvm/CodeGen/MachineMemOperand.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/CodeGen/MachineOperand.h"
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2016-03-07 21:48:43 +00:00
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2022-02-15 11:54:38 -08:00
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#include "llvm/CodeGen/RegisterBank.h"
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#include "llvm/CodeGen/RegisterBankInfo.h"
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2017-11-08 01:01:31 +00:00
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#include "llvm/CodeGen/TargetInstrInfo.h"
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2017-11-17 01:07:10 +00:00
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/IR/BasicBlock.h"
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2015-07-28 17:28:03 +00:00
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#include "llvm/IR/Constants.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/IR/DataLayout.h"
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2017-08-23 20:31:27 +00:00
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#include "llvm/IR/DebugInfoMetadata.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/InstrTypes.h"
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2016-03-07 21:48:43 +00:00
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#include "llvm/IR/Instructions.h"
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2016-07-29 20:32:59 +00:00
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#include "llvm/IR/Intrinsics.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/IR/Metadata.h"
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2015-06-26 22:56:48 +00:00
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#include "llvm/IR/Module.h"
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2015-07-27 22:42:41 +00:00
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#include "llvm/IR/ModuleSlotTracker.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/IR/Type.h"
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#include "llvm/IR/Value.h"
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2015-07-28 17:28:03 +00:00
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#include "llvm/IR/ValueSymbolTable.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/MC/LaneBitmask.h"
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[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
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#include "llvm/MC/MCContext.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/MC/MCDwarf.h"
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#include "llvm/MC/MCInstrDesc.h"
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#include "llvm/Support/AtomicOrdering.h"
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#include "llvm/Support/BranchProbability.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/MemoryBuffer.h"
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#include "llvm/Support/SMLoc.h"
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2015-06-22 17:02:30 +00:00
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#include "llvm/Support/SourceMgr.h"
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2016-07-29 20:32:59 +00:00
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#include "llvm/Target/TargetIntrinsicInfo.h"
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2017-06-06 22:22:41 +00:00
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#include "llvm/Target/TargetMachine.h"
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#include <cassert>
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2016-10-12 21:06:45 +00:00
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#include <cctype>
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2017-06-06 22:22:41 +00:00
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#include <cstddef>
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#include <cstdint>
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#include <limits>
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#include <string>
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#include <utility>
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2015-06-22 17:02:30 +00:00
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using namespace llvm;
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2019-03-12 20:42:12 +00:00
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void PerTargetMIParsingState::setTarget(
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const TargetSubtargetInfo &NewSubtarget) {
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// If the subtarget changed, over conservatively assume everything is invalid.
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if (&Subtarget == &NewSubtarget)
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return;
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Names2InstrOpCodes.clear();
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Names2Regs.clear();
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Names2RegMasks.clear();
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Names2SubRegIndices.clear();
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Names2TargetIndices.clear();
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Names2DirectTargetFlags.clear();
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Names2BitmaskTargetFlags.clear();
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Names2MMOTargetFlags.clear();
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initNames2RegClasses();
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initNames2RegBanks();
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}
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void PerTargetMIParsingState::initNames2Regs() {
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if (!Names2Regs.empty())
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return;
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// The '%noreg' register is the register 0.
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Names2Regs.insert(std::make_pair("noreg", 0));
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const auto *TRI = Subtarget.getRegisterInfo();
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assert(TRI && "Expected target register info");
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for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
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bool WasInserted =
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Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
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.second;
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(void)WasInserted;
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assert(WasInserted && "Expected registers to be unique case-insensitively");
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}
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}
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bool PerTargetMIParsingState::getRegisterByName(StringRef RegName,
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2020-04-08 17:25:21 -04:00
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Register &Reg) {
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2019-03-12 20:42:12 +00:00
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initNames2Regs();
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auto RegInfo = Names2Regs.find(RegName);
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if (RegInfo == Names2Regs.end())
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return true;
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Reg = RegInfo->getValue();
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return false;
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}
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void PerTargetMIParsingState::initNames2InstrOpCodes() {
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if (!Names2InstrOpCodes.empty())
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return;
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const auto *TII = Subtarget.getInstrInfo();
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assert(TII && "Expected target instruction info");
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for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
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Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
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}
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bool PerTargetMIParsingState::parseInstrName(StringRef InstrName,
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unsigned &OpCode) {
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initNames2InstrOpCodes();
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auto InstrInfo = Names2InstrOpCodes.find(InstrName);
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if (InstrInfo == Names2InstrOpCodes.end())
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return true;
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OpCode = InstrInfo->getValue();
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return false;
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}
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void PerTargetMIParsingState::initNames2RegMasks() {
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if (!Names2RegMasks.empty())
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return;
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const auto *TRI = Subtarget.getRegisterInfo();
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assert(TRI && "Expected target register info");
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ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
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ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
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assert(RegMasks.size() == RegMaskNames.size());
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for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
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Names2RegMasks.insert(
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std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
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}
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const uint32_t *PerTargetMIParsingState::getRegMask(StringRef Identifier) {
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initNames2RegMasks();
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auto RegMaskInfo = Names2RegMasks.find(Identifier);
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if (RegMaskInfo == Names2RegMasks.end())
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return nullptr;
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return RegMaskInfo->getValue();
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}
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void PerTargetMIParsingState::initNames2SubRegIndices() {
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if (!Names2SubRegIndices.empty())
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return;
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const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
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for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
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Names2SubRegIndices.insert(
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2019-05-09 08:29:04 +00:00
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std::make_pair(TRI->getSubRegIndexName(I), I));
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2019-03-12 20:42:12 +00:00
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}
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unsigned PerTargetMIParsingState::getSubRegIndex(StringRef Name) {
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initNames2SubRegIndices();
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auto SubRegInfo = Names2SubRegIndices.find(Name);
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if (SubRegInfo == Names2SubRegIndices.end())
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return 0;
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return SubRegInfo->getValue();
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}
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void PerTargetMIParsingState::initNames2TargetIndices() {
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if (!Names2TargetIndices.empty())
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return;
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const auto *TII = Subtarget.getInstrInfo();
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assert(TII && "Expected target instruction info");
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auto Indices = TII->getSerializableTargetIndices();
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for (const auto &I : Indices)
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Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
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}
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bool PerTargetMIParsingState::getTargetIndex(StringRef Name, int &Index) {
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initNames2TargetIndices();
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auto IndexInfo = Names2TargetIndices.find(Name);
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if (IndexInfo == Names2TargetIndices.end())
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return true;
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Index = IndexInfo->second;
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return false;
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}
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void PerTargetMIParsingState::initNames2DirectTargetFlags() {
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if (!Names2DirectTargetFlags.empty())
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return;
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const auto *TII = Subtarget.getInstrInfo();
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assert(TII && "Expected target instruction info");
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auto Flags = TII->getSerializableDirectMachineOperandTargetFlags();
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for (const auto &I : Flags)
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Names2DirectTargetFlags.insert(
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std::make_pair(StringRef(I.second), I.first));
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}
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bool PerTargetMIParsingState::getDirectTargetFlag(StringRef Name,
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unsigned &Flag) {
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initNames2DirectTargetFlags();
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auto FlagInfo = Names2DirectTargetFlags.find(Name);
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if (FlagInfo == Names2DirectTargetFlags.end())
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return true;
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Flag = FlagInfo->second;
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return false;
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}
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void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
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if (!Names2BitmaskTargetFlags.empty())
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return;
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const auto *TII = Subtarget.getInstrInfo();
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assert(TII && "Expected target instruction info");
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auto Flags = TII->getSerializableBitmaskMachineOperandTargetFlags();
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for (const auto &I : Flags)
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Names2BitmaskTargetFlags.insert(
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std::make_pair(StringRef(I.second), I.first));
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}
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bool PerTargetMIParsingState::getBitmaskTargetFlag(StringRef Name,
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unsigned &Flag) {
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initNames2BitmaskTargetFlags();
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auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
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if (FlagInfo == Names2BitmaskTargetFlags.end())
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return true;
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Flag = FlagInfo->second;
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return false;
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}
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void PerTargetMIParsingState::initNames2MMOTargetFlags() {
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if (!Names2MMOTargetFlags.empty())
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return;
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const auto *TII = Subtarget.getInstrInfo();
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assert(TII && "Expected target instruction info");
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auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
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for (const auto &I : Flags)
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Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));
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}
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bool PerTargetMIParsingState::getMMOTargetFlag(StringRef Name,
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MachineMemOperand::Flags &Flag) {
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initNames2MMOTargetFlags();
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auto FlagInfo = Names2MMOTargetFlags.find(Name);
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if (FlagInfo == Names2MMOTargetFlags.end())
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return true;
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Flag = FlagInfo->second;
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return false;
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}
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void PerTargetMIParsingState::initNames2RegClasses() {
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if (!Names2RegClasses.empty())
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return;
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const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
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for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {
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const auto *RC = TRI->getRegClass(I);
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Names2RegClasses.insert(
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std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));
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}
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}
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void PerTargetMIParsingState::initNames2RegBanks() {
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if (!Names2RegBanks.empty())
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return;
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const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();
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// If the target does not support GlobalISel, we may not have a
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// register bank info.
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if (!RBI)
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return;
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for (unsigned I = 0, E = RBI->getNumRegBanks(); I < E; ++I) {
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const auto &RegBank = RBI->getRegBank(I);
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Names2RegBanks.insert(
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|
|
std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
const TargetRegisterClass *
|
|
|
|
PerTargetMIParsingState::getRegClass(StringRef Name) {
|
|
|
|
auto RegClassInfo = Names2RegClasses.find(Name);
|
|
|
|
if (RegClassInfo == Names2RegClasses.end())
|
|
|
|
return nullptr;
|
|
|
|
return RegClassInfo->getValue();
|
|
|
|
}
|
|
|
|
|
|
|
|
const RegisterBank *PerTargetMIParsingState::getRegBank(StringRef Name) {
|
|
|
|
auto RegBankInfo = Names2RegBanks.find(Name);
|
|
|
|
if (RegBankInfo == Names2RegBanks.end())
|
|
|
|
return nullptr;
|
|
|
|
return RegBankInfo->getValue();
|
|
|
|
}
|
|
|
|
|
2016-07-13 23:27:50 +00:00
|
|
|
PerFunctionMIParsingState::PerFunctionMIParsingState(MachineFunction &MF,
|
2019-03-12 20:42:12 +00:00
|
|
|
SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &T)
|
|
|
|
: MF(MF), SM(&SM), IRSlots(IRSlots), Target(T) {
|
2016-07-13 22:23:23 +00:00
|
|
|
}
|
|
|
|
|
2020-04-08 17:25:21 -04:00
|
|
|
VRegInfo &PerFunctionMIParsingState::getVRegInfo(Register Num) {
|
2016-10-11 03:13:01 +00:00
|
|
|
auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
|
|
|
|
if (I.second) {
|
|
|
|
MachineRegisterInfo &MRI = MF.getRegInfo();
|
|
|
|
VRegInfo *Info = new (Allocator) VRegInfo;
|
|
|
|
Info->VReg = MRI.createIncompleteVirtualRegister();
|
|
|
|
I.first->second = Info;
|
|
|
|
}
|
|
|
|
return *I.first->second;
|
|
|
|
}
|
|
|
|
|
2018-03-30 18:15:54 +00:00
|
|
|
VRegInfo &PerFunctionMIParsingState::getVRegInfoNamed(StringRef RegName) {
|
|
|
|
assert(RegName != "" && "Expected named reg.");
|
|
|
|
|
|
|
|
auto I = VRegInfosNamed.insert(std::make_pair(RegName.str(), nullptr));
|
|
|
|
if (I.second) {
|
|
|
|
VRegInfo *Info = new (Allocator) VRegInfo;
|
|
|
|
Info->VReg = MF.getRegInfo().createIncompleteVirtualRegister(RegName);
|
|
|
|
I.first->second = Info;
|
|
|
|
}
|
|
|
|
return *I.first->second;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
|
|
|
|
DenseMap<unsigned, const Value *> &Slots2Values) {
|
|
|
|
int Slot = MST.getLocalSlot(V);
|
|
|
|
if (Slot == -1)
|
|
|
|
return;
|
|
|
|
Slots2Values.insert(std::make_pair(unsigned(Slot), V));
|
|
|
|
}
|
|
|
|
|
|
|
|
/// Creates the mapping from slot numbers to function's unnamed IR values.
|
|
|
|
static void initSlots2Values(const Function &F,
|
|
|
|
DenseMap<unsigned, const Value *> &Slots2Values) {
|
|
|
|
ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
|
|
|
|
MST.incorporateFunction(F);
|
|
|
|
for (const auto &Arg : F.args())
|
|
|
|
mapValueToSlot(&Arg, MST, Slots2Values);
|
|
|
|
for (const auto &BB : F) {
|
|
|
|
mapValueToSlot(&BB, MST, Slots2Values);
|
|
|
|
for (const auto &I : BB)
|
|
|
|
mapValueToSlot(&I, MST, Slots2Values);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
const Value* PerFunctionMIParsingState::getIRValue(unsigned Slot) {
|
|
|
|
if (Slots2Values.empty())
|
|
|
|
initSlots2Values(MF.getFunction(), Slots2Values);
|
2020-12-27 09:57:27 -08:00
|
|
|
return Slots2Values.lookup(Slot);
|
2020-01-08 20:02:37 -08:00
|
|
|
}
|
|
|
|
|
2015-06-22 17:02:30 +00:00
|
|
|
namespace {
|
|
|
|
|
2015-07-07 02:08:46 +00:00
|
|
|
/// A wrapper struct around the 'MachineOperand' struct that includes a source
|
2015-08-19 19:19:16 +00:00
|
|
|
/// range and other attributes.
|
|
|
|
struct ParsedMachineOperand {
|
2015-07-07 02:08:46 +00:00
|
|
|
MachineOperand Operand;
|
|
|
|
StringRef::iterator Begin;
|
|
|
|
StringRef::iterator End;
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> TiedDefIdx;
|
2015-07-07 02:08:46 +00:00
|
|
|
|
2015-08-19 19:19:16 +00:00
|
|
|
ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
|
2022-12-13 09:06:36 +00:00
|
|
|
StringRef::iterator End,
|
|
|
|
std::optional<unsigned> &TiedDefIdx)
|
2015-08-19 19:05:34 +00:00
|
|
|
: Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
|
|
|
|
if (TiedDefIdx)
|
|
|
|
assert(Operand.isReg() && Operand.isUse() &&
|
|
|
|
"Only used register operands can be tied");
|
|
|
|
}
|
2015-07-07 02:08:46 +00:00
|
|
|
};
|
|
|
|
|
2015-06-22 17:02:30 +00:00
|
|
|
class MIParser {
|
|
|
|
MachineFunction &MF;
|
|
|
|
SMDiagnostic &Error;
|
2015-06-22 20:37:46 +00:00
|
|
|
StringRef Source, CurrentSource;
|
2021-05-25 20:21:21 -04:00
|
|
|
SMRange SourceRange;
|
2015-06-22 20:37:46 +00:00
|
|
|
MIToken Token;
|
2016-10-11 03:13:01 +00:00
|
|
|
PerFunctionMIParsingState &PFS;
|
2015-07-27 22:42:41 +00:00
|
|
|
/// Maps from slot numbers to function's unnamed basic blocks.
|
|
|
|
DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
|
2015-06-22 17:02:30 +00:00
|
|
|
|
|
|
|
public:
|
2016-10-11 03:13:01 +00:00
|
|
|
MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
|
2016-07-13 23:27:50 +00:00
|
|
|
StringRef Source);
|
2021-05-25 20:21:21 -04:00
|
|
|
MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
|
|
|
|
StringRef Source, SMRange SourceRange);
|
2015-06-22 17:02:30 +00:00
|
|
|
|
2016-03-08 00:57:31 +00:00
|
|
|
/// \p SkipChar gives the number of characters to skip before looking
|
|
|
|
/// for the next token.
|
|
|
|
void lex(unsigned SkipChar = 0);
|
2015-06-22 20:37:46 +00:00
|
|
|
|
2015-06-22 17:02:30 +00:00
|
|
|
/// Report an error at the current location with the given message.
|
|
|
|
///
|
|
|
|
/// This function always return true.
|
|
|
|
bool error(const Twine &Msg);
|
|
|
|
|
2015-06-22 20:37:46 +00:00
|
|
|
/// Report an error at the given location with the given message.
|
|
|
|
///
|
|
|
|
/// This function always return true.
|
|
|
|
bool error(StringRef::iterator Loc, const Twine &Msg);
|
|
|
|
|
2015-08-13 23:10:16 +00:00
|
|
|
bool
|
|
|
|
parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
|
|
|
|
bool parseBasicBlocks();
|
2015-06-30 17:47:50 +00:00
|
|
|
bool parse(MachineInstr *&MI);
|
2015-07-27 20:29:27 +00:00
|
|
|
bool parseStandaloneMBB(MachineBasicBlock *&MBB);
|
2020-04-08 17:25:21 -04:00
|
|
|
bool parseStandaloneNamedRegister(Register &Reg);
|
2016-10-11 03:13:01 +00:00
|
|
|
bool parseStandaloneVirtualRegister(VRegInfo *&Info);
|
2020-04-08 17:25:21 -04:00
|
|
|
bool parseStandaloneRegister(Register &Reg);
|
2015-08-18 22:26:26 +00:00
|
|
|
bool parseStandaloneStackObject(int &FI);
|
2015-08-19 00:13:25 +00:00
|
|
|
bool parseStandaloneMDNode(MDNode *&Node);
|
2021-05-25 20:21:21 -04:00
|
|
|
bool parseMachineMetadata();
|
|
|
|
bool parseMDTuple(MDNode *&MD, bool IsDistinct);
|
|
|
|
bool parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts);
|
|
|
|
bool parseMetadata(Metadata *&MD);
|
2015-08-13 23:10:16 +00:00
|
|
|
|
|
|
|
bool
|
|
|
|
parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
|
2017-05-05 21:09:30 +00:00
|
|
|
bool parseBasicBlock(MachineBasicBlock &MBB,
|
|
|
|
MachineBasicBlock *&AddFalthroughFrom);
|
2015-08-13 23:10:16 +00:00
|
|
|
bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
|
|
|
|
bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
|
2015-06-22 17:02:30 +00:00
|
|
|
|
2020-04-08 17:25:21 -04:00
|
|
|
bool parseNamedRegister(Register &Reg);
|
2016-10-11 03:13:01 +00:00
|
|
|
bool parseVirtualRegister(VRegInfo *&Info);
|
2018-03-30 18:15:54 +00:00
|
|
|
bool parseNamedVirtualRegister(VRegInfo *&Info);
|
2020-04-08 17:25:21 -04:00
|
|
|
bool parseRegister(Register &Reg, VRegInfo *&VRegInfo);
|
2015-07-06 23:07:26 +00:00
|
|
|
bool parseRegisterFlag(unsigned &Flags);
|
2017-01-18 00:59:19 +00:00
|
|
|
bool parseRegisterClassOrBank(VRegInfo &RegInfo);
|
2015-07-13 23:24:34 +00:00
|
|
|
bool parseSubRegisterIndex(unsigned &SubReg);
|
2015-08-19 19:05:34 +00:00
|
|
|
bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
|
|
|
|
bool parseRegisterOperand(MachineOperand &Dest,
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> &TiedDefIdx,
|
|
|
|
bool IsDef = false);
|
2015-06-23 23:42:28 +00:00
|
|
|
bool parseImmediateOperand(MachineOperand &Dest);
|
2018-07-16 18:51:40 +00:00
|
|
|
bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
|
2015-08-21 21:48:22 +00:00
|
|
|
const Constant *&C);
|
2015-08-05 18:44:00 +00:00
|
|
|
bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
|
2016-07-28 17:15:12 +00:00
|
|
|
bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
|
2015-08-05 18:52:21 +00:00
|
|
|
bool parseTypedImmediateOperand(MachineOperand &Dest);
|
2015-07-31 20:49:21 +00:00
|
|
|
bool parseFPImmediateOperand(MachineOperand &Dest);
|
2015-06-30 18:16:42 +00:00
|
|
|
bool parseMBBReference(MachineBasicBlock *&MBB);
|
2015-06-26 16:46:11 +00:00
|
|
|
bool parseMBBOperand(MachineOperand &Dest);
|
2015-08-18 22:18:52 +00:00
|
|
|
bool parseStackFrameIndex(int &FI);
|
2015-07-16 23:37:45 +00:00
|
|
|
bool parseStackObjectOperand(MachineOperand &Dest);
|
2015-08-12 21:17:02 +00:00
|
|
|
bool parseFixedStackFrameIndex(int &FI);
|
2015-07-16 23:37:45 +00:00
|
|
|
bool parseFixedStackObjectOperand(MachineOperand &Dest);
|
2015-07-28 17:09:52 +00:00
|
|
|
bool parseGlobalValue(GlobalValue *&GV);
|
2015-06-26 22:56:48 +00:00
|
|
|
bool parseGlobalAddressOperand(MachineOperand &Dest);
|
2015-07-20 20:51:18 +00:00
|
|
|
bool parseConstantPoolIndexOperand(MachineOperand &Dest);
|
2016-03-28 18:18:46 +00:00
|
|
|
bool parseSubRegisterIndexOperand(MachineOperand &Dest);
|
2015-07-15 23:38:35 +00:00
|
|
|
bool parseJumpTableIndexOperand(MachineOperand &Dest);
|
2015-07-21 16:59:53 +00:00
|
|
|
bool parseExternalSymbolOperand(MachineOperand &Dest);
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
bool parseMCSymbolOperand(MachineOperand &Dest);
|
2023-05-14 17:14:49 +08:00
|
|
|
[[nodiscard]] bool parseMDNode(MDNode *&Node);
|
2018-07-16 18:51:40 +00:00
|
|
|
bool parseDIExpression(MDNode *&Expr);
|
[mir] Serialize DILocation inline when not possible to use a metadata reference
Summary:
Sometimes MIR-level passes create DILocations that were not present in the
LLVM-IR. For example, it may merge two DILocations together to produce a
DILocation that points to line 0.
Previously, the address of these DILocations were printed which prevented the
MIR from being read back into LLVM. With this patch, DILocations will use
metadata references where possible and fall back on serializing them inline like so:
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)
Reviewers: aprantl, vsk, arphaman
Reviewed By: aprantl
Subscribers: probinson, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D55243
llvm-svn: 349035
2018-12-13 14:25:27 +00:00
|
|
|
bool parseDILocation(MDNode *&Expr);
|
2015-07-22 17:58:46 +00:00
|
|
|
bool parseMetadataOperand(MachineOperand &Dest);
|
2015-07-21 22:28:27 +00:00
|
|
|
bool parseCFIOffset(int &Offset);
|
2020-04-08 17:25:21 -04:00
|
|
|
bool parseCFIRegister(Register &Reg);
|
2021-06-14 06:57:58 +05:30
|
|
|
bool parseCFIAddressSpace(unsigned &AddressSpace);
|
2017-12-15 15:17:18 +00:00
|
|
|
bool parseCFIEscapeValues(std::string& Values);
|
2015-07-21 22:28:27 +00:00
|
|
|
bool parseCFIOperand(MachineOperand &Dest);
|
2015-07-28 17:28:03 +00:00
|
|
|
bool parseIRBlock(BasicBlock *&BB, const Function &F);
|
|
|
|
bool parseBlockAddressOperand(MachineOperand &Dest);
|
2016-07-29 20:32:59 +00:00
|
|
|
bool parseIntrinsicOperand(MachineOperand &Dest);
|
2016-08-17 20:25:25 +00:00
|
|
|
bool parsePredicateOperand(MachineOperand &Dest);
|
2019-08-13 15:34:38 +00:00
|
|
|
bool parseShuffleMaskOperand(MachineOperand &Dest);
|
2015-07-28 23:02:45 +00:00
|
|
|
bool parseTargetIndexOperand(MachineOperand &Dest);
|
2022-09-15 11:26:57 +01:00
|
|
|
bool parseDbgInstrRefOperand(MachineOperand &Dest);
|
2017-03-19 08:14:18 +00:00
|
|
|
bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
|
2015-08-10 23:24:42 +00:00
|
|
|
bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
|
2020-01-08 20:02:37 -08:00
|
|
|
bool parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
|
|
|
|
MachineOperand &Dest,
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> &TiedDefIdx);
|
2020-01-08 20:02:37 -08:00
|
|
|
bool parseMachineOperandAndTargetFlags(const unsigned OpCode,
|
|
|
|
const unsigned OpIdx,
|
|
|
|
MachineOperand &Dest,
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> &TiedDefIdx);
|
2015-08-07 20:21:00 +00:00
|
|
|
bool parseOffset(int64_t &Offset);
|
2022-08-16 16:15:44 -07:00
|
|
|
bool parseIRBlockAddressTaken(BasicBlock *&BB);
|
2021-09-24 15:54:17 -07:00
|
|
|
bool parseAlignment(uint64_t &Alignment);
|
2018-01-26 11:47:28 +00:00
|
|
|
bool parseAddrspace(unsigned &Addrspace);
|
2022-12-13 09:06:36 +00:00
|
|
|
bool parseSectionID(std::optional<MBBSectionID> &SID);
|
2023-10-27 21:49:39 -07:00
|
|
|
bool parseBBID(std::optional<UniqueBBID> &BBID);
|
2023-06-30 08:14:40 +01:00
|
|
|
bool parseCallFrameSize(unsigned &CallFrameSize);
|
2015-08-05 22:26:15 +00:00
|
|
|
bool parseOperandsOffset(MachineOperand &Op);
|
2015-08-19 23:27:07 +00:00
|
|
|
bool parseIRValue(const Value *&V);
|
2016-07-15 18:26:59 +00:00
|
|
|
bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
|
2015-08-12 20:33:26 +00:00
|
|
|
bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
|
|
|
|
bool parseMachinePointerInfo(MachinePointerInfo &Dest);
|
2017-07-11 22:23:00 +00:00
|
|
|
bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
|
2017-02-13 22:14:08 +00:00
|
|
|
bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
|
2015-08-03 23:08:19 +00:00
|
|
|
bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
|
2019-11-05 10:54:50 -08:00
|
|
|
bool parseHeapAllocMarker(MDNode *&Node);
|
2022-09-14 10:30:25 +02:00
|
|
|
bool parsePCSections(MDNode *&Node);
|
2015-06-23 16:35:26 +00:00
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
bool parseTargetImmMnemonic(const unsigned OpCode, const unsigned OpIdx,
|
|
|
|
MachineOperand &Dest, const MIRFormatter &MF);
|
|
|
|
|
2015-06-22 17:02:30 +00:00
|
|
|
private:
|
2015-06-26 16:46:11 +00:00
|
|
|
/// Convert the integer literal in the current token into an unsigned integer.
|
|
|
|
///
|
|
|
|
/// Return true if an error occurred.
|
|
|
|
bool getUnsigned(unsigned &Result);
|
|
|
|
|
2015-08-03 23:08:19 +00:00
|
|
|
/// Convert the integer literal in the current token into an uint64.
|
|
|
|
///
|
|
|
|
/// Return true if an error occurred.
|
|
|
|
bool getUint64(uint64_t &Result);
|
|
|
|
|
2016-12-16 13:58:01 +00:00
|
|
|
/// Convert the hexadecimal literal in the current token into an unsigned
|
|
|
|
/// APInt with a minimum bitwidth required to represent the value.
|
|
|
|
///
|
|
|
|
/// Return true if the literal does not represent an integer value.
|
|
|
|
bool getHexUint(APInt &Result);
|
|
|
|
|
2015-07-23 23:09:07 +00:00
|
|
|
/// If the current token is of the given kind, consume it and return false.
|
|
|
|
/// Otherwise report an error and return true.
|
|
|
|
bool expectAndConsume(MIToken::TokenKind TokenKind);
|
|
|
|
|
2015-08-13 23:10:16 +00:00
|
|
|
/// If the current token is of the given kind, consume it and return true.
|
|
|
|
/// Otherwise return false.
|
|
|
|
bool consumeIfPresent(MIToken::TokenKind TokenKind);
|
|
|
|
|
2015-07-17 00:24:15 +00:00
|
|
|
bool parseInstruction(unsigned &OpCode, unsigned &Flags);
|
2015-06-23 16:35:26 +00:00
|
|
|
|
2015-08-19 19:05:34 +00:00
|
|
|
bool assignRegisterTies(MachineInstr &MI,
|
2015-08-19 19:19:16 +00:00
|
|
|
ArrayRef<ParsedMachineOperand> Operands);
|
2015-08-19 19:05:34 +00:00
|
|
|
|
2015-08-19 19:19:16 +00:00
|
|
|
bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
|
2015-07-07 02:08:46 +00:00
|
|
|
const MCInstrDesc &MCID);
|
|
|
|
|
2015-07-27 22:42:41 +00:00
|
|
|
const BasicBlock *getIRBlock(unsigned Slot);
|
2015-08-06 23:57:04 +00:00
|
|
|
const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
|
2015-07-28 23:02:45 +00:00
|
|
|
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
/// Get or create an MCSymbol for a given name.
|
|
|
|
MCSymbol *getOrCreateMCSymbol(StringRef Name);
|
|
|
|
|
2017-07-11 22:23:00 +00:00
|
|
|
/// parseStringConstant
|
|
|
|
/// ::= StringConstant
|
|
|
|
bool parseStringConstant(std::string &Result);
|
2021-05-25 20:21:21 -04:00
|
|
|
|
|
|
|
/// Map the location in the MI string to the corresponding location specified
|
|
|
|
/// in `SourceRange`.
|
|
|
|
SMLoc mapSMLoc(StringRef::iterator Loc);
|
2015-06-22 17:02:30 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
} // end anonymous namespace
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
|
2016-07-13 23:27:50 +00:00
|
|
|
StringRef Source)
|
|
|
|
: MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
|
|
|
|
{}
|
2015-06-22 20:37:46 +00:00
|
|
|
|
2021-05-25 20:21:21 -04:00
|
|
|
MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
|
|
|
|
StringRef Source, SMRange SourceRange)
|
|
|
|
: MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source),
|
|
|
|
SourceRange(SourceRange), PFS(PFS) {}
|
|
|
|
|
2016-03-08 00:57:31 +00:00
|
|
|
void MIParser::lex(unsigned SkipChar) {
|
2015-06-22 20:37:46 +00:00
|
|
|
CurrentSource = lexMIToken(
|
2020-07-08 18:50:00 +03:00
|
|
|
CurrentSource.slice(SkipChar, StringRef::npos), Token,
|
2015-06-22 20:37:46 +00:00
|
|
|
[this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
|
2015-06-22 17:02:30 +00:00
|
|
|
|
2015-06-22 20:37:46 +00:00
|
|
|
bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
|
2016-07-13 23:27:50 +00:00
|
|
|
const SourceMgr &SM = *PFS.SM;
|
2015-06-22 20:37:46 +00:00
|
|
|
assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
|
2015-08-13 23:10:16 +00:00
|
|
|
const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
|
|
|
|
if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
|
|
|
|
// Create an ordinary diagnostic when the source manager's buffer is the
|
|
|
|
// source string.
|
|
|
|
Error = SM.GetMessage(SMLoc::getFromPointer(Loc), SourceMgr::DK_Error, Msg);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
// Create a diagnostic for a YAML string literal.
|
|
|
|
Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
|
|
|
|
Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
|
2022-12-02 20:36:08 -08:00
|
|
|
Source, std::nullopt, std::nullopt);
|
2015-06-22 17:02:30 +00:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-05-25 20:21:21 -04:00
|
|
|
SMLoc MIParser::mapSMLoc(StringRef::iterator Loc) {
|
|
|
|
assert(SourceRange.isValid() && "Invalid source range");
|
|
|
|
assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
|
|
|
|
return SMLoc::getFromPointer(SourceRange.Start.getPointer() +
|
|
|
|
(Loc - Source.data()));
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
typedef function_ref<bool(StringRef::iterator Loc, const Twine &)>
|
|
|
|
ErrorCallbackType;
|
|
|
|
|
2015-07-23 23:09:07 +00:00
|
|
|
static const char *toString(MIToken::TokenKind TokenKind) {
|
|
|
|
switch (TokenKind) {
|
|
|
|
case MIToken::comma:
|
|
|
|
return "','";
|
2015-07-29 18:51:21 +00:00
|
|
|
case MIToken::equal:
|
|
|
|
return "'='";
|
2015-08-13 23:10:16 +00:00
|
|
|
case MIToken::colon:
|
|
|
|
return "':'";
|
2015-07-28 17:28:03 +00:00
|
|
|
case MIToken::lparen:
|
|
|
|
return "'('";
|
|
|
|
case MIToken::rparen:
|
|
|
|
return "')'";
|
2015-07-23 23:09:07 +00:00
|
|
|
default:
|
|
|
|
return "<unknown token>";
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
|
|
|
|
if (Token.isNot(TokenKind))
|
|
|
|
return error(Twine("expected ") + toString(TokenKind));
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-13 23:10:16 +00:00
|
|
|
bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
|
|
|
|
if (Token.isNot(TokenKind))
|
|
|
|
return false;
|
|
|
|
lex();
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2020-04-13 12:14:42 -07:00
|
|
|
// Parse Machine Basic Block Section ID.
|
2022-12-13 09:06:36 +00:00
|
|
|
bool MIParser::parseSectionID(std::optional<MBBSectionID> &SID) {
|
2020-03-16 15:56:02 -07:00
|
|
|
assert(Token.is(MIToken::kw_bbsections));
|
|
|
|
lex();
|
2020-04-13 12:14:42 -07:00
|
|
|
if (Token.is(MIToken::IntegerLiteral)) {
|
|
|
|
unsigned Value = 0;
|
|
|
|
if (getUnsigned(Value))
|
|
|
|
return error("Unknown Section ID");
|
|
|
|
SID = MBBSectionID{Value};
|
|
|
|
} else {
|
|
|
|
const StringRef &S = Token.stringValue();
|
|
|
|
if (S == "Exception")
|
|
|
|
SID = MBBSectionID::ExceptionSectionID;
|
|
|
|
else if (S == "Cold")
|
|
|
|
SID = MBBSectionID::ColdSectionID;
|
|
|
|
else
|
|
|
|
return error("Unknown Section ID");
|
|
|
|
}
|
2020-03-16 15:56:02 -07:00
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.
Let Propeller use specialized IDs for basic blocks, instead of MBB number.
This allows optimizations not just prior to asm-printer, but throughout the entire codegen.
This patch only implements the functionality under the new `LLVM_BB_ADDR_MAP` version, but the old version is still being used. A later patch will change the used version.
####Background
Today Propeller uses machine basic block (MBB) numbers, which already exist, to map native assembly to machine IR. This is done as follows.
- Basic block addresses are captured and dumped into the `LLVM_BB_ADDR_MAP` section just before the AsmPrinter pass which writes out object files. This ensures that we have a mapping that is close to assembly.
- Profiling mapping works by taking a virtual address of an instruction and looking up the `LLVM_BB_ADDR_MAP` section to find the MBB number it corresponds to.
- While this works well today, we need to do better when we scale Propeller to target other Machine IR optimizations like spill code optimization. Register allocation happens earlier in the Machine IR pipeline and we need an annotation mechanism that is valid at that point.
- The current scheme will not work in this scenario because the MBB number of a particular basic block is not fixed and changes over the course of codegen (via renumbering, adding, and removing the basic blocks).
- In other words, the volatile MBB numbers do not provide a one-to-one correspondence throughout the lifetime of Machine IR. Profile annotation using MBB numbers is restricted to a fixed point; only valid at the exact point where it was dumped.
- Further, the object file can only be dumped before AsmPrinter and cannot be dumped at an arbitrary point in the Machine IR pass pipeline. Hence, MBB numbers are not suitable and we need something else.
####Solution
We propose using fixed unique incremental MBB IDs for basic blocks instead of volatile MBB numbers. These IDs are assigned upon the creation of machine basic blocks. We modify `MachineFunction::CreateMachineBasicBlock` to assign the fixed ID to every newly created basic block. It assigns `MachineFunction::NextMBBID` to the MBB ID and then increments it, which ensures having unique IDs.
To ensure correct profile attribution, multiple equivalent compilations must generate the same Propeller IDs. This is guaranteed as long as the MachineFunction passes run in the same order. Since the `NextBBID` variable is scoped to `MachineFunction`, interleaving of codegen for different functions won't cause any inconsistencies.
The new encoding is generated under the new version number 2 and we keep backward-compatibility with older versions.
####Impact on Size of the `LLVM_BB_ADDR_MAP` Section
Emitting the Propeller ID results in a 23% increase in the size of the `LLVM_BB_ADDR_MAP` section for the clang binary.
Reviewed By: tmsriram
Differential Revision: https://reviews.llvm.org/D100808
2022-12-06 22:37:33 -08:00
|
|
|
// Parse Machine Basic Block ID.
|
2023-10-27 21:49:39 -07:00
|
|
|
bool MIParser::parseBBID(std::optional<UniqueBBID> &BBID) {
|
[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.
Let Propeller use specialized IDs for basic blocks, instead of MBB number.
This allows optimizations not just prior to asm-printer, but throughout the entire codegen.
This patch only implements the functionality under the new `LLVM_BB_ADDR_MAP` version, but the old version is still being used. A later patch will change the used version.
####Background
Today Propeller uses machine basic block (MBB) numbers, which already exist, to map native assembly to machine IR. This is done as follows.
- Basic block addresses are captured and dumped into the `LLVM_BB_ADDR_MAP` section just before the AsmPrinter pass which writes out object files. This ensures that we have a mapping that is close to assembly.
- Profiling mapping works by taking a virtual address of an instruction and looking up the `LLVM_BB_ADDR_MAP` section to find the MBB number it corresponds to.
- While this works well today, we need to do better when we scale Propeller to target other Machine IR optimizations like spill code optimization. Register allocation happens earlier in the Machine IR pipeline and we need an annotation mechanism that is valid at that point.
- The current scheme will not work in this scenario because the MBB number of a particular basic block is not fixed and changes over the course of codegen (via renumbering, adding, and removing the basic blocks).
- In other words, the volatile MBB numbers do not provide a one-to-one correspondence throughout the lifetime of Machine IR. Profile annotation using MBB numbers is restricted to a fixed point; only valid at the exact point where it was dumped.
- Further, the object file can only be dumped before AsmPrinter and cannot be dumped at an arbitrary point in the Machine IR pass pipeline. Hence, MBB numbers are not suitable and we need something else.
####Solution
We propose using fixed unique incremental MBB IDs for basic blocks instead of volatile MBB numbers. These IDs are assigned upon the creation of machine basic blocks. We modify `MachineFunction::CreateMachineBasicBlock` to assign the fixed ID to every newly created basic block. It assigns `MachineFunction::NextMBBID` to the MBB ID and then increments it, which ensures having unique IDs.
To ensure correct profile attribution, multiple equivalent compilations must generate the same Propeller IDs. This is guaranteed as long as the MachineFunction passes run in the same order. Since the `NextBBID` variable is scoped to `MachineFunction`, interleaving of codegen for different functions won't cause any inconsistencies.
The new encoding is generated under the new version number 2 and we keep backward-compatibility with older versions.
####Impact on Size of the `LLVM_BB_ADDR_MAP` Section
Emitting the Propeller ID results in a 23% increase in the size of the `LLVM_BB_ADDR_MAP` section for the clang binary.
Reviewed By: tmsriram
Differential Revision: https://reviews.llvm.org/D100808
2022-12-06 22:37:33 -08:00
|
|
|
assert(Token.is(MIToken::kw_bb_id));
|
|
|
|
lex();
|
2023-10-27 21:49:39 -07:00
|
|
|
unsigned BaseID = 0;
|
|
|
|
unsigned CloneID = 0;
|
|
|
|
if (getUnsigned(BaseID))
|
[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.
Let Propeller use specialized IDs for basic blocks, instead of MBB number.
This allows optimizations not just prior to asm-printer, but throughout the entire codegen.
This patch only implements the functionality under the new `LLVM_BB_ADDR_MAP` version, but the old version is still being used. A later patch will change the used version.
####Background
Today Propeller uses machine basic block (MBB) numbers, which already exist, to map native assembly to machine IR. This is done as follows.
- Basic block addresses are captured and dumped into the `LLVM_BB_ADDR_MAP` section just before the AsmPrinter pass which writes out object files. This ensures that we have a mapping that is close to assembly.
- Profiling mapping works by taking a virtual address of an instruction and looking up the `LLVM_BB_ADDR_MAP` section to find the MBB number it corresponds to.
- While this works well today, we need to do better when we scale Propeller to target other Machine IR optimizations like spill code optimization. Register allocation happens earlier in the Machine IR pipeline and we need an annotation mechanism that is valid at that point.
- The current scheme will not work in this scenario because the MBB number of a particular basic block is not fixed and changes over the course of codegen (via renumbering, adding, and removing the basic blocks).
- In other words, the volatile MBB numbers do not provide a one-to-one correspondence throughout the lifetime of Machine IR. Profile annotation using MBB numbers is restricted to a fixed point; only valid at the exact point where it was dumped.
- Further, the object file can only be dumped before AsmPrinter and cannot be dumped at an arbitrary point in the Machine IR pass pipeline. Hence, MBB numbers are not suitable and we need something else.
####Solution
We propose using fixed unique incremental MBB IDs for basic blocks instead of volatile MBB numbers. These IDs are assigned upon the creation of machine basic blocks. We modify `MachineFunction::CreateMachineBasicBlock` to assign the fixed ID to every newly created basic block. It assigns `MachineFunction::NextMBBID` to the MBB ID and then increments it, which ensures having unique IDs.
To ensure correct profile attribution, multiple equivalent compilations must generate the same Propeller IDs. This is guaranteed as long as the MachineFunction passes run in the same order. Since the `NextBBID` variable is scoped to `MachineFunction`, interleaving of codegen for different functions won't cause any inconsistencies.
The new encoding is generated under the new version number 2 and we keep backward-compatibility with older versions.
####Impact on Size of the `LLVM_BB_ADDR_MAP` Section
Emitting the Propeller ID results in a 23% increase in the size of the `LLVM_BB_ADDR_MAP` section for the clang binary.
Reviewed By: tmsriram
Differential Revision: https://reviews.llvm.org/D100808
2022-12-06 22:37:33 -08:00
|
|
|
return error("Unknown BB ID");
|
|
|
|
lex();
|
2023-10-27 21:49:39 -07:00
|
|
|
if (Token.is(MIToken::IntegerLiteral)) {
|
|
|
|
if (getUnsigned(CloneID))
|
|
|
|
return error("Unknown Clone ID");
|
|
|
|
lex();
|
|
|
|
}
|
|
|
|
BBID = {BaseID, CloneID};
|
[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.
Let Propeller use specialized IDs for basic blocks, instead of MBB number.
This allows optimizations not just prior to asm-printer, but throughout the entire codegen.
This patch only implements the functionality under the new `LLVM_BB_ADDR_MAP` version, but the old version is still being used. A later patch will change the used version.
####Background
Today Propeller uses machine basic block (MBB) numbers, which already exist, to map native assembly to machine IR. This is done as follows.
- Basic block addresses are captured and dumped into the `LLVM_BB_ADDR_MAP` section just before the AsmPrinter pass which writes out object files. This ensures that we have a mapping that is close to assembly.
- Profiling mapping works by taking a virtual address of an instruction and looking up the `LLVM_BB_ADDR_MAP` section to find the MBB number it corresponds to.
- While this works well today, we need to do better when we scale Propeller to target other Machine IR optimizations like spill code optimization. Register allocation happens earlier in the Machine IR pipeline and we need an annotation mechanism that is valid at that point.
- The current scheme will not work in this scenario because the MBB number of a particular basic block is not fixed and changes over the course of codegen (via renumbering, adding, and removing the basic blocks).
- In other words, the volatile MBB numbers do not provide a one-to-one correspondence throughout the lifetime of Machine IR. Profile annotation using MBB numbers is restricted to a fixed point; only valid at the exact point where it was dumped.
- Further, the object file can only be dumped before AsmPrinter and cannot be dumped at an arbitrary point in the Machine IR pass pipeline. Hence, MBB numbers are not suitable and we need something else.
####Solution
We propose using fixed unique incremental MBB IDs for basic blocks instead of volatile MBB numbers. These IDs are assigned upon the creation of machine basic blocks. We modify `MachineFunction::CreateMachineBasicBlock` to assign the fixed ID to every newly created basic block. It assigns `MachineFunction::NextMBBID` to the MBB ID and then increments it, which ensures having unique IDs.
To ensure correct profile attribution, multiple equivalent compilations must generate the same Propeller IDs. This is guaranteed as long as the MachineFunction passes run in the same order. Since the `NextBBID` variable is scoped to `MachineFunction`, interleaving of codegen for different functions won't cause any inconsistencies.
The new encoding is generated under the new version number 2 and we keep backward-compatibility with older versions.
####Impact on Size of the `LLVM_BB_ADDR_MAP` Section
Emitting the Propeller ID results in a 23% increase in the size of the `LLVM_BB_ADDR_MAP` section for the clang binary.
Reviewed By: tmsriram
Differential Revision: https://reviews.llvm.org/D100808
2022-12-06 22:37:33 -08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2023-06-30 08:14:40 +01:00
|
|
|
// Parse basic block call frame size.
|
|
|
|
bool MIParser::parseCallFrameSize(unsigned &CallFrameSize) {
|
|
|
|
assert(Token.is(MIToken::kw_call_frame_size));
|
|
|
|
lex();
|
|
|
|
unsigned Value = 0;
|
|
|
|
if (getUnsigned(Value))
|
|
|
|
return error("Unknown call frame size");
|
|
|
|
CallFrameSize = Value;
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-13 23:10:16 +00:00
|
|
|
bool MIParser::parseBasicBlockDefinition(
|
|
|
|
DenseMap<unsigned, MachineBasicBlock *> &MBBSlots) {
|
|
|
|
assert(Token.is(MIToken::MachineBasicBlockLabel));
|
|
|
|
unsigned ID = 0;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
|
|
|
auto Loc = Token.location();
|
|
|
|
auto Name = Token.stringValue();
|
|
|
|
lex();
|
2022-08-16 16:15:44 -07:00
|
|
|
bool MachineBlockAddressTaken = false;
|
|
|
|
BasicBlock *AddressTakenIRBlock = nullptr;
|
2015-08-13 23:10:16 +00:00
|
|
|
bool IsLandingPad = false;
|
2021-10-07 10:38:38 +01:00
|
|
|
bool IsInlineAsmBrIndirectTarget = false;
|
2020-03-20 14:06:27 -07:00
|
|
|
bool IsEHFuncletEntry = false;
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<MBBSectionID> SectionID;
|
2021-09-24 15:54:17 -07:00
|
|
|
uint64_t Alignment = 0;
|
2023-10-27 21:49:39 -07:00
|
|
|
std::optional<UniqueBBID> BBID;
|
2023-06-30 08:14:40 +01:00
|
|
|
unsigned CallFrameSize = 0;
|
2015-08-13 23:10:16 +00:00
|
|
|
BasicBlock *BB = nullptr;
|
|
|
|
if (consumeIfPresent(MIToken::lparen)) {
|
|
|
|
do {
|
|
|
|
// TODO: Report an error when multiple same attributes are specified.
|
|
|
|
switch (Token.kind()) {
|
2022-08-16 16:15:44 -07:00
|
|
|
case MIToken::kw_machine_block_address_taken:
|
|
|
|
MachineBlockAddressTaken = true;
|
2015-08-13 23:10:16 +00:00
|
|
|
lex();
|
|
|
|
break;
|
2022-08-16 16:15:44 -07:00
|
|
|
case MIToken::kw_ir_block_address_taken:
|
|
|
|
if (parseIRBlockAddressTaken(AddressTakenIRBlock))
|
|
|
|
return true;
|
|
|
|
break;
|
2015-08-13 23:10:16 +00:00
|
|
|
case MIToken::kw_landing_pad:
|
|
|
|
IsLandingPad = true;
|
|
|
|
lex();
|
|
|
|
break;
|
2021-10-07 10:38:38 +01:00
|
|
|
case MIToken::kw_inlineasm_br_indirect_target:
|
|
|
|
IsInlineAsmBrIndirectTarget = true;
|
|
|
|
lex();
|
|
|
|
break;
|
2020-03-20 14:06:27 -07:00
|
|
|
case MIToken::kw_ehfunclet_entry:
|
|
|
|
IsEHFuncletEntry = true;
|
|
|
|
lex();
|
|
|
|
break;
|
2015-08-13 23:10:16 +00:00
|
|
|
case MIToken::kw_align:
|
|
|
|
if (parseAlignment(Alignment))
|
|
|
|
return true;
|
|
|
|
break;
|
|
|
|
case MIToken::IRBlock:
|
2022-08-16 16:15:44 -07:00
|
|
|
case MIToken::NamedIRBlock:
|
2015-08-13 23:10:16 +00:00
|
|
|
// TODO: Report an error when both name and ir block are specified.
|
2017-12-15 22:22:58 +00:00
|
|
|
if (parseIRBlock(BB, MF.getFunction()))
|
2015-08-13 23:10:16 +00:00
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
break;
|
2020-03-16 15:56:02 -07:00
|
|
|
case MIToken::kw_bbsections:
|
2020-04-13 12:14:42 -07:00
|
|
|
if (parseSectionID(SectionID))
|
2020-03-16 15:56:02 -07:00
|
|
|
return true;
|
|
|
|
break;
|
[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.
Let Propeller use specialized IDs for basic blocks, instead of MBB number.
This allows optimizations not just prior to asm-printer, but throughout the entire codegen.
This patch only implements the functionality under the new `LLVM_BB_ADDR_MAP` version, but the old version is still being used. A later patch will change the used version.
####Background
Today Propeller uses machine basic block (MBB) numbers, which already exist, to map native assembly to machine IR. This is done as follows.
- Basic block addresses are captured and dumped into the `LLVM_BB_ADDR_MAP` section just before the AsmPrinter pass which writes out object files. This ensures that we have a mapping that is close to assembly.
- Profiling mapping works by taking a virtual address of an instruction and looking up the `LLVM_BB_ADDR_MAP` section to find the MBB number it corresponds to.
- While this works well today, we need to do better when we scale Propeller to target other Machine IR optimizations like spill code optimization. Register allocation happens earlier in the Machine IR pipeline and we need an annotation mechanism that is valid at that point.
- The current scheme will not work in this scenario because the MBB number of a particular basic block is not fixed and changes over the course of codegen (via renumbering, adding, and removing the basic blocks).
- In other words, the volatile MBB numbers do not provide a one-to-one correspondence throughout the lifetime of Machine IR. Profile annotation using MBB numbers is restricted to a fixed point; only valid at the exact point where it was dumped.
- Further, the object file can only be dumped before AsmPrinter and cannot be dumped at an arbitrary point in the Machine IR pass pipeline. Hence, MBB numbers are not suitable and we need something else.
####Solution
We propose using fixed unique incremental MBB IDs for basic blocks instead of volatile MBB numbers. These IDs are assigned upon the creation of machine basic blocks. We modify `MachineFunction::CreateMachineBasicBlock` to assign the fixed ID to every newly created basic block. It assigns `MachineFunction::NextMBBID` to the MBB ID and then increments it, which ensures having unique IDs.
To ensure correct profile attribution, multiple equivalent compilations must generate the same Propeller IDs. This is guaranteed as long as the MachineFunction passes run in the same order. Since the `NextBBID` variable is scoped to `MachineFunction`, interleaving of codegen for different functions won't cause any inconsistencies.
The new encoding is generated under the new version number 2 and we keep backward-compatibility with older versions.
####Impact on Size of the `LLVM_BB_ADDR_MAP` Section
Emitting the Propeller ID results in a 23% increase in the size of the `LLVM_BB_ADDR_MAP` section for the clang binary.
Reviewed By: tmsriram
Differential Revision: https://reviews.llvm.org/D100808
2022-12-06 22:37:33 -08:00
|
|
|
case MIToken::kw_bb_id:
|
|
|
|
if (parseBBID(BBID))
|
|
|
|
return true;
|
|
|
|
break;
|
2023-06-30 08:14:40 +01:00
|
|
|
case MIToken::kw_call_frame_size:
|
|
|
|
if (parseCallFrameSize(CallFrameSize))
|
|
|
|
return true;
|
|
|
|
break;
|
2015-08-13 23:10:16 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} while (consumeIfPresent(MIToken::comma));
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
if (expectAndConsume(MIToken::colon))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
if (!Name.empty()) {
|
|
|
|
BB = dyn_cast_or_null<BasicBlock>(
|
2017-12-15 22:22:58 +00:00
|
|
|
MF.getFunction().getValueSymbolTable()->lookup(Name));
|
2015-08-13 23:10:16 +00:00
|
|
|
if (!BB)
|
|
|
|
return error(Loc, Twine("basic block '") + Name +
|
|
|
|
"' is not defined in the function '" +
|
|
|
|
MF.getName() + "'");
|
|
|
|
}
|
|
|
|
auto *MBB = MF.CreateMachineBasicBlock(BB);
|
|
|
|
MF.insert(MF.end(), MBB);
|
|
|
|
bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
|
|
|
|
if (!WasInserted)
|
|
|
|
return error(Loc, Twine("redefinition of machine basic block with id #") +
|
|
|
|
Twine(ID));
|
|
|
|
if (Alignment)
|
2019-09-27 12:54:21 +00:00
|
|
|
MBB->setAlignment(Align(Alignment));
|
2022-08-16 16:15:44 -07:00
|
|
|
if (MachineBlockAddressTaken)
|
|
|
|
MBB->setMachineBlockAddressTaken();
|
|
|
|
if (AddressTakenIRBlock)
|
|
|
|
MBB->setAddressTakenIRBlock(AddressTakenIRBlock);
|
2015-08-27 23:27:47 +00:00
|
|
|
MBB->setIsEHPad(IsLandingPad);
|
2021-10-07 10:38:38 +01:00
|
|
|
MBB->setIsInlineAsmBrIndirectTarget(IsInlineAsmBrIndirectTarget);
|
2020-03-20 14:06:27 -07:00
|
|
|
MBB->setIsEHFuncletEntry(IsEHFuncletEntry);
|
2022-06-25 21:42:52 -07:00
|
|
|
if (SectionID) {
|
2022-12-16 23:41:36 +00:00
|
|
|
MBB->setSectionID(*SectionID);
|
2020-03-16 15:56:02 -07:00
|
|
|
MF.setBBSectionsType(BasicBlockSection::List);
|
|
|
|
}
|
[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.
Let Propeller use specialized IDs for basic blocks, instead of MBB number.
This allows optimizations not just prior to asm-printer, but throughout the entire codegen.
This patch only implements the functionality under the new `LLVM_BB_ADDR_MAP` version, but the old version is still being used. A later patch will change the used version.
####Background
Today Propeller uses machine basic block (MBB) numbers, which already exist, to map native assembly to machine IR. This is done as follows.
- Basic block addresses are captured and dumped into the `LLVM_BB_ADDR_MAP` section just before the AsmPrinter pass which writes out object files. This ensures that we have a mapping that is close to assembly.
- Profiling mapping works by taking a virtual address of an instruction and looking up the `LLVM_BB_ADDR_MAP` section to find the MBB number it corresponds to.
- While this works well today, we need to do better when we scale Propeller to target other Machine IR optimizations like spill code optimization. Register allocation happens earlier in the Machine IR pipeline and we need an annotation mechanism that is valid at that point.
- The current scheme will not work in this scenario because the MBB number of a particular basic block is not fixed and changes over the course of codegen (via renumbering, adding, and removing the basic blocks).
- In other words, the volatile MBB numbers do not provide a one-to-one correspondence throughout the lifetime of Machine IR. Profile annotation using MBB numbers is restricted to a fixed point; only valid at the exact point where it was dumped.
- Further, the object file can only be dumped before AsmPrinter and cannot be dumped at an arbitrary point in the Machine IR pass pipeline. Hence, MBB numbers are not suitable and we need something else.
####Solution
We propose using fixed unique incremental MBB IDs for basic blocks instead of volatile MBB numbers. These IDs are assigned upon the creation of machine basic blocks. We modify `MachineFunction::CreateMachineBasicBlock` to assign the fixed ID to every newly created basic block. It assigns `MachineFunction::NextMBBID` to the MBB ID and then increments it, which ensures having unique IDs.
To ensure correct profile attribution, multiple equivalent compilations must generate the same Propeller IDs. This is guaranteed as long as the MachineFunction passes run in the same order. Since the `NextBBID` variable is scoped to `MachineFunction`, interleaving of codegen for different functions won't cause any inconsistencies.
The new encoding is generated under the new version number 2 and we keep backward-compatibility with older versions.
####Impact on Size of the `LLVM_BB_ADDR_MAP` Section
Emitting the Propeller ID results in a 23% increase in the size of the `LLVM_BB_ADDR_MAP` section for the clang binary.
Reviewed By: tmsriram
Differential Revision: https://reviews.llvm.org/D100808
2022-12-06 22:37:33 -08:00
|
|
|
if (BBID.has_value()) {
|
|
|
|
// BBSectionsType is set to `List` if any basic blocks has `SectionID`.
|
|
|
|
// Here, we set it to `Labels` if it hasn't been set above.
|
|
|
|
if (!MF.hasBBSections())
|
|
|
|
MF.setBBSectionsType(BasicBlockSection::Labels);
|
|
|
|
MBB->setBBID(BBID.value());
|
|
|
|
}
|
2023-06-30 08:14:40 +01:00
|
|
|
MBB->setCallFrameSize(CallFrameSize);
|
2015-08-13 23:10:16 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseBasicBlockDefinitions(
|
|
|
|
DenseMap<unsigned, MachineBasicBlock *> &MBBSlots) {
|
|
|
|
lex();
|
|
|
|
// Skip until the first machine basic block.
|
|
|
|
while (Token.is(MIToken::Newline))
|
|
|
|
lex();
|
|
|
|
if (Token.isErrorOrEOF())
|
|
|
|
return Token.isError();
|
|
|
|
if (Token.isNot(MIToken::MachineBasicBlockLabel))
|
|
|
|
return error("expected a basic block definition before instructions");
|
2015-08-14 18:57:24 +00:00
|
|
|
unsigned BraceDepth = 0;
|
2015-08-13 23:10:16 +00:00
|
|
|
do {
|
|
|
|
if (parseBasicBlockDefinition(MBBSlots))
|
|
|
|
return true;
|
|
|
|
bool IsAfterNewline = false;
|
|
|
|
// Skip until the next machine basic block.
|
|
|
|
while (true) {
|
|
|
|
if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
|
|
|
|
Token.isErrorOrEOF())
|
|
|
|
break;
|
|
|
|
else if (Token.is(MIToken::MachineBasicBlockLabel))
|
|
|
|
return error("basic block definition should be located at the start of "
|
|
|
|
"the line");
|
2015-08-14 18:57:24 +00:00
|
|
|
else if (consumeIfPresent(MIToken::Newline)) {
|
2015-08-13 23:10:16 +00:00
|
|
|
IsAfterNewline = true;
|
2015-08-14 18:57:24 +00:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
IsAfterNewline = false;
|
|
|
|
if (Token.is(MIToken::lbrace))
|
|
|
|
++BraceDepth;
|
|
|
|
if (Token.is(MIToken::rbrace)) {
|
|
|
|
if (!BraceDepth)
|
|
|
|
return error("extraneous closing brace ('}')");
|
|
|
|
--BraceDepth;
|
|
|
|
}
|
2015-08-13 23:10:16 +00:00
|
|
|
lex();
|
|
|
|
}
|
2015-08-14 18:57:24 +00:00
|
|
|
// Verify that we closed all of the '{' at the end of a file or a block.
|
|
|
|
if (!Token.isError() && BraceDepth)
|
|
|
|
return error("expected '}'"); // FIXME: Report a note that shows '{'.
|
2015-08-13 23:10:16 +00:00
|
|
|
} while (!Token.isErrorOrEOF());
|
|
|
|
return Token.isError();
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
|
|
|
|
assert(Token.is(MIToken::kw_liveins));
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::colon))
|
|
|
|
return true;
|
|
|
|
if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
|
|
|
|
return false;
|
|
|
|
do {
|
|
|
|
if (Token.isNot(MIToken::NamedRegister))
|
|
|
|
return error("expected a named register");
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg;
|
2016-10-11 03:13:01 +00:00
|
|
|
if (parseNamedRegister(Reg))
|
2015-08-13 23:10:16 +00:00
|
|
|
return true;
|
|
|
|
lex();
|
2016-12-15 14:36:06 +00:00
|
|
|
LaneBitmask Mask = LaneBitmask::getAll();
|
2016-10-12 21:06:45 +00:00
|
|
|
if (consumeIfPresent(MIToken::colon)) {
|
|
|
|
// Parse lane mask.
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) &&
|
|
|
|
Token.isNot(MIToken::HexLiteral))
|
|
|
|
return error("expected a lane mask");
|
2020-02-28 12:28:45 -08:00
|
|
|
static_assert(sizeof(LaneBitmask::Type) == sizeof(uint64_t),
|
2016-12-15 14:36:06 +00:00
|
|
|
"Use correct get-function for lane mask");
|
|
|
|
LaneBitmask::Type V;
|
2020-02-28 12:28:45 -08:00
|
|
|
if (getUint64(V))
|
2016-10-12 21:06:45 +00:00
|
|
|
return error("invalid lane mask value");
|
2016-12-15 14:36:06 +00:00
|
|
|
Mask = LaneBitmask(V);
|
2016-10-12 21:06:45 +00:00
|
|
|
lex();
|
|
|
|
}
|
|
|
|
MBB.addLiveIn(Reg, Mask);
|
2015-08-13 23:10:16 +00:00
|
|
|
} while (consumeIfPresent(MIToken::comma));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
|
|
|
|
assert(Token.is(MIToken::kw_successors));
|
2015-06-22 20:37:46 +00:00
|
|
|
lex();
|
2015-08-13 23:10:16 +00:00
|
|
|
if (expectAndConsume(MIToken::colon))
|
|
|
|
return true;
|
|
|
|
if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
|
|
|
|
return false;
|
|
|
|
do {
|
|
|
|
if (Token.isNot(MIToken::MachineBasicBlock))
|
|
|
|
return error("expected a machine basic block reference");
|
|
|
|
MachineBasicBlock *SuccMBB = nullptr;
|
|
|
|
if (parseMBBReference(SuccMBB))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
unsigned Weight = 0;
|
|
|
|
if (consumeIfPresent(MIToken::lparen)) {
|
2016-11-18 19:37:24 +00:00
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) &&
|
|
|
|
Token.isNot(MIToken::HexLiteral))
|
2015-08-13 23:10:16 +00:00
|
|
|
return error("expected an integer literal after '('");
|
|
|
|
if (getUnsigned(Weight))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
}
|
2015-12-01 05:29:22 +00:00
|
|
|
MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
|
2015-08-13 23:10:16 +00:00
|
|
|
} while (consumeIfPresent(MIToken::comma));
|
2015-12-01 05:29:22 +00:00
|
|
|
MBB.normalizeSuccProbs();
|
2015-08-13 23:10:16 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-05-05 21:09:30 +00:00
|
|
|
bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
|
|
|
|
MachineBasicBlock *&AddFalthroughFrom) {
|
2015-08-13 23:10:16 +00:00
|
|
|
// Skip the definition.
|
|
|
|
assert(Token.is(MIToken::MachineBasicBlockLabel));
|
|
|
|
lex();
|
|
|
|
if (consumeIfPresent(MIToken::lparen)) {
|
|
|
|
while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
|
|
|
|
lex();
|
|
|
|
consumeIfPresent(MIToken::rparen);
|
|
|
|
}
|
|
|
|
consumeIfPresent(MIToken::colon);
|
|
|
|
|
|
|
|
// Parse the liveins and successors.
|
|
|
|
// N.B: Multiple lists of successors and liveins are allowed and they're
|
|
|
|
// merged into one.
|
|
|
|
// Example:
|
2022-01-07 18:27:45 +01:00
|
|
|
// liveins: $edi
|
|
|
|
// liveins: $esi
|
2015-08-13 23:10:16 +00:00
|
|
|
//
|
|
|
|
// is equivalent to
|
2022-01-07 18:27:45 +01:00
|
|
|
// liveins: $edi, $esi
|
2017-06-27 10:35:37 +00:00
|
|
|
bool ExplicitSuccessors = false;
|
2015-08-13 23:10:16 +00:00
|
|
|
while (true) {
|
|
|
|
if (Token.is(MIToken::kw_successors)) {
|
|
|
|
if (parseBasicBlockSuccessors(MBB))
|
|
|
|
return true;
|
2017-06-27 10:35:37 +00:00
|
|
|
ExplicitSuccessors = true;
|
2015-08-13 23:10:16 +00:00
|
|
|
} else if (Token.is(MIToken::kw_liveins)) {
|
|
|
|
if (parseBasicBlockLiveins(MBB))
|
|
|
|
return true;
|
|
|
|
} else if (consumeIfPresent(MIToken::Newline)) {
|
|
|
|
continue;
|
|
|
|
} else
|
|
|
|
break;
|
|
|
|
if (!Token.isNewlineOrEOF())
|
|
|
|
return error("expected line break at the end of a list");
|
|
|
|
lex();
|
|
|
|
}
|
|
|
|
|
|
|
|
// Parse the instructions.
|
2015-08-14 18:57:24 +00:00
|
|
|
bool IsInBundle = false;
|
|
|
|
MachineInstr *PrevMI = nullptr;
|
2017-05-05 21:09:30 +00:00
|
|
|
while (!Token.is(MIToken::MachineBasicBlockLabel) &&
|
|
|
|
!Token.is(MIToken::Eof)) {
|
|
|
|
if (consumeIfPresent(MIToken::Newline))
|
2015-08-13 23:10:16 +00:00
|
|
|
continue;
|
2015-08-14 18:57:24 +00:00
|
|
|
if (consumeIfPresent(MIToken::rbrace)) {
|
|
|
|
// The first parsing pass should verify that all closing '}' have an
|
|
|
|
// opening '{'.
|
|
|
|
assert(IsInBundle);
|
|
|
|
IsInBundle = false;
|
|
|
|
continue;
|
|
|
|
}
|
2015-08-13 23:10:16 +00:00
|
|
|
MachineInstr *MI = nullptr;
|
|
|
|
if (parse(MI))
|
|
|
|
return true;
|
|
|
|
MBB.insert(MBB.end(), MI);
|
2015-08-14 18:57:24 +00:00
|
|
|
if (IsInBundle) {
|
|
|
|
PrevMI->setFlag(MachineInstr::BundledSucc);
|
|
|
|
MI->setFlag(MachineInstr::BundledPred);
|
|
|
|
}
|
|
|
|
PrevMI = MI;
|
|
|
|
if (Token.is(MIToken::lbrace)) {
|
|
|
|
if (IsInBundle)
|
|
|
|
return error("nested instruction bundles are not allowed");
|
|
|
|
lex();
|
|
|
|
// This instruction is the start of the bundle.
|
|
|
|
MI->setFlag(MachineInstr::BundledSucc);
|
|
|
|
IsInBundle = true;
|
|
|
|
if (!Token.is(MIToken::Newline))
|
|
|
|
// The next instruction can be on the same line.
|
|
|
|
continue;
|
|
|
|
}
|
2015-08-13 23:10:16 +00:00
|
|
|
assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
|
|
|
|
lex();
|
|
|
|
}
|
2017-05-05 21:09:30 +00:00
|
|
|
|
|
|
|
// Construct successor list by searching for basic block machine operands.
|
2017-06-27 10:35:37 +00:00
|
|
|
if (!ExplicitSuccessors) {
|
2017-05-05 21:09:30 +00:00
|
|
|
SmallVector<MachineBasicBlock*,4> Successors;
|
|
|
|
bool IsFallthrough;
|
|
|
|
guessSuccessors(MBB, Successors, IsFallthrough);
|
|
|
|
for (MachineBasicBlock *Succ : Successors)
|
|
|
|
MBB.addSuccessor(Succ);
|
|
|
|
|
|
|
|
if (IsFallthrough) {
|
|
|
|
AddFalthroughFrom = &MBB;
|
|
|
|
} else {
|
|
|
|
MBB.normalizeSuccProbs();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-08-13 23:10:16 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseBasicBlocks() {
|
|
|
|
lex();
|
|
|
|
// Skip until the first machine basic block.
|
|
|
|
while (Token.is(MIToken::Newline))
|
|
|
|
lex();
|
|
|
|
if (Token.isErrorOrEOF())
|
|
|
|
return Token.isError();
|
|
|
|
// The first parsing pass should have verified that this token is a MBB label
|
|
|
|
// in the 'parseBasicBlockDefinitions' method.
|
|
|
|
assert(Token.is(MIToken::MachineBasicBlockLabel));
|
2017-05-05 21:09:30 +00:00
|
|
|
MachineBasicBlock *AddFalthroughFrom = nullptr;
|
2015-08-13 23:10:16 +00:00
|
|
|
do {
|
|
|
|
MachineBasicBlock *MBB = nullptr;
|
|
|
|
if (parseMBBReference(MBB))
|
|
|
|
return true;
|
2017-05-05 21:09:30 +00:00
|
|
|
if (AddFalthroughFrom) {
|
|
|
|
if (!AddFalthroughFrom->isSuccessor(MBB))
|
|
|
|
AddFalthroughFrom->addSuccessor(MBB);
|
|
|
|
AddFalthroughFrom->normalizeSuccProbs();
|
|
|
|
AddFalthroughFrom = nullptr;
|
|
|
|
}
|
|
|
|
if (parseBasicBlock(*MBB, AddFalthroughFrom))
|
2015-08-13 23:10:16 +00:00
|
|
|
return true;
|
|
|
|
// The method 'parseBasicBlock' should parse the whole block until the next
|
|
|
|
// block or the end of file.
|
|
|
|
assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
|
|
|
|
} while (Token.isNot(MIToken::Eof));
|
|
|
|
return false;
|
|
|
|
}
|
2015-06-22 20:37:46 +00:00
|
|
|
|
2015-08-13 23:10:16 +00:00
|
|
|
bool MIParser::parse(MachineInstr *&MI) {
|
2015-06-23 16:35:26 +00:00
|
|
|
// Parse any register operands before '='
|
|
|
|
MachineOperand MO = MachineOperand::CreateImm(0);
|
2015-08-19 19:19:16 +00:00
|
|
|
SmallVector<ParsedMachineOperand, 8> Operands;
|
2015-07-29 18:51:21 +00:00
|
|
|
while (Token.isRegister() || Token.isRegisterFlag()) {
|
2015-07-07 02:08:46 +00:00
|
|
|
auto Loc = Token.location();
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> TiedDefIdx;
|
2015-08-19 19:05:34 +00:00
|
|
|
if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
|
2015-06-30 17:47:50 +00:00
|
|
|
return true;
|
2015-08-19 19:05:34 +00:00
|
|
|
Operands.push_back(
|
2015-08-19 19:19:16 +00:00
|
|
|
ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
|
2015-07-29 18:51:21 +00:00
|
|
|
if (Token.isNot(MIToken::comma))
|
|
|
|
break;
|
2015-06-23 16:35:26 +00:00
|
|
|
lex();
|
|
|
|
}
|
2015-07-29 18:51:21 +00:00
|
|
|
if (!Operands.empty() && expectAndConsume(MIToken::equal))
|
|
|
|
return true;
|
2015-06-23 16:35:26 +00:00
|
|
|
|
2015-07-17 00:24:15 +00:00
|
|
|
unsigned OpCode, Flags = 0;
|
|
|
|
if (Token.isError() || parseInstruction(OpCode, Flags))
|
2015-06-30 17:47:50 +00:00
|
|
|
return true;
|
2015-06-22 17:02:30 +00:00
|
|
|
|
2015-06-23 16:35:26 +00:00
|
|
|
// Parse the remaining machine operands.
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_pre_instr_symbol) &&
|
|
|
|
Token.isNot(MIToken::kw_post_instr_symbol) &&
|
2019-11-05 10:54:50 -08:00
|
|
|
Token.isNot(MIToken::kw_heap_alloc_marker) &&
|
2022-09-14 10:30:25 +02:00
|
|
|
Token.isNot(MIToken::kw_pcsections) &&
|
KCFI sanitizer
The KCFI sanitizer, enabled with `-fsanitize=kcfi`, implements a
forward-edge control flow integrity scheme for indirect calls. It
uses a !kcfi_type metadata node to attach a type identifier for each
function and injects verification code before indirect calls.
Unlike the current CFI schemes implemented in LLVM, KCFI does not
require LTO, does not alter function references to point to a jump
table, and never breaks function address equality. KCFI is intended
to be used in low-level code, such as operating system kernels,
where the existing schemes can cause undue complications because
of the aforementioned properties. However, unlike the existing
schemes, KCFI is limited to validating only function pointers and is
not compatible with executable-only memory.
KCFI does not provide runtime support, but always traps when a
type mismatch is encountered. Users of the scheme are expected
to handle the trap. With `-fsanitize=kcfi`, Clang emits a `kcfi`
operand bundle to indirect calls, and LLVM lowers this to a
known architecture-specific sequence of instructions for each
callsite to make runtime patching easier for users who require this
functionality.
A KCFI type identifier is a 32-bit constant produced by taking the
lower half of xxHash64 from a C++ mangled typename. If a program
contains indirect calls to assembly functions, they must be
manually annotated with the expected type identifiers to prevent
errors. To make this easier, Clang generates a weak SHN_ABS
`__kcfi_typeid_<function>` symbol for each address-taken function
declaration, which can be used to annotate functions in assembly
as long as at least one C translation unit linked into the program
takes the function address. For example on AArch64, we might have
the following code:
```
.c:
int f(void);
int (*p)(void) = f;
p();
.s:
.4byte __kcfi_typeid_f
.global f
f:
...
```
Note that X86 uses a different preamble format for compatibility
with Linux kernel tooling. See the comments in
`X86AsmPrinter::emitKCFITypeId` for details.
As users of KCFI may need to locate trap locations for binary
validation and error handling, LLVM can additionally emit the
locations of traps to a `.kcfi_traps` section.
Similarly to other sanitizers, KCFI checking can be disabled for a
function with a `no_sanitize("kcfi")` function attribute.
Relands 67504c95494ff05be2a613129110c9bcf17f6c13 with a fix for
32-bit builds.
Reviewed By: nickdesaulniers, kees, joaomoreira, MaskRay
Differential Revision: https://reviews.llvm.org/D119296
2022-02-15 14:32:08 -08:00
|
|
|
Token.isNot(MIToken::kw_cfi_type) &&
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
Token.isNot(MIToken::kw_debug_location) &&
|
2020-10-14 10:47:44 +01:00
|
|
|
Token.isNot(MIToken::kw_debug_instr_number) &&
|
2015-08-14 18:57:24 +00:00
|
|
|
Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
|
2015-07-07 02:08:46 +00:00
|
|
|
auto Loc = Token.location();
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> TiedDefIdx;
|
2020-01-08 20:02:37 -08:00
|
|
|
if (parseMachineOperandAndTargetFlags(OpCode, Operands.size(), MO, TiedDefIdx))
|
2015-06-30 17:47:50 +00:00
|
|
|
return true;
|
2015-08-19 19:05:34 +00:00
|
|
|
Operands.push_back(
|
2015-08-19 19:19:16 +00:00
|
|
|
ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
|
2015-08-14 18:57:24 +00:00
|
|
|
if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
|
|
|
|
Token.is(MIToken::lbrace))
|
2015-06-23 16:35:26 +00:00
|
|
|
break;
|
2015-06-30 17:47:50 +00:00
|
|
|
if (Token.isNot(MIToken::comma))
|
|
|
|
return error("expected ',' before the next machine operand");
|
2015-06-23 16:35:26 +00:00
|
|
|
lex();
|
|
|
|
}
|
|
|
|
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
MCSymbol *PreInstrSymbol = nullptr;
|
|
|
|
if (Token.is(MIToken::kw_pre_instr_symbol))
|
|
|
|
if (parsePreOrPostInstrSymbol(PreInstrSymbol))
|
|
|
|
return true;
|
|
|
|
MCSymbol *PostInstrSymbol = nullptr;
|
|
|
|
if (Token.is(MIToken::kw_post_instr_symbol))
|
|
|
|
if (parsePreOrPostInstrSymbol(PostInstrSymbol))
|
|
|
|
return true;
|
2019-11-05 10:54:50 -08:00
|
|
|
MDNode *HeapAllocMarker = nullptr;
|
|
|
|
if (Token.is(MIToken::kw_heap_alloc_marker))
|
|
|
|
if (parseHeapAllocMarker(HeapAllocMarker))
|
|
|
|
return true;
|
2022-09-14 10:30:25 +02:00
|
|
|
MDNode *PCSections = nullptr;
|
|
|
|
if (Token.is(MIToken::kw_pcsections))
|
|
|
|
if (parsePCSections(PCSections))
|
|
|
|
return true;
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
|
KCFI sanitizer
The KCFI sanitizer, enabled with `-fsanitize=kcfi`, implements a
forward-edge control flow integrity scheme for indirect calls. It
uses a !kcfi_type metadata node to attach a type identifier for each
function and injects verification code before indirect calls.
Unlike the current CFI schemes implemented in LLVM, KCFI does not
require LTO, does not alter function references to point to a jump
table, and never breaks function address equality. KCFI is intended
to be used in low-level code, such as operating system kernels,
where the existing schemes can cause undue complications because
of the aforementioned properties. However, unlike the existing
schemes, KCFI is limited to validating only function pointers and is
not compatible with executable-only memory.
KCFI does not provide runtime support, but always traps when a
type mismatch is encountered. Users of the scheme are expected
to handle the trap. With `-fsanitize=kcfi`, Clang emits a `kcfi`
operand bundle to indirect calls, and LLVM lowers this to a
known architecture-specific sequence of instructions for each
callsite to make runtime patching easier for users who require this
functionality.
A KCFI type identifier is a 32-bit constant produced by taking the
lower half of xxHash64 from a C++ mangled typename. If a program
contains indirect calls to assembly functions, they must be
manually annotated with the expected type identifiers to prevent
errors. To make this easier, Clang generates a weak SHN_ABS
`__kcfi_typeid_<function>` symbol for each address-taken function
declaration, which can be used to annotate functions in assembly
as long as at least one C translation unit linked into the program
takes the function address. For example on AArch64, we might have
the following code:
```
.c:
int f(void);
int (*p)(void) = f;
p();
.s:
.4byte __kcfi_typeid_f
.global f
f:
...
```
Note that X86 uses a different preamble format for compatibility
with Linux kernel tooling. See the comments in
`X86AsmPrinter::emitKCFITypeId` for details.
As users of KCFI may need to locate trap locations for binary
validation and error handling, LLVM can additionally emit the
locations of traps to a `.kcfi_traps` section.
Similarly to other sanitizers, KCFI checking can be disabled for a
function with a `no_sanitize("kcfi")` function attribute.
Relands 67504c95494ff05be2a613129110c9bcf17f6c13 with a fix for
32-bit builds.
Reviewed By: nickdesaulniers, kees, joaomoreira, MaskRay
Differential Revision: https://reviews.llvm.org/D119296
2022-02-15 14:32:08 -08:00
|
|
|
unsigned CFIType = 0;
|
|
|
|
if (Token.is(MIToken::kw_cfi_type)) {
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral))
|
|
|
|
return error("expected an integer literal after 'cfi-type'");
|
|
|
|
// getUnsigned is sufficient for 32-bit integers.
|
|
|
|
if (getUnsigned(CFIType))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
// Lex past trailing comma if present.
|
|
|
|
if (Token.is(MIToken::comma))
|
|
|
|
lex();
|
|
|
|
}
|
|
|
|
|
2020-10-14 10:47:44 +01:00
|
|
|
unsigned InstrNum = 0;
|
|
|
|
if (Token.is(MIToken::kw_debug_instr_number)) {
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral))
|
|
|
|
return error("expected an integer literal after 'debug-instr-number'");
|
|
|
|
if (getUnsigned(InstrNum))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
// Lex past trailing comma if present.
|
|
|
|
if (Token.is(MIToken::comma))
|
|
|
|
lex();
|
|
|
|
}
|
|
|
|
|
2015-07-22 21:15:11 +00:00
|
|
|
DebugLoc DebugLocation;
|
|
|
|
if (Token.is(MIToken::kw_debug_location)) {
|
|
|
|
lex();
|
|
|
|
MDNode *Node = nullptr;
|
[mir] Serialize DILocation inline when not possible to use a metadata reference
Summary:
Sometimes MIR-level passes create DILocations that were not present in the
LLVM-IR. For example, it may merge two DILocations together to produce a
DILocation that points to line 0.
Previously, the address of these DILocations were printed which prevented the
MIR from being read back into LLVM. With this patch, DILocations will use
metadata references where possible and fall back on serializing them inline like so:
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)
Reviewers: aprantl, vsk, arphaman
Reviewed By: aprantl
Subscribers: probinson, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D55243
llvm-svn: 349035
2018-12-13 14:25:27 +00:00
|
|
|
if (Token.is(MIToken::exclaim)) {
|
|
|
|
if (parseMDNode(Node))
|
|
|
|
return true;
|
|
|
|
} else if (Token.is(MIToken::md_dilocation)) {
|
|
|
|
if (parseDILocation(Node))
|
|
|
|
return true;
|
|
|
|
} else
|
|
|
|
return error("expected a metadata node after 'debug-location'");
|
2018-10-01 17:50:52 +00:00
|
|
|
if (!isa<DILocation>(Node))
|
|
|
|
return error("referenced metadata is not a DILocation");
|
2015-07-22 21:15:11 +00:00
|
|
|
DebugLocation = DebugLoc(Node);
|
|
|
|
}
|
|
|
|
|
2015-08-03 23:08:19 +00:00
|
|
|
// Parse the machine memory operands.
|
|
|
|
SmallVector<MachineMemOperand *, 2> MemOperands;
|
|
|
|
if (Token.is(MIToken::coloncolon)) {
|
|
|
|
lex();
|
2015-08-13 23:10:16 +00:00
|
|
|
while (!Token.isNewlineOrEOF()) {
|
2015-08-03 23:08:19 +00:00
|
|
|
MachineMemOperand *MemOp = nullptr;
|
|
|
|
if (parseMachineMemoryOperand(MemOp))
|
|
|
|
return true;
|
|
|
|
MemOperands.push_back(MemOp);
|
2015-08-13 23:10:16 +00:00
|
|
|
if (Token.isNewlineOrEOF())
|
2015-08-03 23:08:19 +00:00
|
|
|
break;
|
|
|
|
if (Token.isNot(MIToken::comma))
|
|
|
|
return error("expected ',' before the next machine memory operand");
|
|
|
|
lex();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-06-22 17:02:30 +00:00
|
|
|
const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
|
2015-07-07 02:08:46 +00:00
|
|
|
if (!MCID.isVariadic()) {
|
|
|
|
// FIXME: Move the implicit operand verification to the machine verifier.
|
|
|
|
if (verifyImplicitOperands(Operands, MCID))
|
|
|
|
return true;
|
|
|
|
}
|
2015-06-23 16:35:26 +00:00
|
|
|
|
2015-07-22 21:15:11 +00:00
|
|
|
MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
|
2015-07-17 00:24:15 +00:00
|
|
|
MI->setFlags(Flags);
|
2022-02-18 16:22:20 -05:00
|
|
|
|
|
|
|
unsigned NumExplicitOps = 0;
|
|
|
|
for (const auto &Operand : Operands) {
|
|
|
|
bool IsImplicitOp = Operand.Operand.isReg() && Operand.Operand.isImplicit();
|
|
|
|
if (!IsImplicitOp) {
|
|
|
|
if (!MCID.isVariadic() && NumExplicitOps >= MCID.getNumOperands() &&
|
|
|
|
!Operand.Operand.isValidExcessOperand())
|
2022-05-20 05:55:36 +01:00
|
|
|
return error(Operand.Begin, "too many operands for instruction");
|
2022-02-18 16:22:20 -05:00
|
|
|
|
|
|
|
++NumExplicitOps;
|
|
|
|
}
|
|
|
|
|
2015-07-07 02:08:46 +00:00
|
|
|
MI->addOperand(MF, Operand.Operand);
|
2022-02-18 16:22:20 -05:00
|
|
|
}
|
|
|
|
|
2015-08-19 19:05:34 +00:00
|
|
|
if (assignRegisterTies(*MI, Operands))
|
|
|
|
return true;
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
if (PreInstrSymbol)
|
|
|
|
MI->setPreInstrSymbol(MF, PreInstrSymbol);
|
|
|
|
if (PostInstrSymbol)
|
|
|
|
MI->setPostInstrSymbol(MF, PostInstrSymbol);
|
2019-11-05 10:54:50 -08:00
|
|
|
if (HeapAllocMarker)
|
|
|
|
MI->setHeapAllocMarker(MF, HeapAllocMarker);
|
2022-09-14 10:30:25 +02:00
|
|
|
if (PCSections)
|
|
|
|
MI->setPCSections(MF, PCSections);
|
KCFI sanitizer
The KCFI sanitizer, enabled with `-fsanitize=kcfi`, implements a
forward-edge control flow integrity scheme for indirect calls. It
uses a !kcfi_type metadata node to attach a type identifier for each
function and injects verification code before indirect calls.
Unlike the current CFI schemes implemented in LLVM, KCFI does not
require LTO, does not alter function references to point to a jump
table, and never breaks function address equality. KCFI is intended
to be used in low-level code, such as operating system kernels,
where the existing schemes can cause undue complications because
of the aforementioned properties. However, unlike the existing
schemes, KCFI is limited to validating only function pointers and is
not compatible with executable-only memory.
KCFI does not provide runtime support, but always traps when a
type mismatch is encountered. Users of the scheme are expected
to handle the trap. With `-fsanitize=kcfi`, Clang emits a `kcfi`
operand bundle to indirect calls, and LLVM lowers this to a
known architecture-specific sequence of instructions for each
callsite to make runtime patching easier for users who require this
functionality.
A KCFI type identifier is a 32-bit constant produced by taking the
lower half of xxHash64 from a C++ mangled typename. If a program
contains indirect calls to assembly functions, they must be
manually annotated with the expected type identifiers to prevent
errors. To make this easier, Clang generates a weak SHN_ABS
`__kcfi_typeid_<function>` symbol for each address-taken function
declaration, which can be used to annotate functions in assembly
as long as at least one C translation unit linked into the program
takes the function address. For example on AArch64, we might have
the following code:
```
.c:
int f(void);
int (*p)(void) = f;
p();
.s:
.4byte __kcfi_typeid_f
.global f
f:
...
```
Note that X86 uses a different preamble format for compatibility
with Linux kernel tooling. See the comments in
`X86AsmPrinter::emitKCFITypeId` for details.
As users of KCFI may need to locate trap locations for binary
validation and error handling, LLVM can additionally emit the
locations of traps to a `.kcfi_traps` section.
Similarly to other sanitizers, KCFI checking can be disabled for a
function with a `no_sanitize("kcfi")` function attribute.
Relands 67504c95494ff05be2a613129110c9bcf17f6c13 with a fix for
32-bit builds.
Reviewed By: nickdesaulniers, kees, joaomoreira, MaskRay
Differential Revision: https://reviews.llvm.org/D119296
2022-02-15 14:32:08 -08:00
|
|
|
if (CFIType)
|
|
|
|
MI->setCFIType(MF, CFIType);
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
if (!MemOperands.empty())
|
|
|
|
MI->setMemRefs(MF, MemOperands);
|
2020-10-14 10:47:44 +01:00
|
|
|
if (InstrNum)
|
|
|
|
MI->setDebugInstrNum(InstrNum);
|
2015-06-30 17:47:50 +00:00
|
|
|
return false;
|
2015-06-22 17:02:30 +00:00
|
|
|
}
|
|
|
|
|
2015-07-27 20:29:27 +00:00
|
|
|
bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
|
2015-06-30 18:16:42 +00:00
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::MachineBasicBlock))
|
|
|
|
return error("expected a machine basic block reference");
|
|
|
|
if (parseMBBReference(MBB))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::Eof))
|
|
|
|
return error(
|
|
|
|
"expected end of string after the machine basic block reference");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-04-08 17:25:21 -04:00
|
|
|
bool MIParser::parseStandaloneNamedRegister(Register &Reg) {
|
2015-07-14 21:24:41 +00:00
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::NamedRegister))
|
|
|
|
return error("expected a named register");
|
2016-10-11 03:13:01 +00:00
|
|
|
if (parseNamedRegister(Reg))
|
2015-08-18 22:57:36 +00:00
|
|
|
return true;
|
2015-07-14 21:24:41 +00:00
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::Eof))
|
|
|
|
return error("expected end of string after the register reference");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
|
2015-07-27 17:42:45 +00:00
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::VirtualRegister))
|
|
|
|
return error("expected a virtual register");
|
2016-10-11 03:13:01 +00:00
|
|
|
if (parseVirtualRegister(Info))
|
2015-08-18 22:57:36 +00:00
|
|
|
return true;
|
2015-07-27 17:42:45 +00:00
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::Eof))
|
|
|
|
return error("expected end of string after the register reference");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-04-08 17:25:21 -04:00
|
|
|
bool MIParser::parseStandaloneRegister(Register &Reg) {
|
2016-11-15 00:03:14 +00:00
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::NamedRegister) &&
|
|
|
|
Token.isNot(MIToken::VirtualRegister))
|
|
|
|
return error("expected either a named or virtual register");
|
|
|
|
|
|
|
|
VRegInfo *Info;
|
|
|
|
if (parseRegister(Reg, Info))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::Eof))
|
|
|
|
return error("expected end of string after the register reference");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-18 22:26:26 +00:00
|
|
|
bool MIParser::parseStandaloneStackObject(int &FI) {
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::StackObject))
|
|
|
|
return error("expected a stack object");
|
|
|
|
if (parseStackFrameIndex(FI))
|
|
|
|
return true;
|
|
|
|
if (Token.isNot(MIToken::Eof))
|
|
|
|
return error("expected end of string after the stack object reference");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-19 00:13:25 +00:00
|
|
|
bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
|
|
|
|
lex();
|
2017-08-23 20:31:27 +00:00
|
|
|
if (Token.is(MIToken::exclaim)) {
|
|
|
|
if (parseMDNode(Node))
|
|
|
|
return true;
|
|
|
|
} else if (Token.is(MIToken::md_diexpr)) {
|
|
|
|
if (parseDIExpression(Node))
|
|
|
|
return true;
|
[mir] Serialize DILocation inline when not possible to use a metadata reference
Summary:
Sometimes MIR-level passes create DILocations that were not present in the
LLVM-IR. For example, it may merge two DILocations together to produce a
DILocation that points to line 0.
Previously, the address of these DILocations were printed which prevented the
MIR from being read back into LLVM. With this patch, DILocations will use
metadata references where possible and fall back on serializing them inline like so:
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)
Reviewers: aprantl, vsk, arphaman
Reviewed By: aprantl
Subscribers: probinson, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D55243
llvm-svn: 349035
2018-12-13 14:25:27 +00:00
|
|
|
} else if (Token.is(MIToken::md_dilocation)) {
|
|
|
|
if (parseDILocation(Node))
|
|
|
|
return true;
|
2017-08-23 20:31:27 +00:00
|
|
|
} else
|
2015-08-19 00:13:25 +00:00
|
|
|
return error("expected a metadata node");
|
|
|
|
if (Token.isNot(MIToken::Eof))
|
|
|
|
return error("expected end of string after the metadata node");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-05-25 20:21:21 -04:00
|
|
|
bool MIParser::parseMachineMetadata() {
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::exclaim))
|
|
|
|
return error("expected a metadata node");
|
|
|
|
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
|
|
|
|
return error("expected metadata id after '!'");
|
|
|
|
unsigned ID = 0;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::equal))
|
|
|
|
return true;
|
|
|
|
bool IsDistinct = Token.is(MIToken::kw_distinct);
|
|
|
|
if (IsDistinct)
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::exclaim))
|
|
|
|
return error("expected a metadata node");
|
|
|
|
lex();
|
|
|
|
|
|
|
|
MDNode *MD;
|
|
|
|
if (parseMDTuple(MD, IsDistinct))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
auto FI = PFS.MachineForwardRefMDNodes.find(ID);
|
|
|
|
if (FI != PFS.MachineForwardRefMDNodes.end()) {
|
|
|
|
FI->second.first->replaceAllUsesWith(MD);
|
|
|
|
PFS.MachineForwardRefMDNodes.erase(FI);
|
|
|
|
|
|
|
|
assert(PFS.MachineMetadataNodes[ID] == MD && "Tracking VH didn't work");
|
|
|
|
} else {
|
|
|
|
if (PFS.MachineMetadataNodes.count(ID))
|
|
|
|
return error("Metadata id is already used");
|
|
|
|
PFS.MachineMetadataNodes[ID].reset(MD);
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseMDTuple(MDNode *&MD, bool IsDistinct) {
|
|
|
|
SmallVector<Metadata *, 16> Elts;
|
|
|
|
if (parseMDNodeVector(Elts))
|
|
|
|
return true;
|
|
|
|
MD = (IsDistinct ? MDTuple::getDistinct
|
|
|
|
: MDTuple::get)(MF.getFunction().getContext(), Elts);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts) {
|
|
|
|
if (Token.isNot(MIToken::lbrace))
|
|
|
|
return error("expected '{' here");
|
|
|
|
lex();
|
|
|
|
|
|
|
|
if (Token.is(MIToken::rbrace)) {
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
do {
|
|
|
|
Metadata *MD;
|
|
|
|
if (parseMetadata(MD))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
Elts.push_back(MD);
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::comma))
|
|
|
|
break;
|
|
|
|
lex();
|
|
|
|
} while (true);
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::rbrace))
|
|
|
|
return error("expected end of metadata node");
|
|
|
|
lex();
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
// ::= !42
|
|
|
|
// ::= !"string"
|
|
|
|
bool MIParser::parseMetadata(Metadata *&MD) {
|
|
|
|
if (Token.isNot(MIToken::exclaim))
|
|
|
|
return error("expected '!' here");
|
|
|
|
lex();
|
|
|
|
|
|
|
|
if (Token.is(MIToken::StringConstant)) {
|
|
|
|
std::string Str;
|
|
|
|
if (parseStringConstant(Str))
|
|
|
|
return true;
|
|
|
|
MD = MDString::get(MF.getFunction().getContext(), Str);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
|
|
|
|
return error("expected metadata id after '!'");
|
|
|
|
|
|
|
|
SMLoc Loc = mapSMLoc(Token.location());
|
|
|
|
|
|
|
|
unsigned ID = 0;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
|
|
|
|
auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
|
|
|
|
if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
|
|
|
|
MD = NodeInfo->second.get();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
// Check machine metadata.
|
|
|
|
NodeInfo = PFS.MachineMetadataNodes.find(ID);
|
|
|
|
if (NodeInfo != PFS.MachineMetadataNodes.end()) {
|
|
|
|
MD = NodeInfo->second.get();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
// Forward reference.
|
|
|
|
auto &FwdRef = PFS.MachineForwardRefMDNodes[ID];
|
|
|
|
FwdRef = std::make_pair(
|
2022-12-02 20:36:08 -08:00
|
|
|
MDTuple::getTemporary(MF.getFunction().getContext(), std::nullopt), Loc);
|
2021-05-25 20:21:21 -04:00
|
|
|
PFS.MachineMetadataNodes[ID].reset(FwdRef.first.get());
|
|
|
|
MD = FwdRef.first.get();
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-07 02:08:46 +00:00
|
|
|
static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
|
|
|
|
assert(MO.isImplicit());
|
|
|
|
return MO.isDef() ? "implicit-def" : "implicit";
|
|
|
|
}
|
|
|
|
|
|
|
|
static std::string getRegisterName(const TargetRegisterInfo *TRI,
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg) {
|
2023-01-13 14:38:08 -08:00
|
|
|
assert(Reg.isPhysical() && "expected phys reg");
|
2015-07-07 02:08:46 +00:00
|
|
|
return StringRef(TRI->getName(Reg)).lower();
|
|
|
|
}
|
|
|
|
|
2015-09-10 14:04:34 +00:00
|
|
|
/// Return true if the parsed machine operands contain a given machine operand.
|
|
|
|
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
|
|
|
|
ArrayRef<ParsedMachineOperand> Operands) {
|
|
|
|
for (const auto &I : Operands) {
|
|
|
|
if (ImplicitOperand.isIdenticalTo(I.Operand))
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-19 19:19:16 +00:00
|
|
|
bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
|
|
|
|
const MCInstrDesc &MCID) {
|
2015-07-07 02:08:46 +00:00
|
|
|
if (MCID.isCall())
|
|
|
|
// We can't verify call instructions as they can contain arbitrary implicit
|
|
|
|
// register and register mask operands.
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// Gather all the expected implicit operands.
|
|
|
|
SmallVector<MachineOperand, 4> ImplicitOperands;
|
2023-01-11 12:20:02 +00:00
|
|
|
for (MCPhysReg ImpDef : MCID.implicit_defs())
|
|
|
|
ImplicitOperands.push_back(MachineOperand::CreateReg(ImpDef, true, true));
|
|
|
|
for (MCPhysReg ImpUse : MCID.implicit_uses())
|
|
|
|
ImplicitOperands.push_back(MachineOperand::CreateReg(ImpUse, false, true));
|
2015-07-07 02:08:46 +00:00
|
|
|
|
|
|
|
const auto *TRI = MF.getSubtarget().getRegisterInfo();
|
|
|
|
assert(TRI && "Expected target register info");
|
2015-09-10 14:04:34 +00:00
|
|
|
for (const auto &I : ImplicitOperands) {
|
|
|
|
if (isImplicitOperandIn(I, Operands))
|
|
|
|
continue;
|
|
|
|
return error(Operands.empty() ? Token.location() : Operands.back().End,
|
2015-07-07 02:08:46 +00:00
|
|
|
Twine("missing implicit register operand '") +
|
2018-06-19 18:39:40 +00:00
|
|
|
printImplicitRegisterFlag(I) + " $" +
|
2015-09-10 14:04:34 +00:00
|
|
|
getRegisterName(TRI, I.getReg()) + "'");
|
2015-07-07 02:08:46 +00:00
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-17 00:24:15 +00:00
|
|
|
bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
|
2018-05-03 00:07:56 +00:00
|
|
|
// Allow frame and fast math flags for OPCODE
|
2023-08-18 13:48:01 +05:30
|
|
|
// clang-format off
|
2018-03-13 19:53:16 +00:00
|
|
|
while (Token.is(MIToken::kw_frame_setup) ||
|
2018-05-03 00:07:56 +00:00
|
|
|
Token.is(MIToken::kw_frame_destroy) ||
|
|
|
|
Token.is(MIToken::kw_nnan) ||
|
|
|
|
Token.is(MIToken::kw_ninf) ||
|
|
|
|
Token.is(MIToken::kw_nsz) ||
|
|
|
|
Token.is(MIToken::kw_arcp) ||
|
|
|
|
Token.is(MIToken::kw_contract) ||
|
|
|
|
Token.is(MIToken::kw_afn) ||
|
2018-09-11 21:35:32 +00:00
|
|
|
Token.is(MIToken::kw_reassoc) ||
|
|
|
|
Token.is(MIToken::kw_nuw) ||
|
|
|
|
Token.is(MIToken::kw_nsw) ||
|
2019-06-05 22:33:10 +00:00
|
|
|
Token.is(MIToken::kw_exact) ||
|
2023-06-01 20:56:12 +02:00
|
|
|
Token.is(MIToken::kw_nofpexcept) ||
|
2023-08-18 13:48:01 +05:30
|
|
|
Token.is(MIToken::kw_noconvergent) ||
|
2023-06-01 20:56:12 +02:00
|
|
|
Token.is(MIToken::kw_unpredictable)) {
|
2023-08-18 13:48:01 +05:30
|
|
|
// clang-format on
|
2018-05-03 00:07:56 +00:00
|
|
|
// Mine frame and fast math flags
|
|
|
|
if (Token.is(MIToken::kw_frame_setup))
|
|
|
|
Flags |= MachineInstr::FrameSetup;
|
|
|
|
if (Token.is(MIToken::kw_frame_destroy))
|
|
|
|
Flags |= MachineInstr::FrameDestroy;
|
|
|
|
if (Token.is(MIToken::kw_nnan))
|
|
|
|
Flags |= MachineInstr::FmNoNans;
|
|
|
|
if (Token.is(MIToken::kw_ninf))
|
|
|
|
Flags |= MachineInstr::FmNoInfs;
|
|
|
|
if (Token.is(MIToken::kw_nsz))
|
|
|
|
Flags |= MachineInstr::FmNsz;
|
|
|
|
if (Token.is(MIToken::kw_arcp))
|
|
|
|
Flags |= MachineInstr::FmArcp;
|
|
|
|
if (Token.is(MIToken::kw_contract))
|
|
|
|
Flags |= MachineInstr::FmContract;
|
|
|
|
if (Token.is(MIToken::kw_afn))
|
|
|
|
Flags |= MachineInstr::FmAfn;
|
|
|
|
if (Token.is(MIToken::kw_reassoc))
|
|
|
|
Flags |= MachineInstr::FmReassoc;
|
2018-09-11 21:35:32 +00:00
|
|
|
if (Token.is(MIToken::kw_nuw))
|
|
|
|
Flags |= MachineInstr::NoUWrap;
|
|
|
|
if (Token.is(MIToken::kw_nsw))
|
|
|
|
Flags |= MachineInstr::NoSWrap;
|
|
|
|
if (Token.is(MIToken::kw_exact))
|
|
|
|
Flags |= MachineInstr::IsExact;
|
2020-01-10 15:31:10 +01:00
|
|
|
if (Token.is(MIToken::kw_nofpexcept))
|
|
|
|
Flags |= MachineInstr::NoFPExcept;
|
2023-06-01 20:56:12 +02:00
|
|
|
if (Token.is(MIToken::kw_unpredictable))
|
|
|
|
Flags |= MachineInstr::Unpredictable;
|
2023-08-18 13:48:01 +05:30
|
|
|
if (Token.is(MIToken::kw_noconvergent))
|
|
|
|
Flags |= MachineInstr::NoConvergent;
|
2018-05-03 00:07:56 +00:00
|
|
|
|
2018-01-09 11:33:22 +00:00
|
|
|
lex();
|
2015-07-17 00:24:15 +00:00
|
|
|
}
|
2015-06-22 20:37:46 +00:00
|
|
|
if (Token.isNot(MIToken::Identifier))
|
|
|
|
return error("expected a machine instruction");
|
|
|
|
StringRef InstrName = Token.stringValue();
|
2019-03-12 20:42:12 +00:00
|
|
|
if (PFS.Target.parseInstrName(InstrName, OpCode))
|
2015-06-22 20:37:46 +00:00
|
|
|
return error(Twine("unknown machine instruction name '") + InstrName + "'");
|
2015-06-23 16:35:26 +00:00
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-04-08 17:25:21 -04:00
|
|
|
bool MIParser::parseNamedRegister(Register &Reg) {
|
2016-10-11 03:13:01 +00:00
|
|
|
assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
|
|
|
|
StringRef Name = Token.stringValue();
|
2019-03-12 20:42:12 +00:00
|
|
|
if (PFS.Target.getRegisterByName(Name, Reg))
|
2016-10-11 03:13:01 +00:00
|
|
|
return error(Twine("unknown register name '") + Name + "'");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-03-30 18:15:54 +00:00
|
|
|
bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {
|
|
|
|
assert(Token.is(MIToken::NamedVirtualRegister) && "Expected NamedVReg token");
|
|
|
|
StringRef Name = Token.stringValue();
|
|
|
|
// TODO: Check that the VReg name is not the same as a physical register name.
|
|
|
|
// If it is, then print a warning (when warnings are implemented).
|
|
|
|
Info = &PFS.getVRegInfoNamed(Name);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
|
2018-03-30 18:15:54 +00:00
|
|
|
if (Token.is(MIToken::NamedVirtualRegister))
|
|
|
|
return parseNamedVirtualRegister(Info);
|
2016-10-11 03:13:01 +00:00
|
|
|
assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
|
|
|
|
unsigned ID;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
|
|
|
Info = &PFS.getVRegInfo(ID);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-04-08 17:25:21 -04:00
|
|
|
bool MIParser::parseRegister(Register &Reg, VRegInfo *&Info) {
|
2015-06-23 16:35:26 +00:00
|
|
|
switch (Token.kind()) {
|
2015-06-24 17:34:58 +00:00
|
|
|
case MIToken::underscore:
|
|
|
|
Reg = 0;
|
2016-10-11 03:13:01 +00:00
|
|
|
return false;
|
|
|
|
case MIToken::NamedRegister:
|
|
|
|
return parseNamedRegister(Reg);
|
2018-03-30 18:15:54 +00:00
|
|
|
case MIToken::NamedVirtualRegister:
|
2016-10-11 03:13:01 +00:00
|
|
|
case MIToken::VirtualRegister:
|
|
|
|
if (parseVirtualRegister(Info))
|
2015-07-10 22:51:20 +00:00
|
|
|
return true;
|
2016-10-11 03:13:01 +00:00
|
|
|
Reg = Info->VReg;
|
|
|
|
return false;
|
2015-06-23 16:35:26 +00:00
|
|
|
// TODO: Parse other register kinds.
|
|
|
|
default:
|
|
|
|
llvm_unreachable("The current token should be a register");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-01-18 00:59:19 +00:00
|
|
|
bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
|
2017-01-20 00:29:59 +00:00
|
|
|
if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
|
|
|
|
return error("expected '_', register class, or register bank name");
|
2017-01-18 00:59:19 +00:00
|
|
|
StringRef::iterator Loc = Token.location();
|
|
|
|
StringRef Name = Token.stringValue();
|
|
|
|
|
|
|
|
// Was it a register class?
|
2019-03-12 20:42:12 +00:00
|
|
|
const TargetRegisterClass *RC = PFS.Target.getRegClass(Name);
|
|
|
|
if (RC) {
|
2017-01-18 00:59:19 +00:00
|
|
|
lex();
|
|
|
|
|
|
|
|
switch (RegInfo.Kind) {
|
|
|
|
case VRegInfo::UNKNOWN:
|
|
|
|
case VRegInfo::NORMAL:
|
|
|
|
RegInfo.Kind = VRegInfo::NORMAL;
|
2019-03-12 20:42:12 +00:00
|
|
|
if (RegInfo.Explicit && RegInfo.D.RC != RC) {
|
2017-01-18 00:59:19 +00:00
|
|
|
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
|
|
|
|
return error(Loc, Twine("conflicting register classes, previously: ") +
|
|
|
|
Twine(TRI.getRegClassName(RegInfo.D.RC)));
|
|
|
|
}
|
2019-03-12 20:42:12 +00:00
|
|
|
RegInfo.D.RC = RC;
|
2017-01-18 00:59:19 +00:00
|
|
|
RegInfo.Explicit = true;
|
|
|
|
return false;
|
|
|
|
|
|
|
|
case VRegInfo::GENERIC:
|
|
|
|
case VRegInfo::REGBANK:
|
|
|
|
return error(Loc, "register class specification on generic register");
|
|
|
|
}
|
|
|
|
llvm_unreachable("Unexpected register kind");
|
|
|
|
}
|
|
|
|
|
2017-01-20 00:29:59 +00:00
|
|
|
// Should be a register bank or a generic register.
|
|
|
|
const RegisterBank *RegBank = nullptr;
|
|
|
|
if (Name != "_") {
|
2019-03-12 20:42:12 +00:00
|
|
|
RegBank = PFS.Target.getRegBank(Name);
|
|
|
|
if (!RegBank)
|
2017-01-20 00:29:59 +00:00
|
|
|
return error(Loc, "expected '_', register class, or register bank name");
|
|
|
|
}
|
|
|
|
|
2017-01-18 00:59:19 +00:00
|
|
|
lex();
|
|
|
|
|
|
|
|
switch (RegInfo.Kind) {
|
|
|
|
case VRegInfo::UNKNOWN:
|
|
|
|
case VRegInfo::GENERIC:
|
|
|
|
case VRegInfo::REGBANK:
|
2017-01-20 00:29:59 +00:00
|
|
|
RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
|
|
|
|
if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
|
|
|
|
return error(Loc, "conflicting generic register banks");
|
|
|
|
RegInfo.D.RegBank = RegBank;
|
2017-01-18 00:59:19 +00:00
|
|
|
RegInfo.Explicit = true;
|
|
|
|
return false;
|
|
|
|
|
|
|
|
case VRegInfo::NORMAL:
|
2017-01-20 00:29:59 +00:00
|
|
|
return error(Loc, "register bank specification on normal register");
|
2017-01-18 00:59:19 +00:00
|
|
|
}
|
|
|
|
llvm_unreachable("Unexpected register kind");
|
|
|
|
}
|
|
|
|
|
2015-07-06 23:07:26 +00:00
|
|
|
bool MIParser::parseRegisterFlag(unsigned &Flags) {
|
2015-08-05 18:09:03 +00:00
|
|
|
const unsigned OldFlags = Flags;
|
2015-07-06 23:07:26 +00:00
|
|
|
switch (Token.kind()) {
|
|
|
|
case MIToken::kw_implicit:
|
|
|
|
Flags |= RegState::Implicit;
|
|
|
|
break;
|
|
|
|
case MIToken::kw_implicit_define:
|
|
|
|
Flags |= RegState::ImplicitDefine;
|
|
|
|
break;
|
2015-08-19 18:55:47 +00:00
|
|
|
case MIToken::kw_def:
|
|
|
|
Flags |= RegState::Define;
|
|
|
|
break;
|
2015-07-07 20:34:53 +00:00
|
|
|
case MIToken::kw_dead:
|
|
|
|
Flags |= RegState::Dead;
|
|
|
|
break;
|
2015-07-08 21:23:34 +00:00
|
|
|
case MIToken::kw_killed:
|
|
|
|
Flags |= RegState::Kill;
|
|
|
|
break;
|
2015-07-08 23:58:31 +00:00
|
|
|
case MIToken::kw_undef:
|
|
|
|
Flags |= RegState::Undef;
|
|
|
|
break;
|
2015-08-14 19:07:07 +00:00
|
|
|
case MIToken::kw_internal:
|
|
|
|
Flags |= RegState::InternalRead;
|
|
|
|
break;
|
2015-08-05 17:49:03 +00:00
|
|
|
case MIToken::kw_early_clobber:
|
|
|
|
Flags |= RegState::EarlyClobber;
|
|
|
|
break;
|
2015-08-05 17:41:17 +00:00
|
|
|
case MIToken::kw_debug_use:
|
|
|
|
Flags |= RegState::Debug;
|
|
|
|
break;
|
2017-12-12 17:53:59 +00:00
|
|
|
case MIToken::kw_renamable:
|
|
|
|
Flags |= RegState::Renamable;
|
|
|
|
break;
|
2015-07-06 23:07:26 +00:00
|
|
|
default:
|
|
|
|
llvm_unreachable("The current token should be a register flag");
|
|
|
|
}
|
2015-08-05 18:09:03 +00:00
|
|
|
if (OldFlags == Flags)
|
|
|
|
// We know that the same flag is specified more than once when the flags
|
|
|
|
// weren't modified.
|
|
|
|
return error("duplicate '" + Token.stringValue() + "' register flag");
|
2015-07-06 23:07:26 +00:00
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-13 23:24:34 +00:00
|
|
|
bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
|
2016-07-26 21:49:34 +00:00
|
|
|
assert(Token.is(MIToken::dot));
|
2015-07-13 23:24:34 +00:00
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::Identifier))
|
2016-07-26 21:49:34 +00:00
|
|
|
return error("expected a subregister index after '.'");
|
2015-07-13 23:24:34 +00:00
|
|
|
auto Name = Token.stringValue();
|
2019-03-12 20:42:12 +00:00
|
|
|
SubReg = PFS.Target.getSubRegIndex(Name);
|
2015-07-13 23:24:34 +00:00
|
|
|
if (!SubReg)
|
|
|
|
return error(Twine("use of unknown subregister index '") + Name + "'");
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-19 19:05:34 +00:00
|
|
|
bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
|
|
|
|
if (!consumeIfPresent(MIToken::kw_tied_def))
|
2016-09-12 11:20:10 +00:00
|
|
|
return true;
|
2015-08-19 19:05:34 +00:00
|
|
|
if (Token.isNot(MIToken::IntegerLiteral))
|
|
|
|
return error("expected an integer literal after 'tied-def'");
|
|
|
|
if (getUnsigned(TiedDefIdx))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-19 19:19:16 +00:00
|
|
|
bool MIParser::assignRegisterTies(MachineInstr &MI,
|
|
|
|
ArrayRef<ParsedMachineOperand> Operands) {
|
2015-08-19 19:05:34 +00:00
|
|
|
SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
|
|
|
|
for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
|
|
|
|
if (!Operands[I].TiedDefIdx)
|
|
|
|
continue;
|
|
|
|
// The parser ensures that this operand is a register use, so we just have
|
|
|
|
// to check the tied-def operand.
|
2022-06-20 22:45:45 -07:00
|
|
|
unsigned DefIdx = *Operands[I].TiedDefIdx;
|
2015-08-19 19:05:34 +00:00
|
|
|
if (DefIdx >= E)
|
|
|
|
return error(Operands[I].Begin,
|
|
|
|
Twine("use of invalid tied-def operand index '" +
|
|
|
|
Twine(DefIdx) + "'; instruction has only ") +
|
|
|
|
Twine(E) + " operands");
|
|
|
|
const auto &DefOperand = Operands[DefIdx].Operand;
|
|
|
|
if (!DefOperand.isReg() || !DefOperand.isDef())
|
|
|
|
// FIXME: add note with the def operand.
|
|
|
|
return error(Operands[I].Begin,
|
|
|
|
Twine("use of invalid tied-def operand index '") +
|
|
|
|
Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
|
|
|
|
" isn't a defined register");
|
|
|
|
// Check that the tied-def operand wasn't tied elsewhere.
|
|
|
|
for (const auto &TiedPair : TiedRegisterPairs) {
|
|
|
|
if (TiedPair.first == DefIdx)
|
|
|
|
return error(Operands[I].Begin,
|
|
|
|
Twine("the tied-def operand #") + Twine(DefIdx) +
|
|
|
|
" is already tied with another register operand");
|
|
|
|
}
|
|
|
|
TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
|
|
|
|
}
|
|
|
|
// FIXME: Verify that for non INLINEASM instructions, the def and use tied
|
|
|
|
// indices must be less than tied max.
|
|
|
|
for (const auto &TiedPair : TiedRegisterPairs)
|
|
|
|
MI.tieOperands(TiedPair.first, TiedPair.second);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseRegisterOperand(MachineOperand &Dest,
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> &TiedDefIdx,
|
2015-08-19 19:05:34 +00:00
|
|
|
bool IsDef) {
|
2015-07-06 23:07:26 +00:00
|
|
|
unsigned Flags = IsDef ? RegState::Define : 0;
|
|
|
|
while (Token.isRegisterFlag()) {
|
|
|
|
if (parseRegisterFlag(Flags))
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
if (!Token.isRegister())
|
|
|
|
return error("expected a register after register flags");
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg;
|
2016-10-11 03:13:01 +00:00
|
|
|
VRegInfo *RegInfo;
|
|
|
|
if (parseRegister(Reg, RegInfo))
|
2015-06-23 16:35:26 +00:00
|
|
|
return true;
|
|
|
|
lex();
|
2015-07-13 23:24:34 +00:00
|
|
|
unsigned SubReg = 0;
|
2016-07-26 21:49:34 +00:00
|
|
|
if (Token.is(MIToken::dot)) {
|
2015-07-13 23:24:34 +00:00
|
|
|
if (parseSubRegisterIndex(SubReg))
|
|
|
|
return true;
|
2023-01-13 14:38:08 -08:00
|
|
|
if (!Reg.isVirtual())
|
2016-07-16 01:36:18 +00:00
|
|
|
return error("subregister index expects a virtual register");
|
2015-07-13 23:24:34 +00:00
|
|
|
}
|
2017-01-18 00:59:19 +00:00
|
|
|
if (Token.is(MIToken::colon)) {
|
2023-01-13 14:38:08 -08:00
|
|
|
if (!Reg.isVirtual())
|
2017-01-18 00:59:19 +00:00
|
|
|
return error("register class specification expects a virtual register");
|
|
|
|
lex();
|
|
|
|
if (parseRegisterClassOrBank(*RegInfo))
|
|
|
|
return true;
|
|
|
|
}
|
2016-09-12 11:20:10 +00:00
|
|
|
MachineRegisterInfo &MRI = MF.getRegInfo();
|
2016-03-07 21:48:43 +00:00
|
|
|
if ((Flags & RegState::Define) == 0) {
|
|
|
|
if (consumeIfPresent(MIToken::lparen)) {
|
|
|
|
unsigned Idx;
|
2016-09-12 11:20:10 +00:00
|
|
|
if (!parseRegisterTiedDefIndex(Idx))
|
|
|
|
TiedDefIdx = Idx;
|
|
|
|
else {
|
|
|
|
// Try a redundant low-level type.
|
|
|
|
LLT Ty;
|
|
|
|
if (parseLowLevelType(Token.location(), Ty))
|
|
|
|
return error("expected tied-def or low-level type after '('");
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
|
|
|
|
return error("inconsistent type for generic virtual register");
|
|
|
|
|
2019-10-22 14:25:37 +00:00
|
|
|
MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
|
2016-09-12 11:20:10 +00:00
|
|
|
MRI.setType(Reg, Ty);
|
|
|
|
}
|
2016-03-07 21:48:43 +00:00
|
|
|
}
|
|
|
|
} else if (consumeIfPresent(MIToken::lparen)) {
|
2016-12-22 21:56:35 +00:00
|
|
|
// Virtual registers may have a tpe with GlobalISel.
|
2023-01-13 14:38:08 -08:00
|
|
|
if (!Reg.isVirtual())
|
2016-12-22 21:56:35 +00:00
|
|
|
return error("unexpected type on physical register");
|
2016-07-19 19:48:36 +00:00
|
|
|
|
2016-09-09 11:46:34 +00:00
|
|
|
LLT Ty;
|
|
|
|
if (parseLowLevelType(Token.location(), Ty))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
2015-08-19 19:05:34 +00:00
|
|
|
return true;
|
2016-03-07 21:48:43 +00:00
|
|
|
|
2016-09-12 11:20:10 +00:00
|
|
|
if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
|
|
|
|
return error("inconsistent type for generic virtual register");
|
|
|
|
|
2019-10-22 14:25:37 +00:00
|
|
|
MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
|
2016-09-09 11:46:34 +00:00
|
|
|
MRI.setType(Reg, Ty);
|
2023-01-13 14:38:08 -08:00
|
|
|
} else if (Reg.isVirtual()) {
|
2016-12-22 22:50:34 +00:00
|
|
|
// Generic virtual registers must have a type.
|
|
|
|
// If we end up here this means the type hasn't been specified and
|
2016-06-08 23:27:46 +00:00
|
|
|
// this is bad!
|
2016-10-11 03:13:01 +00:00
|
|
|
if (RegInfo->Kind == VRegInfo::GENERIC ||
|
|
|
|
RegInfo->Kind == VRegInfo::REGBANK)
|
2016-12-22 22:50:34 +00:00
|
|
|
return error("generic virtual registers must have a type");
|
2015-08-19 19:05:34 +00:00
|
|
|
}
|
2022-03-28 09:36:47 -04:00
|
|
|
|
|
|
|
if (Flags & RegState::Define) {
|
|
|
|
if (Flags & RegState::Kill)
|
|
|
|
return error("cannot have a killed def operand");
|
|
|
|
} else {
|
|
|
|
if (Flags & RegState::Dead)
|
|
|
|
return error("cannot have a dead use operand");
|
|
|
|
}
|
|
|
|
|
2015-07-08 21:23:34 +00:00
|
|
|
Dest = MachineOperand::CreateReg(
|
|
|
|
Reg, Flags & RegState::Define, Flags & RegState::Implicit,
|
2015-07-13 23:24:34 +00:00
|
|
|
Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
|
2015-08-14 19:07:07 +00:00
|
|
|
Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
|
2017-12-12 17:53:59 +00:00
|
|
|
Flags & RegState::InternalRead, Flags & RegState::Renamable);
|
|
|
|
|
2015-06-23 16:35:26 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-06-23 23:42:28 +00:00
|
|
|
bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::IntegerLiteral));
|
|
|
|
const APSInt &Int = Token.integerValue();
|
2022-12-26 18:05:11 -08:00
|
|
|
if (auto SImm = Int.trySExtValue(); Int.isSigned() && SImm.has_value())
|
|
|
|
Dest = MachineOperand::CreateImm(*SImm);
|
|
|
|
else if (auto UImm = Int.tryZExtValue(); !Int.isSigned() && UImm.has_value())
|
|
|
|
Dest = MachineOperand::CreateImm(*UImm);
|
|
|
|
else
|
2015-08-05 19:03:42 +00:00
|
|
|
return error("integer literal is too large to be an immediate operand");
|
2015-06-23 23:42:28 +00:00
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
bool MIParser::parseTargetImmMnemonic(const unsigned OpCode,
|
|
|
|
const unsigned OpIdx,
|
|
|
|
MachineOperand &Dest,
|
|
|
|
const MIRFormatter &MF) {
|
|
|
|
assert(Token.is(MIToken::dot));
|
|
|
|
auto Loc = Token.location(); // record start position
|
|
|
|
size_t Len = 1; // for "."
|
|
|
|
lex();
|
|
|
|
|
|
|
|
// Handle the case that mnemonic starts with number.
|
|
|
|
if (Token.is(MIToken::IntegerLiteral)) {
|
|
|
|
Len += Token.range().size();
|
|
|
|
lex();
|
|
|
|
}
|
|
|
|
|
|
|
|
StringRef Src;
|
|
|
|
if (Token.is(MIToken::comma))
|
|
|
|
Src = StringRef(Loc, Len);
|
|
|
|
else {
|
|
|
|
assert(Token.is(MIToken::Identifier));
|
|
|
|
Src = StringRef(Loc, Len + Token.stringValue().size());
|
|
|
|
}
|
|
|
|
int64_t Val;
|
|
|
|
if (MF.parseImmMnemonic(OpCode, OpIdx, Src, Val,
|
|
|
|
[this](StringRef::iterator Loc, const Twine &Msg)
|
|
|
|
-> bool { return error(Loc, Msg); }))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
Dest = MachineOperand::CreateImm(Val);
|
|
|
|
if (!Token.is(MIToken::comma))
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
|
|
|
|
PerFunctionMIParsingState &PFS, const Constant *&C,
|
|
|
|
ErrorCallbackType ErrCB) {
|
2015-08-21 21:48:22 +00:00
|
|
|
auto Source = StringValue.str(); // The source has to be null terminated.
|
2015-07-31 20:49:21 +00:00
|
|
|
SMDiagnostic Err;
|
2020-01-08 20:02:37 -08:00
|
|
|
C = parseConstantValue(Source, Err, *PFS.MF.getFunction().getParent(),
|
2016-07-13 23:27:50 +00:00
|
|
|
&PFS.IRSlots);
|
2015-07-31 20:49:21 +00:00
|
|
|
if (!C)
|
2020-01-08 20:02:37 -08:00
|
|
|
return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());
|
2015-08-05 18:44:00 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
bool MIParser::parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
|
|
|
|
const Constant *&C) {
|
|
|
|
return ::parseIRConstant(
|
|
|
|
Loc, StringValue, PFS, C,
|
|
|
|
[this](StringRef::iterator Loc, const Twine &Msg) -> bool {
|
|
|
|
return error(Loc, Msg);
|
|
|
|
});
|
|
|
|
}
|
|
|
|
|
2015-08-21 21:48:22 +00:00
|
|
|
bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
|
|
|
|
if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2023-01-05 18:34:55 +00:00
|
|
|
// See LLT implementation for bit size limits.
|
2019-02-04 22:59:56 +00:00
|
|
|
static bool verifyScalarSize(uint64_t Size) {
|
|
|
|
return Size != 0 && isUInt<16>(Size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool verifyVectorElementCount(uint64_t NumElts) {
|
|
|
|
return NumElts != 0 && isUInt<16>(NumElts);
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool verifyAddrSpace(uint64_t AddrSpace) {
|
|
|
|
return isUInt<24>(AddrSpace);
|
|
|
|
}
|
|
|
|
|
2016-07-28 17:15:12 +00:00
|
|
|
bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
|
2018-05-05 20:53:23 +00:00
|
|
|
if (Token.range().front() == 's' || Token.range().front() == 'p') {
|
|
|
|
StringRef SizeStr = Token.range().drop_front();
|
|
|
|
if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
|
2018-05-08 02:02:50 +00:00
|
|
|
return error("expected integers after 's'/'p' type character");
|
2018-05-05 20:53:23 +00:00
|
|
|
}
|
2018-05-05 07:05:51 +00:00
|
|
|
|
|
|
|
if (Token.range().front() == 's') {
|
2019-02-04 22:59:56 +00:00
|
|
|
auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
|
|
|
|
if (!verifyScalarSize(ScalarSize))
|
|
|
|
return error("invalid size for scalar type");
|
|
|
|
|
|
|
|
Ty = LLT::scalar(ScalarSize);
|
2016-07-20 19:09:30 +00:00
|
|
|
lex();
|
|
|
|
return false;
|
2018-05-05 07:05:51 +00:00
|
|
|
} else if (Token.range().front() == 'p') {
|
2017-12-15 22:22:58 +00:00
|
|
|
const DataLayout &DL = MF.getDataLayout();
|
2019-02-04 22:59:56 +00:00
|
|
|
uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
|
|
|
|
if (!verifyAddrSpace(AS))
|
|
|
|
return error("invalid address space number");
|
|
|
|
|
2016-09-15 09:20:34 +00:00
|
|
|
Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
|
2016-07-22 16:59:52 +00:00
|
|
|
lex();
|
|
|
|
return false;
|
2016-07-20 19:09:30 +00:00
|
|
|
}
|
2016-03-08 00:20:48 +00:00
|
|
|
|
2016-07-20 19:09:30 +00:00
|
|
|
// Now we're looking for a vector.
|
|
|
|
if (Token.isNot(MIToken::less))
|
2016-07-22 16:59:52 +00:00
|
|
|
return error(Loc,
|
2018-05-08 02:02:50 +00:00
|
|
|
"expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
|
2016-07-20 19:09:30 +00:00
|
|
|
lex();
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral))
|
2018-05-08 02:02:50 +00:00
|
|
|
return error(Loc, "expected <M x sN> or <M x pA> for vector type");
|
2016-07-20 19:09:30 +00:00
|
|
|
uint64_t NumElements = Token.integerValue().getZExtValue();
|
2019-02-04 22:59:56 +00:00
|
|
|
if (!verifyVectorElementCount(NumElements))
|
|
|
|
return error("invalid number of vector elements");
|
|
|
|
|
2016-07-20 19:09:30 +00:00
|
|
|
lex();
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
|
2018-05-08 02:02:50 +00:00
|
|
|
return error(Loc, "expected <M x sN> or <M x pA> for vector type");
|
2016-07-20 19:09:30 +00:00
|
|
|
lex();
|
|
|
|
|
2018-05-08 02:02:50 +00:00
|
|
|
if (Token.range().front() != 's' && Token.range().front() != 'p')
|
|
|
|
return error(Loc, "expected <M x sN> or <M x pA> for vector type");
|
2018-05-05 20:53:23 +00:00
|
|
|
StringRef SizeStr = Token.range().drop_front();
|
|
|
|
if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
|
2018-05-08 02:02:50 +00:00
|
|
|
return error("expected integers after 's'/'p' type character");
|
|
|
|
|
2019-02-04 22:59:56 +00:00
|
|
|
if (Token.range().front() == 's') {
|
|
|
|
auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
|
|
|
|
if (!verifyScalarSize(ScalarSize))
|
|
|
|
return error("invalid size for scalar type");
|
|
|
|
Ty = LLT::scalar(ScalarSize);
|
|
|
|
} else if (Token.range().front() == 'p') {
|
2018-05-08 02:02:50 +00:00
|
|
|
const DataLayout &DL = MF.getDataLayout();
|
2019-02-04 22:59:56 +00:00
|
|
|
uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
|
|
|
|
if (!verifyAddrSpace(AS))
|
|
|
|
return error("invalid address space number");
|
|
|
|
|
2018-05-08 02:02:50 +00:00
|
|
|
Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
|
|
|
|
} else
|
|
|
|
return error(Loc, "expected <M x sN> or <M x pA> for vector type");
|
2016-07-20 19:09:30 +00:00
|
|
|
lex();
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::greater))
|
2018-05-08 02:02:50 +00:00
|
|
|
return error(Loc, "expected <M x sN> or <M x pA> for vector type");
|
2016-07-20 19:09:30 +00:00
|
|
|
lex();
|
|
|
|
|
2021-06-24 09:58:21 +01:00
|
|
|
Ty = LLT::fixed_vector(NumElements, Ty);
|
2016-03-08 00:20:48 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-05 18:52:21 +00:00
|
|
|
bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
|
2018-05-05 07:05:51 +00:00
|
|
|
assert(Token.is(MIToken::Identifier));
|
2018-05-05 20:53:23 +00:00
|
|
|
StringRef TypeStr = Token.range();
|
|
|
|
if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&
|
|
|
|
TypeStr.front() != 'p')
|
|
|
|
return error(
|
2018-05-08 02:02:50 +00:00
|
|
|
"a typed immediate operand should start with one of 'i', 's', or 'p'");
|
2018-05-05 20:53:23 +00:00
|
|
|
StringRef SizeStr = Token.range().drop_front();
|
|
|
|
if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
|
2018-05-08 02:02:50 +00:00
|
|
|
return error("expected integers after 'i'/'s'/'p' type character");
|
2018-05-05 07:05:51 +00:00
|
|
|
|
2015-08-05 18:52:21 +00:00
|
|
|
auto Loc = Token.location();
|
|
|
|
lex();
|
2018-06-05 00:17:13 +00:00
|
|
|
if (Token.isNot(MIToken::IntegerLiteral)) {
|
|
|
|
if (Token.isNot(MIToken::Identifier) ||
|
|
|
|
!(Token.range() == "true" || Token.range() == "false"))
|
|
|
|
return error("expected an integer literal");
|
|
|
|
}
|
2015-08-05 18:52:21 +00:00
|
|
|
const Constant *C = nullptr;
|
|
|
|
if (parseIRConstant(Loc, C))
|
|
|
|
return true;
|
|
|
|
Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-05 18:44:00 +00:00
|
|
|
bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
|
|
|
|
auto Loc = Token.location();
|
|
|
|
lex();
|
2016-10-12 21:06:45 +00:00
|
|
|
if (Token.isNot(MIToken::FloatingPointLiteral) &&
|
|
|
|
Token.isNot(MIToken::HexLiteral))
|
2015-08-05 18:44:00 +00:00
|
|
|
return error("expected a floating point literal");
|
|
|
|
const Constant *C = nullptr;
|
|
|
|
if (parseIRConstant(Loc, C))
|
|
|
|
return true;
|
2015-07-31 20:49:21 +00:00
|
|
|
Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
static bool getHexUint(const MIToken &Token, APInt &Result) {
|
|
|
|
assert(Token.is(MIToken::HexLiteral));
|
|
|
|
StringRef S = Token.range();
|
|
|
|
assert(S[0] == '0' && tolower(S[1]) == 'x');
|
|
|
|
// This could be a floating point literal with a special prefix.
|
|
|
|
if (!isxdigit(S[2]))
|
|
|
|
return true;
|
|
|
|
StringRef V = S.substr(2);
|
|
|
|
APInt A(V.size()*4, V, 16);
|
|
|
|
|
|
|
|
// If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
|
|
|
|
// sure it isn't the case before constructing result.
|
|
|
|
unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
|
|
|
|
Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-14 14:06:12 +01:00
|
|
|
static bool getUnsigned(const MIToken &Token, unsigned &Result,
|
|
|
|
ErrorCallbackType ErrCB) {
|
2016-10-12 21:06:45 +00:00
|
|
|
if (Token.hasIntegerValue()) {
|
|
|
|
const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
|
|
|
|
uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
|
|
|
|
if (Val64 == Limit)
|
2020-01-08 20:02:37 -08:00
|
|
|
return ErrCB(Token.location(), "expected 32-bit integer (too large)");
|
2016-10-12 21:06:45 +00:00
|
|
|
Result = Val64;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
if (Token.is(MIToken::HexLiteral)) {
|
2016-12-16 13:58:01 +00:00
|
|
|
APInt A;
|
2020-01-08 20:02:37 -08:00
|
|
|
if (getHexUint(Token, A))
|
2016-10-12 21:06:45 +00:00
|
|
|
return true;
|
2016-12-16 13:58:01 +00:00
|
|
|
if (A.getBitWidth() > 32)
|
2020-01-08 20:02:37 -08:00
|
|
|
return ErrCB(Token.location(), "expected 32-bit integer (too large)");
|
2016-10-12 21:06:45 +00:00
|
|
|
Result = A.getZExtValue();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
2015-06-26 16:46:11 +00:00
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
bool MIParser::getUnsigned(unsigned &Result) {
|
|
|
|
return ::getUnsigned(
|
|
|
|
Token, Result, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
|
|
|
|
return error(Loc, Msg);
|
|
|
|
});
|
|
|
|
}
|
|
|
|
|
2015-06-30 18:16:42 +00:00
|
|
|
bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
|
2015-08-13 23:10:16 +00:00
|
|
|
assert(Token.is(MIToken::MachineBasicBlock) ||
|
|
|
|
Token.is(MIToken::MachineBasicBlockLabel));
|
2015-06-26 16:46:11 +00:00
|
|
|
unsigned Number;
|
|
|
|
if (getUnsigned(Number))
|
|
|
|
return true;
|
2015-07-07 17:46:43 +00:00
|
|
|
auto MBBInfo = PFS.MBBSlots.find(Number);
|
|
|
|
if (MBBInfo == PFS.MBBSlots.end())
|
2015-06-26 16:46:11 +00:00
|
|
|
return error(Twine("use of undefined machine basic block #") +
|
|
|
|
Twine(Number));
|
2015-06-30 18:16:42 +00:00
|
|
|
MBB = MBBInfo->second;
|
2017-12-04 17:18:51 +00:00
|
|
|
// TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
|
|
|
|
// we drop the <irname> from the bb.<id>.<irname> format.
|
2015-06-26 16:46:11 +00:00
|
|
|
if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
|
|
|
|
return error(Twine("the name of machine basic block #") + Twine(Number) +
|
|
|
|
" isn't '" + Token.stringValue() + "'");
|
2015-06-30 18:16:42 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseMBBOperand(MachineOperand &Dest) {
|
|
|
|
MachineBasicBlock *MBB;
|
|
|
|
if (parseMBBReference(MBB))
|
|
|
|
return true;
|
2015-06-26 16:46:11 +00:00
|
|
|
Dest = MachineOperand::CreateMBB(MBB);
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-18 22:18:52 +00:00
|
|
|
bool MIParser::parseStackFrameIndex(int &FI) {
|
2015-07-16 23:37:45 +00:00
|
|
|
assert(Token.is(MIToken::StackObject));
|
|
|
|
unsigned ID;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
|
|
|
auto ObjectInfo = PFS.StackObjectSlots.find(ID);
|
|
|
|
if (ObjectInfo == PFS.StackObjectSlots.end())
|
|
|
|
return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
|
|
|
|
"'");
|
|
|
|
StringRef Name;
|
|
|
|
if (const auto *Alloca =
|
2016-07-28 18:40:00 +00:00
|
|
|
MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
|
2015-07-16 23:37:45 +00:00
|
|
|
Name = Alloca->getName();
|
|
|
|
if (!Token.stringValue().empty() && Token.stringValue() != Name)
|
|
|
|
return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
|
|
|
|
"' isn't '" + Token.stringValue() + "'");
|
|
|
|
lex();
|
2015-08-18 22:18:52 +00:00
|
|
|
FI = ObjectInfo->second;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
|
|
|
|
int FI;
|
|
|
|
if (parseStackFrameIndex(FI))
|
|
|
|
return true;
|
|
|
|
Dest = MachineOperand::CreateFI(FI);
|
2015-07-16 23:37:45 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-12 21:17:02 +00:00
|
|
|
bool MIParser::parseFixedStackFrameIndex(int &FI) {
|
2015-07-16 23:37:45 +00:00
|
|
|
assert(Token.is(MIToken::FixedStackObject));
|
|
|
|
unsigned ID;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
|
|
|
auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
|
|
|
|
if (ObjectInfo == PFS.FixedStackObjectSlots.end())
|
|
|
|
return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
|
|
|
|
Twine(ID) + "'");
|
|
|
|
lex();
|
2015-08-12 21:17:02 +00:00
|
|
|
FI = ObjectInfo->second;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
|
|
|
|
int FI;
|
|
|
|
if (parseFixedStackFrameIndex(FI))
|
|
|
|
return true;
|
|
|
|
Dest = MachineOperand::CreateFI(FI);
|
2015-07-16 23:37:45 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
static bool parseGlobalValue(const MIToken &Token,
|
|
|
|
PerFunctionMIParsingState &PFS, GlobalValue *&GV,
|
|
|
|
ErrorCallbackType ErrCB) {
|
2015-06-26 22:56:48 +00:00
|
|
|
switch (Token.kind()) {
|
2015-08-05 17:35:55 +00:00
|
|
|
case MIToken::NamedGlobalValue: {
|
2020-01-08 20:02:37 -08:00
|
|
|
const Module *M = PFS.MF.getFunction().getParent();
|
2015-08-05 17:35:55 +00:00
|
|
|
GV = M->getNamedValue(Token.stringValue());
|
2015-07-28 17:09:52 +00:00
|
|
|
if (!GV)
|
2020-01-08 20:02:37 -08:00
|
|
|
return ErrCB(Token.location(), Twine("use of undefined global value '") +
|
|
|
|
Token.range() + "'");
|
2015-07-28 17:09:52 +00:00
|
|
|
break;
|
2015-06-26 22:56:48 +00:00
|
|
|
}
|
|
|
|
case MIToken::GlobalValue: {
|
|
|
|
unsigned GVIdx;
|
2020-01-08 20:02:37 -08:00
|
|
|
if (getUnsigned(Token, GVIdx, ErrCB))
|
2015-06-26 22:56:48 +00:00
|
|
|
return true;
|
2016-07-13 23:27:50 +00:00
|
|
|
if (GVIdx >= PFS.IRSlots.GlobalValues.size())
|
2020-01-08 20:02:37 -08:00
|
|
|
return ErrCB(Token.location(), Twine("use of undefined global value '@") +
|
|
|
|
Twine(GVIdx) + "'");
|
2016-07-13 23:27:50 +00:00
|
|
|
GV = PFS.IRSlots.GlobalValues[GVIdx];
|
2015-06-26 22:56:48 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
llvm_unreachable("The current token should be a global value");
|
|
|
|
}
|
2015-07-28 17:09:52 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
bool MIParser::parseGlobalValue(GlobalValue *&GV) {
|
|
|
|
return ::parseGlobalValue(
|
|
|
|
Token, PFS, GV,
|
|
|
|
[this](StringRef::iterator Loc, const Twine &Msg) -> bool {
|
|
|
|
return error(Loc, Msg);
|
|
|
|
});
|
|
|
|
}
|
|
|
|
|
2015-07-28 17:09:52 +00:00
|
|
|
bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
|
|
|
|
GlobalValue *GV = nullptr;
|
|
|
|
if (parseGlobalValue(GV))
|
|
|
|
return true;
|
2015-06-26 22:56:48 +00:00
|
|
|
lex();
|
2015-08-05 22:26:15 +00:00
|
|
|
Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
|
|
|
|
if (parseOperandsOffset(Dest))
|
|
|
|
return true;
|
2015-06-26 22:56:48 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-20 20:51:18 +00:00
|
|
|
bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::ConstantPoolItem));
|
|
|
|
unsigned ID;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
|
|
|
auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
|
|
|
|
if (ConstantInfo == PFS.ConstantPoolSlots.end())
|
|
|
|
return error("use of undefined constant '%const." + Twine(ID) + "'");
|
|
|
|
lex();
|
|
|
|
Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
|
2015-08-05 22:26:15 +00:00
|
|
|
if (parseOperandsOffset(Dest))
|
|
|
|
return true;
|
2015-07-20 20:51:18 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-15 23:38:35 +00:00
|
|
|
bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::JumpTableIndex));
|
|
|
|
unsigned ID;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
|
|
|
auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
|
|
|
|
if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
|
|
|
|
return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
|
|
|
|
lex();
|
|
|
|
Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-21 16:59:53 +00:00
|
|
|
bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
|
2015-08-05 17:35:55 +00:00
|
|
|
assert(Token.is(MIToken::ExternalSymbol));
|
|
|
|
const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
|
2015-07-21 16:59:53 +00:00
|
|
|
lex();
|
|
|
|
Dest = MachineOperand::CreateES(Symbol);
|
2015-08-05 22:26:15 +00:00
|
|
|
if (parseOperandsOffset(Dest))
|
|
|
|
return true;
|
2015-07-21 16:59:53 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::MCSymbol));
|
|
|
|
MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());
|
|
|
|
lex();
|
|
|
|
Dest = MachineOperand::CreateMCSymbol(Symbol);
|
|
|
|
if (parseOperandsOffset(Dest))
|
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-03-28 18:18:46 +00:00
|
|
|
bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::SubRegisterIndex));
|
|
|
|
StringRef Name = Token.stringValue();
|
2019-03-12 20:42:12 +00:00
|
|
|
unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
|
2016-03-28 18:18:46 +00:00
|
|
|
if (SubRegIndex == 0)
|
|
|
|
return error(Twine("unknown subregister index '") + Name + "'");
|
|
|
|
lex();
|
|
|
|
Dest = MachineOperand::CreateImm(SubRegIndex);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-22 21:07:04 +00:00
|
|
|
bool MIParser::parseMDNode(MDNode *&Node) {
|
2015-07-22 17:58:46 +00:00
|
|
|
assert(Token.is(MIToken::exclaim));
|
2017-08-23 20:31:27 +00:00
|
|
|
|
2015-07-22 17:58:46 +00:00
|
|
|
auto Loc = Token.location();
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
|
|
|
|
return error("expected metadata id after '!'");
|
|
|
|
unsigned ID;
|
|
|
|
if (getUnsigned(ID))
|
|
|
|
return true;
|
2016-07-13 23:27:50 +00:00
|
|
|
auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
|
2021-05-25 20:21:21 -04:00
|
|
|
if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {
|
|
|
|
NodeInfo = PFS.MachineMetadataNodes.find(ID);
|
|
|
|
if (NodeInfo == PFS.MachineMetadataNodes.end())
|
|
|
|
return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
|
|
|
|
}
|
2015-07-22 17:58:46 +00:00
|
|
|
lex();
|
2015-07-22 21:07:04 +00:00
|
|
|
Node = NodeInfo->second.get();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-08-23 20:31:27 +00:00
|
|
|
bool MIParser::parseDIExpression(MDNode *&Expr) {
|
|
|
|
assert(Token.is(MIToken::md_diexpr));
|
|
|
|
lex();
|
|
|
|
|
|
|
|
// FIXME: Share this parsing with the IL parser.
|
|
|
|
SmallVector<uint64_t, 8> Elements;
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::rparen)) {
|
|
|
|
do {
|
|
|
|
if (Token.is(MIToken::Identifier)) {
|
|
|
|
if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
|
|
|
|
lex();
|
|
|
|
Elements.push_back(Op);
|
|
|
|
continue;
|
|
|
|
}
|
2019-04-30 07:58:57 +00:00
|
|
|
if (unsigned Enc = dwarf::getAttributeEncoding(Token.stringValue())) {
|
|
|
|
lex();
|
|
|
|
Elements.push_back(Enc);
|
|
|
|
continue;
|
|
|
|
}
|
2017-08-23 20:31:27 +00:00
|
|
|
return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) ||
|
|
|
|
Token.integerValue().isSigned())
|
|
|
|
return error("expected unsigned integer");
|
|
|
|
|
|
|
|
auto &U = Token.integerValue();
|
|
|
|
if (U.ugt(UINT64_MAX))
|
|
|
|
return error("element too large, limit is " + Twine(UINT64_MAX));
|
|
|
|
Elements.push_back(U.getZExtValue());
|
|
|
|
lex();
|
|
|
|
|
|
|
|
} while (consumeIfPresent(MIToken::comma));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
|
2017-12-15 22:22:58 +00:00
|
|
|
Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
|
2017-08-23 20:31:27 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
[mir] Serialize DILocation inline when not possible to use a metadata reference
Summary:
Sometimes MIR-level passes create DILocations that were not present in the
LLVM-IR. For example, it may merge two DILocations together to produce a
DILocation that points to line 0.
Previously, the address of these DILocations were printed which prevented the
MIR from being read back into LLVM. With this patch, DILocations will use
metadata references where possible and fall back on serializing them inline like so:
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)
Reviewers: aprantl, vsk, arphaman
Reviewed By: aprantl
Subscribers: probinson, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D55243
llvm-svn: 349035
2018-12-13 14:25:27 +00:00
|
|
|
bool MIParser::parseDILocation(MDNode *&Loc) {
|
|
|
|
assert(Token.is(MIToken::md_dilocation));
|
|
|
|
lex();
|
|
|
|
|
|
|
|
bool HaveLine = false;
|
|
|
|
unsigned Line = 0;
|
|
|
|
unsigned Column = 0;
|
|
|
|
MDNode *Scope = nullptr;
|
|
|
|
MDNode *InlinedAt = nullptr;
|
2018-12-13 15:05:27 +00:00
|
|
|
bool ImplicitCode = false;
|
[mir] Serialize DILocation inline when not possible to use a metadata reference
Summary:
Sometimes MIR-level passes create DILocations that were not present in the
LLVM-IR. For example, it may merge two DILocations together to produce a
DILocation that points to line 0.
Previously, the address of these DILocations were printed which prevented the
MIR from being read back into LLVM. With this patch, DILocations will use
metadata references where possible and fall back on serializing them inline like so:
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)
Reviewers: aprantl, vsk, arphaman
Reviewed By: aprantl
Subscribers: probinson, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D55243
llvm-svn: 349035
2018-12-13 14:25:27 +00:00
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::rparen)) {
|
|
|
|
do {
|
|
|
|
if (Token.is(MIToken::Identifier)) {
|
|
|
|
if (Token.stringValue() == "line") {
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::colon))
|
|
|
|
return true;
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) ||
|
|
|
|
Token.integerValue().isSigned())
|
|
|
|
return error("expected unsigned integer");
|
|
|
|
Line = Token.integerValue().getZExtValue();
|
|
|
|
HaveLine = true;
|
|
|
|
lex();
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if (Token.stringValue() == "column") {
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::colon))
|
|
|
|
return true;
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) ||
|
|
|
|
Token.integerValue().isSigned())
|
|
|
|
return error("expected unsigned integer");
|
|
|
|
Column = Token.integerValue().getZExtValue();
|
|
|
|
lex();
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if (Token.stringValue() == "scope") {
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::colon))
|
|
|
|
return true;
|
|
|
|
if (parseMDNode(Scope))
|
|
|
|
return error("expected metadata node");
|
|
|
|
if (!isa<DIScope>(Scope))
|
|
|
|
return error("expected DIScope node");
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if (Token.stringValue() == "inlinedAt") {
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::colon))
|
|
|
|
return true;
|
|
|
|
if (Token.is(MIToken::exclaim)) {
|
|
|
|
if (parseMDNode(InlinedAt))
|
|
|
|
return true;
|
|
|
|
} else if (Token.is(MIToken::md_dilocation)) {
|
|
|
|
if (parseDILocation(InlinedAt))
|
|
|
|
return true;
|
|
|
|
} else
|
|
|
|
return error("expected metadata node");
|
|
|
|
if (!isa<DILocation>(InlinedAt))
|
|
|
|
return error("expected DILocation node");
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if (Token.stringValue() == "isImplicitCode") {
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::colon))
|
|
|
|
return true;
|
|
|
|
if (!Token.is(MIToken::Identifier))
|
|
|
|
return error("expected true/false");
|
|
|
|
// As far as I can see, we don't have any existing need for parsing
|
|
|
|
// true/false in MIR yet. Do it ad-hoc until there's something else
|
|
|
|
// that needs it.
|
|
|
|
if (Token.stringValue() == "true")
|
|
|
|
ImplicitCode = true;
|
|
|
|
else if (Token.stringValue() == "false")
|
|
|
|
ImplicitCode = false;
|
|
|
|
else
|
|
|
|
return error("expected true/false");
|
|
|
|
lex();
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return error(Twine("invalid DILocation argument '") +
|
|
|
|
Token.stringValue() + "'");
|
|
|
|
} while (consumeIfPresent(MIToken::comma));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
if (!HaveLine)
|
|
|
|
return error("DILocation requires line number");
|
|
|
|
if (!Scope)
|
|
|
|
return error("DILocation requires a scope");
|
|
|
|
|
|
|
|
Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
|
|
|
|
InlinedAt, ImplicitCode);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-22 21:07:04 +00:00
|
|
|
bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
|
|
|
|
MDNode *Node = nullptr;
|
2017-08-23 20:31:27 +00:00
|
|
|
if (Token.is(MIToken::exclaim)) {
|
|
|
|
if (parseMDNode(Node))
|
|
|
|
return true;
|
|
|
|
} else if (Token.is(MIToken::md_diexpr)) {
|
|
|
|
if (parseDIExpression(Node))
|
|
|
|
return true;
|
|
|
|
}
|
2015-07-22 21:07:04 +00:00
|
|
|
Dest = MachineOperand::CreateMetadata(Node);
|
2015-07-22 17:58:46 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-21 22:28:27 +00:00
|
|
|
bool MIParser::parseCFIOffset(int &Offset) {
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral))
|
|
|
|
return error("expected a cfi offset");
|
2023-02-19 23:56:52 -08:00
|
|
|
if (Token.integerValue().getSignificantBits() > 32)
|
2015-07-21 22:28:27 +00:00
|
|
|
return error("expected a 32 bit integer (the cfi offset is too large)");
|
|
|
|
Offset = (int)Token.integerValue().getExtValue();
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-04-08 17:25:21 -04:00
|
|
|
bool MIParser::parseCFIRegister(Register &Reg) {
|
2015-07-23 23:09:07 +00:00
|
|
|
if (Token.isNot(MIToken::NamedRegister))
|
|
|
|
return error("expected a cfi register");
|
2020-04-08 17:25:21 -04:00
|
|
|
Register LLVMReg;
|
2016-10-11 03:13:01 +00:00
|
|
|
if (parseNamedRegister(LLVMReg))
|
2015-07-23 23:09:07 +00:00
|
|
|
return true;
|
|
|
|
const auto *TRI = MF.getSubtarget().getRegisterInfo();
|
|
|
|
assert(TRI && "Expected target register info");
|
|
|
|
int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
|
|
|
|
if (DwarfReg < 0)
|
|
|
|
return error("invalid DWARF register");
|
|
|
|
Reg = (unsigned)DwarfReg;
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-06-14 06:57:58 +05:30
|
|
|
bool MIParser::parseCFIAddressSpace(unsigned &AddressSpace) {
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral))
|
|
|
|
return error("expected a cfi address space literal");
|
|
|
|
if (Token.integerValue().isSigned())
|
|
|
|
return error("expected an unsigned integer (cfi address space)");
|
|
|
|
AddressSpace = Token.integerValue().getZExtValue();
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-12-15 15:17:18 +00:00
|
|
|
bool MIParser::parseCFIEscapeValues(std::string &Values) {
|
|
|
|
do {
|
|
|
|
if (Token.isNot(MIToken::HexLiteral))
|
|
|
|
return error("expected a hexadecimal literal");
|
|
|
|
unsigned Value;
|
|
|
|
if (getUnsigned(Value))
|
|
|
|
return true;
|
|
|
|
if (Value > UINT8_MAX)
|
|
|
|
return error("expected a 8-bit integer (too large)");
|
|
|
|
Values.push_back(static_cast<uint8_t>(Value));
|
|
|
|
lex();
|
|
|
|
} while (consumeIfPresent(MIToken::comma));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-21 22:28:27 +00:00
|
|
|
bool MIParser::parseCFIOperand(MachineOperand &Dest) {
|
2015-07-23 23:09:07 +00:00
|
|
|
auto Kind = Token.kind();
|
2015-07-21 22:28:27 +00:00
|
|
|
lex();
|
|
|
|
int Offset;
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg;
|
2021-06-14 06:57:58 +05:30
|
|
|
unsigned AddressSpace;
|
2015-07-23 23:09:07 +00:00
|
|
|
unsigned CFIIndex;
|
|
|
|
switch (Kind) {
|
2015-08-14 21:55:58 +00:00
|
|
|
case MIToken::kw_cfi_same_value:
|
|
|
|
if (parseCFIRegister(Reg))
|
|
|
|
return true;
|
2016-11-30 23:48:42 +00:00
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
|
2015-08-14 21:55:58 +00:00
|
|
|
break;
|
2015-07-23 23:09:07 +00:00
|
|
|
case MIToken::kw_cfi_offset:
|
|
|
|
if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
|
|
|
|
parseCFIOffset(Offset))
|
|
|
|
return true;
|
|
|
|
CFIIndex =
|
2016-11-30 23:48:42 +00:00
|
|
|
MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
|
2015-07-23 23:09:07 +00:00
|
|
|
break;
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_rel_offset:
|
|
|
|
if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
|
|
|
|
parseCFIOffset(Offset))
|
|
|
|
return true;
|
|
|
|
CFIIndex = MF.addFrameInst(
|
|
|
|
MCCFIInstruction::createRelOffset(nullptr, Reg, Offset));
|
|
|
|
break;
|
2015-07-27 20:39:03 +00:00
|
|
|
case MIToken::kw_cfi_def_cfa_register:
|
|
|
|
if (parseCFIRegister(Reg))
|
|
|
|
return true;
|
|
|
|
CFIIndex =
|
2016-11-30 23:48:42 +00:00
|
|
|
MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
|
2015-07-27 20:39:03 +00:00
|
|
|
break;
|
2015-07-23 23:09:07 +00:00
|
|
|
case MIToken::kw_cfi_def_cfa_offset:
|
|
|
|
if (parseCFIOffset(Offset))
|
|
|
|
return true;
|
2020-05-22 15:51:24 -07:00
|
|
|
CFIIndex =
|
|
|
|
MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, Offset));
|
2015-07-23 23:09:07 +00:00
|
|
|
break;
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_adjust_cfa_offset:
|
|
|
|
if (parseCFIOffset(Offset))
|
|
|
|
return true;
|
|
|
|
CFIIndex = MF.addFrameInst(
|
|
|
|
MCCFIInstruction::createAdjustCfaOffset(nullptr, Offset));
|
|
|
|
break;
|
2015-07-29 18:57:23 +00:00
|
|
|
case MIToken::kw_cfi_def_cfa:
|
|
|
|
if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
|
|
|
|
parseCFIOffset(Offset))
|
|
|
|
return true;
|
|
|
|
CFIIndex =
|
2020-05-22 15:18:05 -07:00
|
|
|
MF.addFrameInst(MCCFIInstruction::cfiDefCfa(nullptr, Reg, Offset));
|
2015-07-29 18:57:23 +00:00
|
|
|
break;
|
2021-06-14 06:57:58 +05:30
|
|
|
case MIToken::kw_cfi_llvm_def_aspace_cfa:
|
|
|
|
if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
|
|
|
|
parseCFIOffset(Offset) || expectAndConsume(MIToken::comma) ||
|
|
|
|
parseCFIAddressSpace(AddressSpace))
|
|
|
|
return true;
|
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createLLVMDefAspaceCfa(
|
2023-06-26 17:58:29 -07:00
|
|
|
nullptr, Reg, Offset, AddressSpace, SMLoc()));
|
2021-06-14 06:57:58 +05:30
|
|
|
break;
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_remember_state:
|
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createRememberState(nullptr));
|
|
|
|
break;
|
2017-11-02 12:00:58 +00:00
|
|
|
case MIToken::kw_cfi_restore:
|
|
|
|
if (parseCFIRegister(Reg))
|
|
|
|
return true;
|
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
|
|
|
|
break;
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_restore_state:
|
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestoreState(nullptr));
|
|
|
|
break;
|
|
|
|
case MIToken::kw_cfi_undefined:
|
|
|
|
if (parseCFIRegister(Reg))
|
|
|
|
return true;
|
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
|
|
|
|
break;
|
|
|
|
case MIToken::kw_cfi_register: {
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg2;
|
2017-12-15 15:17:18 +00:00
|
|
|
if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
|
|
|
|
parseCFIRegister(Reg2))
|
|
|
|
return true;
|
2017-11-02 12:00:58 +00:00
|
|
|
|
2017-12-15 15:17:18 +00:00
|
|
|
CFIIndex =
|
|
|
|
MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MIToken::kw_cfi_window_save:
|
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
|
|
|
|
break;
|
2018-12-18 10:37:42 +00:00
|
|
|
case MIToken::kw_cfi_aarch64_negate_ra_sign_state:
|
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
|
|
|
|
break;
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_escape: {
|
|
|
|
std::string Values;
|
|
|
|
if (parseCFIEscapeValues(Values))
|
|
|
|
return true;
|
|
|
|
CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
|
|
|
|
break;
|
|
|
|
}
|
2015-07-23 23:09:07 +00:00
|
|
|
default:
|
|
|
|
// TODO: Parse the other CFI operands.
|
|
|
|
llvm_unreachable("The current token should be a cfi operand");
|
|
|
|
}
|
|
|
|
Dest = MachineOperand::CreateCFIIndex(CFIIndex);
|
2015-07-21 22:28:27 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-28 17:28:03 +00:00
|
|
|
bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
|
|
|
|
switch (Token.kind()) {
|
2015-08-05 17:35:55 +00:00
|
|
|
case MIToken::NamedIRBlock: {
|
|
|
|
BB = dyn_cast_or_null<BasicBlock>(
|
2016-09-17 06:00:02 +00:00
|
|
|
F.getValueSymbolTable()->lookup(Token.stringValue()));
|
2015-07-28 17:28:03 +00:00
|
|
|
if (!BB)
|
2015-08-06 23:17:42 +00:00
|
|
|
return error(Twine("use of undefined IR block '") + Token.range() + "'");
|
2015-07-28 17:28:03 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MIToken::IRBlock: {
|
|
|
|
unsigned SlotNumber = 0;
|
|
|
|
if (getUnsigned(SlotNumber))
|
|
|
|
return true;
|
2015-08-06 23:57:04 +00:00
|
|
|
BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
|
2015-07-28 17:28:03 +00:00
|
|
|
if (!BB)
|
|
|
|
return error(Twine("use of undefined IR block '%ir-block.") +
|
|
|
|
Twine(SlotNumber) + "'");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
llvm_unreachable("The current token should be an IR block reference");
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::kw_blockaddress));
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
|
|
|
if (Token.isNot(MIToken::GlobalValue) &&
|
2015-08-05 17:35:55 +00:00
|
|
|
Token.isNot(MIToken::NamedGlobalValue))
|
2015-07-28 17:28:03 +00:00
|
|
|
return error("expected a global value");
|
|
|
|
GlobalValue *GV = nullptr;
|
|
|
|
if (parseGlobalValue(GV))
|
|
|
|
return true;
|
|
|
|
auto *F = dyn_cast<Function>(GV);
|
|
|
|
if (!F)
|
|
|
|
return error("expected an IR function reference");
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::comma))
|
|
|
|
return true;
|
|
|
|
BasicBlock *BB = nullptr;
|
2015-08-05 17:35:55 +00:00
|
|
|
if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
|
2015-07-28 17:28:03 +00:00
|
|
|
return error("expected an IR block reference");
|
|
|
|
if (parseIRBlock(BB, *F))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
|
2015-08-05 22:26:15 +00:00
|
|
|
if (parseOperandsOffset(Dest))
|
|
|
|
return true;
|
2015-07-28 17:28:03 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-29 20:32:59 +00:00
|
|
|
bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::kw_intrinsic));
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return error("expected syntax intrinsic(@llvm.whatever)");
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::NamedGlobalValue))
|
|
|
|
return error("expected syntax intrinsic(@llvm.whatever)");
|
|
|
|
|
2020-01-28 20:23:46 +01:00
|
|
|
std::string Name = std::string(Token.stringValue());
|
2016-07-29 20:32:59 +00:00
|
|
|
lex();
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return error("expected ')' to terminate intrinsic name");
|
|
|
|
|
|
|
|
// Find out what intrinsic we're dealing with, first try the global namespace
|
|
|
|
// and then the target's private intrinsics if that fails.
|
|
|
|
const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo();
|
|
|
|
Intrinsic::ID ID = Function::lookupIntrinsicID(Name);
|
|
|
|
if (ID == Intrinsic::not_intrinsic && TII)
|
|
|
|
ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
|
|
|
|
|
|
|
|
if (ID == Intrinsic::not_intrinsic)
|
|
|
|
return error("unknown intrinsic name");
|
|
|
|
Dest = MachineOperand::CreateIntrinsicID(ID);
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-08-17 20:25:25 +00:00
|
|
|
bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
|
|
|
|
bool IsFloat = Token.is(MIToken::kw_floatpred);
|
|
|
|
lex();
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return error("expected syntax intpred(whatever) or floatpred(whatever");
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::Identifier))
|
|
|
|
return error("whatever");
|
|
|
|
|
|
|
|
CmpInst::Predicate Pred;
|
|
|
|
if (IsFloat) {
|
|
|
|
Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
|
|
|
|
.Case("false", CmpInst::FCMP_FALSE)
|
|
|
|
.Case("oeq", CmpInst::FCMP_OEQ)
|
|
|
|
.Case("ogt", CmpInst::FCMP_OGT)
|
|
|
|
.Case("oge", CmpInst::FCMP_OGE)
|
|
|
|
.Case("olt", CmpInst::FCMP_OLT)
|
|
|
|
.Case("ole", CmpInst::FCMP_OLE)
|
|
|
|
.Case("one", CmpInst::FCMP_ONE)
|
|
|
|
.Case("ord", CmpInst::FCMP_ORD)
|
|
|
|
.Case("uno", CmpInst::FCMP_UNO)
|
|
|
|
.Case("ueq", CmpInst::FCMP_UEQ)
|
|
|
|
.Case("ugt", CmpInst::FCMP_UGT)
|
|
|
|
.Case("uge", CmpInst::FCMP_UGE)
|
|
|
|
.Case("ult", CmpInst::FCMP_ULT)
|
|
|
|
.Case("ule", CmpInst::FCMP_ULE)
|
|
|
|
.Case("une", CmpInst::FCMP_UNE)
|
|
|
|
.Case("true", CmpInst::FCMP_TRUE)
|
|
|
|
.Default(CmpInst::BAD_FCMP_PREDICATE);
|
|
|
|
if (!CmpInst::isFPPredicate(Pred))
|
|
|
|
return error("invalid floating-point predicate");
|
|
|
|
} else {
|
|
|
|
Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
|
|
|
|
.Case("eq", CmpInst::ICMP_EQ)
|
|
|
|
.Case("ne", CmpInst::ICMP_NE)
|
|
|
|
.Case("sgt", CmpInst::ICMP_SGT)
|
|
|
|
.Case("sge", CmpInst::ICMP_SGE)
|
|
|
|
.Case("slt", CmpInst::ICMP_SLT)
|
|
|
|
.Case("sle", CmpInst::ICMP_SLE)
|
|
|
|
.Case("ugt", CmpInst::ICMP_UGT)
|
|
|
|
.Case("uge", CmpInst::ICMP_UGE)
|
|
|
|
.Case("ult", CmpInst::ICMP_ULT)
|
|
|
|
.Case("ule", CmpInst::ICMP_ULE)
|
|
|
|
.Default(CmpInst::BAD_ICMP_PREDICATE);
|
|
|
|
if (!CmpInst::isIntPredicate(Pred))
|
|
|
|
return error("invalid integer predicate");
|
|
|
|
}
|
|
|
|
|
|
|
|
lex();
|
|
|
|
Dest = MachineOperand::CreatePredicate(Pred);
|
2016-08-23 21:01:26 +00:00
|
|
|
if (expectAndConsume(MIToken::rparen))
|
2016-08-17 20:25:25 +00:00
|
|
|
return error("predicate should be terminated by ')'.");
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2019-08-13 15:34:38 +00:00
|
|
|
bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::kw_shufflemask));
|
|
|
|
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return error("expected syntax shufflemask(<integer or undef>, ...)");
|
|
|
|
|
2020-01-13 15:32:45 -08:00
|
|
|
SmallVector<int, 32> ShufMask;
|
2019-08-13 15:34:38 +00:00
|
|
|
do {
|
|
|
|
if (Token.is(MIToken::kw_undef)) {
|
2020-01-13 15:32:45 -08:00
|
|
|
ShufMask.push_back(-1);
|
2019-08-13 15:34:38 +00:00
|
|
|
} else if (Token.is(MIToken::IntegerLiteral)) {
|
|
|
|
const APSInt &Int = Token.integerValue();
|
2020-01-13 15:32:45 -08:00
|
|
|
ShufMask.push_back(Int.getExtValue());
|
2019-08-13 15:34:38 +00:00
|
|
|
} else
|
|
|
|
return error("expected integer constant");
|
|
|
|
|
|
|
|
lex();
|
|
|
|
} while (consumeIfPresent(MIToken::comma));
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return error("shufflemask should be terminated by ')'.");
|
|
|
|
|
2020-01-13 15:32:45 -08:00
|
|
|
ArrayRef<int> MaskAlloc = MF.allocateShuffleMask(ShufMask);
|
|
|
|
Dest = MachineOperand::CreateShuffleMask(MaskAlloc);
|
2019-08-13 15:34:38 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2022-09-15 11:26:57 +01:00
|
|
|
bool MIParser::parseDbgInstrRefOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::kw_dbg_instr_ref));
|
|
|
|
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isNegative())
|
|
|
|
return error("expected unsigned integer for instruction index");
|
|
|
|
uint64_t InstrIdx = Token.integerValue().getZExtValue();
|
|
|
|
assert(InstrIdx <= std::numeric_limits<unsigned>::max() &&
|
|
|
|
"Instruction reference's instruction index is too large");
|
|
|
|
lex();
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::comma))
|
|
|
|
return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
|
|
|
|
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isNegative())
|
|
|
|
return error("expected unsigned integer for operand index");
|
|
|
|
uint64_t OpIdx = Token.integerValue().getZExtValue();
|
|
|
|
assert(OpIdx <= std::numeric_limits<unsigned>::max() &&
|
|
|
|
"Instruction reference's operand index is too large");
|
|
|
|
lex();
|
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
|
|
|
|
|
|
|
|
Dest = MachineOperand::CreateDbgInstrRef(InstrIdx, OpIdx);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-28 23:02:45 +00:00
|
|
|
bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::kw_target_index));
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
|
|
|
if (Token.isNot(MIToken::Identifier))
|
|
|
|
return error("expected the name of the target index");
|
|
|
|
int Index = 0;
|
2019-03-12 20:42:12 +00:00
|
|
|
if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
|
2015-07-28 23:02:45 +00:00
|
|
|
return error("use of undefined target index '" + Token.stringValue() + "'");
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
|
2015-08-05 22:26:15 +00:00
|
|
|
if (parseOperandsOffset(Dest))
|
|
|
|
return true;
|
2015-07-28 23:02:45 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-03-19 08:14:18 +00:00
|
|
|
bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
|
|
|
|
2018-07-26 00:27:47 +00:00
|
|
|
uint32_t *Mask = MF.allocateRegMask();
|
2022-06-22 19:04:07 -04:00
|
|
|
do {
|
|
|
|
if (Token.isNot(MIToken::rparen)) {
|
|
|
|
if (Token.isNot(MIToken::NamedRegister))
|
|
|
|
return error("expected a named register");
|
|
|
|
Register Reg;
|
|
|
|
if (parseNamedRegister(Reg))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
Mask[Reg / 32] |= 1U << (Reg % 32);
|
|
|
|
}
|
|
|
|
|
2017-03-19 08:14:18 +00:00
|
|
|
// TODO: Report an error if the same register is used more than once.
|
2022-06-22 19:04:07 -04:00
|
|
|
} while (consumeIfPresent(MIToken::comma));
|
2017-03-19 08:14:18 +00:00
|
|
|
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
Dest = MachineOperand::CreateRegMask(Mask);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-10 23:24:42 +00:00
|
|
|
bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
|
|
|
|
assert(Token.is(MIToken::kw_liveout));
|
2018-07-26 00:27:47 +00:00
|
|
|
uint32_t *Mask = MF.allocateRegMask();
|
2015-08-10 23:24:42 +00:00
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
|
|
|
while (true) {
|
|
|
|
if (Token.isNot(MIToken::NamedRegister))
|
|
|
|
return error("expected a named register");
|
2020-04-08 17:25:21 -04:00
|
|
|
Register Reg;
|
2016-10-11 03:13:01 +00:00
|
|
|
if (parseNamedRegister(Reg))
|
2015-08-10 23:24:42 +00:00
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
Mask[Reg / 32] |= 1U << (Reg % 32);
|
|
|
|
// TODO: Report an error if the same register is used more than once.
|
|
|
|
if (Token.isNot(MIToken::comma))
|
|
|
|
break;
|
|
|
|
lex();
|
|
|
|
}
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
Dest = MachineOperand::CreateRegLiveOut(Mask);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
|
|
|
|
MachineOperand &Dest,
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> &TiedDefIdx) {
|
2015-06-23 16:35:26 +00:00
|
|
|
switch (Token.kind()) {
|
2015-07-06 23:07:26 +00:00
|
|
|
case MIToken::kw_implicit:
|
|
|
|
case MIToken::kw_implicit_define:
|
2015-08-19 18:55:47 +00:00
|
|
|
case MIToken::kw_def:
|
2015-07-07 20:34:53 +00:00
|
|
|
case MIToken::kw_dead:
|
2015-07-08 21:23:34 +00:00
|
|
|
case MIToken::kw_killed:
|
2015-07-08 23:58:31 +00:00
|
|
|
case MIToken::kw_undef:
|
2015-08-14 19:07:07 +00:00
|
|
|
case MIToken::kw_internal:
|
2015-08-05 17:49:03 +00:00
|
|
|
case MIToken::kw_early_clobber:
|
2015-08-05 17:41:17 +00:00
|
|
|
case MIToken::kw_debug_use:
|
2017-12-12 17:53:59 +00:00
|
|
|
case MIToken::kw_renamable:
|
2015-06-24 17:34:58 +00:00
|
|
|
case MIToken::underscore:
|
2015-06-23 16:35:26 +00:00
|
|
|
case MIToken::NamedRegister:
|
2015-07-10 22:51:20 +00:00
|
|
|
case MIToken::VirtualRegister:
|
2018-03-30 18:15:54 +00:00
|
|
|
case MIToken::NamedVirtualRegister:
|
2015-08-19 19:05:34 +00:00
|
|
|
return parseRegisterOperand(Dest, TiedDefIdx);
|
2015-06-23 23:42:28 +00:00
|
|
|
case MIToken::IntegerLiteral:
|
|
|
|
return parseImmediateOperand(Dest);
|
2015-07-31 20:49:21 +00:00
|
|
|
case MIToken::kw_half:
|
|
|
|
case MIToken::kw_float:
|
|
|
|
case MIToken::kw_double:
|
|
|
|
case MIToken::kw_x86_fp80:
|
|
|
|
case MIToken::kw_fp128:
|
|
|
|
case MIToken::kw_ppc_fp128:
|
|
|
|
return parseFPImmediateOperand(Dest);
|
2015-06-26 16:46:11 +00:00
|
|
|
case MIToken::MachineBasicBlock:
|
|
|
|
return parseMBBOperand(Dest);
|
2015-07-16 23:37:45 +00:00
|
|
|
case MIToken::StackObject:
|
|
|
|
return parseStackObjectOperand(Dest);
|
|
|
|
case MIToken::FixedStackObject:
|
|
|
|
return parseFixedStackObjectOperand(Dest);
|
2015-06-26 22:56:48 +00:00
|
|
|
case MIToken::GlobalValue:
|
|
|
|
case MIToken::NamedGlobalValue:
|
|
|
|
return parseGlobalAddressOperand(Dest);
|
2015-07-20 20:51:18 +00:00
|
|
|
case MIToken::ConstantPoolItem:
|
|
|
|
return parseConstantPoolIndexOperand(Dest);
|
2015-07-15 23:38:35 +00:00
|
|
|
case MIToken::JumpTableIndex:
|
|
|
|
return parseJumpTableIndexOperand(Dest);
|
2015-07-21 16:59:53 +00:00
|
|
|
case MIToken::ExternalSymbol:
|
|
|
|
return parseExternalSymbolOperand(Dest);
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
case MIToken::MCSymbol:
|
|
|
|
return parseMCSymbolOperand(Dest);
|
2016-03-28 18:18:46 +00:00
|
|
|
case MIToken::SubRegisterIndex:
|
|
|
|
return parseSubRegisterIndexOperand(Dest);
|
2017-08-23 20:31:27 +00:00
|
|
|
case MIToken::md_diexpr:
|
2015-07-22 17:58:46 +00:00
|
|
|
case MIToken::exclaim:
|
|
|
|
return parseMetadataOperand(Dest);
|
2015-08-14 21:55:58 +00:00
|
|
|
case MIToken::kw_cfi_same_value:
|
2015-07-23 23:09:07 +00:00
|
|
|
case MIToken::kw_cfi_offset:
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_rel_offset:
|
2015-07-27 20:39:03 +00:00
|
|
|
case MIToken::kw_cfi_def_cfa_register:
|
2015-07-21 22:28:27 +00:00
|
|
|
case MIToken::kw_cfi_def_cfa_offset:
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_adjust_cfa_offset:
|
|
|
|
case MIToken::kw_cfi_escape:
|
2015-07-29 18:57:23 +00:00
|
|
|
case MIToken::kw_cfi_def_cfa:
|
2021-06-14 06:57:58 +05:30
|
|
|
case MIToken::kw_cfi_llvm_def_aspace_cfa:
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_register:
|
|
|
|
case MIToken::kw_cfi_remember_state:
|
2017-11-02 12:00:58 +00:00
|
|
|
case MIToken::kw_cfi_restore:
|
2017-12-15 15:17:18 +00:00
|
|
|
case MIToken::kw_cfi_restore_state:
|
|
|
|
case MIToken::kw_cfi_undefined:
|
|
|
|
case MIToken::kw_cfi_window_save:
|
2018-12-18 10:37:42 +00:00
|
|
|
case MIToken::kw_cfi_aarch64_negate_ra_sign_state:
|
2015-07-21 22:28:27 +00:00
|
|
|
return parseCFIOperand(Dest);
|
2015-07-28 17:28:03 +00:00
|
|
|
case MIToken::kw_blockaddress:
|
|
|
|
return parseBlockAddressOperand(Dest);
|
2016-07-29 20:32:59 +00:00
|
|
|
case MIToken::kw_intrinsic:
|
|
|
|
return parseIntrinsicOperand(Dest);
|
2015-07-28 23:02:45 +00:00
|
|
|
case MIToken::kw_target_index:
|
|
|
|
return parseTargetIndexOperand(Dest);
|
2015-08-10 23:24:42 +00:00
|
|
|
case MIToken::kw_liveout:
|
|
|
|
return parseLiveoutRegisterMaskOperand(Dest);
|
2016-08-17 20:25:25 +00:00
|
|
|
case MIToken::kw_floatpred:
|
|
|
|
case MIToken::kw_intpred:
|
|
|
|
return parsePredicateOperand(Dest);
|
2019-08-13 15:34:38 +00:00
|
|
|
case MIToken::kw_shufflemask:
|
|
|
|
return parseShuffleMaskOperand(Dest);
|
2022-09-15 11:26:57 +01:00
|
|
|
case MIToken::kw_dbg_instr_ref:
|
|
|
|
return parseDbgInstrRefOperand(Dest);
|
2015-06-23 16:35:26 +00:00
|
|
|
case MIToken::Error:
|
|
|
|
return true;
|
2015-06-29 16:57:06 +00:00
|
|
|
case MIToken::Identifier:
|
2019-03-12 20:42:12 +00:00
|
|
|
if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
|
2015-06-29 16:57:06 +00:00
|
|
|
Dest = MachineOperand::CreateRegMask(RegMask);
|
|
|
|
lex();
|
|
|
|
break;
|
2018-05-05 07:05:51 +00:00
|
|
|
} else if (Token.stringValue() == "CustomRegMask") {
|
2017-03-19 08:14:18 +00:00
|
|
|
return parseCustomRegisterMaskOperand(Dest);
|
2018-05-05 07:05:51 +00:00
|
|
|
} else
|
|
|
|
return parseTypedImmediateOperand(Dest);
|
2020-01-08 20:02:37 -08:00
|
|
|
case MIToken::dot: {
|
2020-01-10 11:18:11 +01:00
|
|
|
const auto *TII = MF.getSubtarget().getInstrInfo();
|
|
|
|
if (const auto *Formatter = TII->getMIRFormatter()) {
|
2020-01-08 20:02:37 -08:00
|
|
|
return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
|
|
|
|
}
|
2022-08-08 11:24:15 -07:00
|
|
|
[[fallthrough]];
|
2020-01-08 20:02:37 -08:00
|
|
|
}
|
2015-06-23 16:35:26 +00:00
|
|
|
default:
|
2015-08-21 21:12:44 +00:00
|
|
|
// FIXME: Parse the MCSymbol machine operand.
|
2015-06-23 16:35:26 +00:00
|
|
|
return error("expected a machine operand");
|
|
|
|
}
|
2015-06-22 20:37:46 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-19 19:05:34 +00:00
|
|
|
bool MIParser::parseMachineOperandAndTargetFlags(
|
2020-01-08 20:02:37 -08:00
|
|
|
const unsigned OpCode, const unsigned OpIdx, MachineOperand &Dest,
|
2022-12-13 09:06:36 +00:00
|
|
|
std::optional<unsigned> &TiedDefIdx) {
|
2015-08-06 00:44:07 +00:00
|
|
|
unsigned TF = 0;
|
|
|
|
bool HasTargetFlags = false;
|
|
|
|
if (Token.is(MIToken::kw_target_flags)) {
|
|
|
|
HasTargetFlags = true;
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
|
|
|
if (Token.isNot(MIToken::Identifier))
|
|
|
|
return error("expected the name of the target flag");
|
2019-03-12 20:42:12 +00:00
|
|
|
if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
|
|
|
|
if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
|
2015-08-18 22:52:15 +00:00
|
|
|
return error("use of undefined target flag '" + Token.stringValue() +
|
|
|
|
"'");
|
|
|
|
}
|
2015-08-06 00:44:07 +00:00
|
|
|
lex();
|
2015-08-18 22:52:15 +00:00
|
|
|
while (Token.is(MIToken::comma)) {
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::Identifier))
|
|
|
|
return error("expected the name of the target flag");
|
|
|
|
unsigned BitFlag = 0;
|
2019-03-12 20:42:12 +00:00
|
|
|
if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
|
2015-08-18 22:52:15 +00:00
|
|
|
return error("use of undefined target flag '" + Token.stringValue() +
|
|
|
|
"'");
|
|
|
|
// TODO: Report an error when using a duplicate bit target flag.
|
|
|
|
TF |= BitFlag;
|
|
|
|
lex();
|
|
|
|
}
|
2015-08-06 00:44:07 +00:00
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
auto Loc = Token.location();
|
2020-01-08 20:02:37 -08:00
|
|
|
if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))
|
2015-08-06 00:44:07 +00:00
|
|
|
return true;
|
|
|
|
if (!HasTargetFlags)
|
|
|
|
return false;
|
|
|
|
if (Dest.isReg())
|
|
|
|
return error(Loc, "register operands can't have target flags");
|
|
|
|
Dest.setTargetFlags(TF);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-07 20:21:00 +00:00
|
|
|
bool MIParser::parseOffset(int64_t &Offset) {
|
2015-08-05 22:26:15 +00:00
|
|
|
if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
|
|
|
|
return false;
|
2015-08-06 23:17:42 +00:00
|
|
|
StringRef Sign = Token.range();
|
2015-08-05 22:26:15 +00:00
|
|
|
bool IsNegative = Token.is(MIToken::minus);
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral))
|
|
|
|
return error("expected an integer literal after '" + Sign + "'");
|
2023-02-19 23:56:52 -08:00
|
|
|
if (Token.integerValue().getSignificantBits() > 64)
|
2015-08-05 22:26:15 +00:00
|
|
|
return error("expected 64-bit integer (too large)");
|
2015-08-07 20:21:00 +00:00
|
|
|
Offset = Token.integerValue().getExtValue();
|
2015-08-05 22:26:15 +00:00
|
|
|
if (IsNegative)
|
|
|
|
Offset = -Offset;
|
|
|
|
lex();
|
2015-08-07 20:21:00 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2022-08-16 16:15:44 -07:00
|
|
|
bool MIParser::parseIRBlockAddressTaken(BasicBlock *&BB) {
|
|
|
|
assert(Token.is(MIToken::kw_ir_block_address_taken));
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
|
|
|
|
return error("expected basic block after 'ir_block_address_taken'");
|
|
|
|
|
|
|
|
if (parseIRBlock(BB, MF.getFunction()))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-09-24 15:54:17 -07:00
|
|
|
bool MIParser::parseAlignment(uint64_t &Alignment) {
|
2021-01-11 19:58:35 -08:00
|
|
|
assert(Token.is(MIToken::kw_align) || Token.is(MIToken::kw_basealign));
|
2015-08-13 20:33:33 +00:00
|
|
|
lex();
|
2015-08-13 20:55:01 +00:00
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
|
2015-08-13 20:33:33 +00:00
|
|
|
return error("expected an integer literal after 'align'");
|
2021-09-24 15:54:17 -07:00
|
|
|
if (getUint64(Alignment))
|
2015-08-13 20:33:33 +00:00
|
|
|
return true;
|
|
|
|
lex();
|
2019-01-30 23:09:28 +00:00
|
|
|
|
2021-09-24 15:54:17 -07:00
|
|
|
if (!isPowerOf2_64(Alignment))
|
2019-01-30 23:09:28 +00:00
|
|
|
return error("expected a power-of-2 literal after 'align'");
|
|
|
|
|
2015-08-13 20:33:33 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-01-26 11:47:28 +00:00
|
|
|
bool MIParser::parseAddrspace(unsigned &Addrspace) {
|
|
|
|
assert(Token.is(MIToken::kw_addrspace));
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
|
|
|
|
return error("expected an integer literal after 'addrspace'");
|
|
|
|
if (getUnsigned(Addrspace))
|
|
|
|
return true;
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-07 20:21:00 +00:00
|
|
|
bool MIParser::parseOperandsOffset(MachineOperand &Op) {
|
|
|
|
int64_t Offset = 0;
|
|
|
|
if (parseOffset(Offset))
|
|
|
|
return true;
|
2015-08-05 22:26:15 +00:00
|
|
|
Op.setOffset(Offset);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS,
|
|
|
|
const Value *&V, ErrorCallbackType ErrCB) {
|
2015-08-03 23:08:19 +00:00
|
|
|
switch (Token.kind()) {
|
2015-08-05 17:35:55 +00:00
|
|
|
case MIToken::NamedIRValue: {
|
2020-01-08 20:02:37 -08:00
|
|
|
V = PFS.MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
|
2015-08-03 23:08:19 +00:00
|
|
|
break;
|
|
|
|
}
|
2015-08-19 23:31:05 +00:00
|
|
|
case MIToken::IRValue: {
|
|
|
|
unsigned SlotNumber = 0;
|
2020-01-08 20:02:37 -08:00
|
|
|
if (getUnsigned(Token, SlotNumber, ErrCB))
|
2015-08-19 23:31:05 +00:00
|
|
|
return true;
|
2020-01-08 20:02:37 -08:00
|
|
|
V = PFS.getIRValue(SlotNumber);
|
2015-08-19 23:31:05 +00:00
|
|
|
break;
|
|
|
|
}
|
2015-08-20 00:20:03 +00:00
|
|
|
case MIToken::NamedGlobalValue:
|
|
|
|
case MIToken::GlobalValue: {
|
|
|
|
GlobalValue *GV = nullptr;
|
2020-01-08 20:02:37 -08:00
|
|
|
if (parseGlobalValue(Token, PFS, GV, ErrCB))
|
2015-08-20 00:20:03 +00:00
|
|
|
return true;
|
|
|
|
V = GV;
|
|
|
|
break;
|
|
|
|
}
|
2015-08-21 21:54:12 +00:00
|
|
|
case MIToken::QuotedIRValue: {
|
|
|
|
const Constant *C = nullptr;
|
2020-01-08 20:02:37 -08:00
|
|
|
if (parseIRConstant(Token.location(), Token.stringValue(), PFS, C, ErrCB))
|
2015-08-21 21:54:12 +00:00
|
|
|
return true;
|
|
|
|
V = C;
|
|
|
|
break;
|
|
|
|
}
|
2021-03-05 20:47:09 -08:00
|
|
|
case MIToken::kw_unknown_address:
|
2021-03-02 14:59:06 -08:00
|
|
|
V = nullptr;
|
|
|
|
return false;
|
2015-08-03 23:08:19 +00:00
|
|
|
default:
|
|
|
|
llvm_unreachable("The current token should be an IR block reference");
|
|
|
|
}
|
2015-08-19 23:31:05 +00:00
|
|
|
if (!V)
|
2020-01-08 20:02:37 -08:00
|
|
|
return ErrCB(Token.location(), Twine("use of undefined IR value '") + Token.range() + "'");
|
2015-08-03 23:08:19 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
bool MIParser::parseIRValue(const Value *&V) {
|
|
|
|
return ::parseIRValue(
|
|
|
|
Token, PFS, V, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
|
|
|
|
return error(Loc, Msg);
|
|
|
|
});
|
|
|
|
}
|
|
|
|
|
2015-08-03 23:08:19 +00:00
|
|
|
bool MIParser::getUint64(uint64_t &Result) {
|
2016-12-16 13:58:01 +00:00
|
|
|
if (Token.hasIntegerValue()) {
|
|
|
|
if (Token.integerValue().getActiveBits() > 64)
|
|
|
|
return error("expected 64-bit integer (too large)");
|
|
|
|
Result = Token.integerValue().getZExtValue();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
if (Token.is(MIToken::HexLiteral)) {
|
|
|
|
APInt A;
|
|
|
|
if (getHexUint(A))
|
|
|
|
return true;
|
|
|
|
if (A.getBitWidth() > 64)
|
|
|
|
return error("expected 64-bit integer (too large)");
|
|
|
|
Result = A.getZExtValue();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::getHexUint(APInt &Result) {
|
2020-01-08 20:02:37 -08:00
|
|
|
return ::getHexUint(Token, Result);
|
2015-08-03 23:08:19 +00:00
|
|
|
}
|
|
|
|
|
2016-07-15 18:26:59 +00:00
|
|
|
bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
|
|
|
|
const auto OldFlags = Flags;
|
2015-08-04 00:24:45 +00:00
|
|
|
switch (Token.kind()) {
|
|
|
|
case MIToken::kw_volatile:
|
|
|
|
Flags |= MachineMemOperand::MOVolatile;
|
|
|
|
break;
|
2015-08-06 16:49:30 +00:00
|
|
|
case MIToken::kw_non_temporal:
|
|
|
|
Flags |= MachineMemOperand::MONonTemporal;
|
|
|
|
break;
|
[CodeGen] Split out the notions of MI invariance and MI dereferenceability.
Summary:
An IR load can be invariant, dereferenceable, neither, or both. But
currently, MI's notion of invariance is IR-invariant &&
IR-dereferenceable.
This patch splits up the notions of invariance and dereferenceability at
the MI level. It's NFC, so adds some probably-unnecessary
"is-dereferenceable" checks, which we can remove later if desired.
Reviewers: chandlerc, tstellarAMD
Subscribers: jholewinski, arsenm, nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D23371
llvm-svn: 281151
2016-09-11 01:38:58 +00:00
|
|
|
case MIToken::kw_dereferenceable:
|
|
|
|
Flags |= MachineMemOperand::MODereferenceable;
|
|
|
|
break;
|
2015-08-06 16:55:53 +00:00
|
|
|
case MIToken::kw_invariant:
|
|
|
|
Flags |= MachineMemOperand::MOInvariant;
|
|
|
|
break;
|
2017-07-13 02:28:54 +00:00
|
|
|
case MIToken::StringConstant: {
|
|
|
|
MachineMemOperand::Flags TF;
|
2019-03-12 20:42:12 +00:00
|
|
|
if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
|
2017-07-13 02:28:54 +00:00
|
|
|
return error("use of undefined target MMO flag '" + Token.stringValue() +
|
|
|
|
"'");
|
|
|
|
Flags |= TF;
|
|
|
|
break;
|
|
|
|
}
|
2015-08-04 00:24:45 +00:00
|
|
|
default:
|
|
|
|
llvm_unreachable("The current token should be a memory operand flag");
|
|
|
|
}
|
2015-08-06 18:26:36 +00:00
|
|
|
if (OldFlags == Flags)
|
|
|
|
// We know that the same flag is specified more than once when the flags
|
|
|
|
// weren't modified.
|
|
|
|
return error("duplicate '" + Token.stringValue() + "' memory operand flag");
|
2015-08-04 00:24:45 +00:00
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-12 20:33:26 +00:00
|
|
|
bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
|
|
|
|
switch (Token.kind()) {
|
2015-08-12 20:44:16 +00:00
|
|
|
case MIToken::kw_stack:
|
|
|
|
PSV = MF.getPSVManager().getStack();
|
|
|
|
break;
|
2015-08-12 21:00:22 +00:00
|
|
|
case MIToken::kw_got:
|
|
|
|
PSV = MF.getPSVManager().getGOT();
|
|
|
|
break;
|
2015-08-12 21:11:08 +00:00
|
|
|
case MIToken::kw_jump_table:
|
|
|
|
PSV = MF.getPSVManager().getJumpTable();
|
|
|
|
break;
|
2015-08-12 20:33:26 +00:00
|
|
|
case MIToken::kw_constant_pool:
|
|
|
|
PSV = MF.getPSVManager().getConstantPool();
|
|
|
|
break;
|
2015-08-12 21:23:17 +00:00
|
|
|
case MIToken::FixedStackObject: {
|
|
|
|
int FI;
|
|
|
|
if (parseFixedStackFrameIndex(FI))
|
|
|
|
return true;
|
|
|
|
PSV = MF.getPSVManager().getFixedStack(FI);
|
|
|
|
// The token was already consumed, so use return here instead of break.
|
|
|
|
return false;
|
|
|
|
}
|
2016-06-08 00:47:07 +00:00
|
|
|
case MIToken::StackObject: {
|
|
|
|
int FI;
|
|
|
|
if (parseStackFrameIndex(FI))
|
|
|
|
return true;
|
|
|
|
PSV = MF.getPSVManager().getFixedStack(FI);
|
|
|
|
// The token was already consumed, so use return here instead of break.
|
|
|
|
return false;
|
|
|
|
}
|
2017-06-06 22:22:41 +00:00
|
|
|
case MIToken::kw_call_entry:
|
2015-08-20 00:12:57 +00:00
|
|
|
lex();
|
|
|
|
switch (Token.kind()) {
|
|
|
|
case MIToken::GlobalValue:
|
|
|
|
case MIToken::NamedGlobalValue: {
|
|
|
|
GlobalValue *GV = nullptr;
|
|
|
|
if (parseGlobalValue(GV))
|
|
|
|
return true;
|
|
|
|
PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MIToken::ExternalSymbol:
|
|
|
|
PSV = MF.getPSVManager().getExternalSymbolCallEntry(
|
|
|
|
MF.createExternalSymbolName(Token.stringValue()));
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return error(
|
|
|
|
"expected a global value or an external symbol after 'call-entry'");
|
|
|
|
}
|
2015-08-14 21:08:30 +00:00
|
|
|
break;
|
2020-01-08 20:02:37 -08:00
|
|
|
case MIToken::kw_custom: {
|
|
|
|
lex();
|
2020-01-10 11:18:11 +01:00
|
|
|
const auto *TII = MF.getSubtarget().getInstrInfo();
|
|
|
|
if (const auto *Formatter = TII->getMIRFormatter()) {
|
2020-01-08 20:02:37 -08:00
|
|
|
if (Formatter->parseCustomPseudoSourceValue(
|
|
|
|
Token.stringValue(), MF, PFS, PSV,
|
|
|
|
[this](StringRef::iterator Loc, const Twine &Msg) -> bool {
|
|
|
|
return error(Loc, Msg);
|
|
|
|
}))
|
|
|
|
return true;
|
|
|
|
} else
|
|
|
|
return error("unable to parse target custom pseudo source value");
|
|
|
|
break;
|
|
|
|
}
|
2015-08-12 20:33:26 +00:00
|
|
|
default:
|
|
|
|
llvm_unreachable("The current token should be pseudo source value");
|
|
|
|
}
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
|
2015-08-12 21:00:22 +00:00
|
|
|
if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
|
2015-08-12 21:23:17 +00:00
|
|
|
Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
|
2016-06-08 00:47:07 +00:00
|
|
|
Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
|
2020-01-08 20:02:37 -08:00
|
|
|
Token.is(MIToken::kw_call_entry) || Token.is(MIToken::kw_custom)) {
|
2015-08-12 20:33:26 +00:00
|
|
|
const PseudoSourceValue *PSV = nullptr;
|
|
|
|
if (parseMemoryPseudoSourceValue(PSV))
|
|
|
|
return true;
|
|
|
|
int64_t Offset = 0;
|
|
|
|
if (parseOffset(Offset))
|
|
|
|
return true;
|
|
|
|
Dest = MachinePointerInfo(PSV, Offset);
|
|
|
|
return false;
|
|
|
|
}
|
2015-08-20 00:20:03 +00:00
|
|
|
if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
|
|
|
|
Token.isNot(MIToken::GlobalValue) &&
|
2015-08-21 21:54:12 +00:00
|
|
|
Token.isNot(MIToken::NamedGlobalValue) &&
|
2021-03-05 20:47:09 -08:00
|
|
|
Token.isNot(MIToken::QuotedIRValue) &&
|
|
|
|
Token.isNot(MIToken::kw_unknown_address))
|
2015-08-12 20:33:26 +00:00
|
|
|
return error("expected an IR value reference");
|
2015-08-19 23:27:07 +00:00
|
|
|
const Value *V = nullptr;
|
2015-08-12 20:33:26 +00:00
|
|
|
if (parseIRValue(V))
|
|
|
|
return true;
|
2021-03-02 14:59:06 -08:00
|
|
|
if (V && !V->getType()->isPointerTy())
|
2015-08-12 20:33:26 +00:00
|
|
|
return error("expected a pointer IR value");
|
|
|
|
lex();
|
|
|
|
int64_t Offset = 0;
|
|
|
|
if (parseOffset(Offset))
|
|
|
|
return true;
|
|
|
|
Dest = MachinePointerInfo(V, Offset);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-07-11 22:23:00 +00:00
|
|
|
bool MIParser::parseOptionalScope(LLVMContext &Context,
|
|
|
|
SyncScope::ID &SSID) {
|
|
|
|
SSID = SyncScope::System;
|
|
|
|
if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
|
|
|
|
lex();
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return error("expected '(' in syncscope");
|
|
|
|
|
|
|
|
std::string SSN;
|
|
|
|
if (parseStringConstant(SSN))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
SSID = Context.getOrInsertSyncScopeID(SSN);
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return error("expected ')' in syncscope");
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-02-13 22:14:08 +00:00
|
|
|
bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
|
|
|
|
Order = AtomicOrdering::NotAtomic;
|
|
|
|
if (Token.isNot(MIToken::Identifier))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
Order = StringSwitch<AtomicOrdering>(Token.stringValue())
|
|
|
|
.Case("unordered", AtomicOrdering::Unordered)
|
|
|
|
.Case("monotonic", AtomicOrdering::Monotonic)
|
|
|
|
.Case("acquire", AtomicOrdering::Acquire)
|
|
|
|
.Case("release", AtomicOrdering::Release)
|
|
|
|
.Case("acq_rel", AtomicOrdering::AcquireRelease)
|
|
|
|
.Case("seq_cst", AtomicOrdering::SequentiallyConsistent)
|
|
|
|
.Default(AtomicOrdering::NotAtomic);
|
|
|
|
|
|
|
|
if (Order != AtomicOrdering::NotAtomic) {
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-08-20 20:37:57 +00:00
|
|
|
return error("expected an atomic scope, ordering or a size specification");
|
2017-02-13 22:14:08 +00:00
|
|
|
}
|
|
|
|
|
2015-08-03 23:08:19 +00:00
|
|
|
bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
2016-07-15 18:26:59 +00:00
|
|
|
MachineMemOperand::Flags Flags = MachineMemOperand::MONone;
|
2015-08-04 00:24:45 +00:00
|
|
|
while (Token.isMemoryOperandFlag()) {
|
|
|
|
if (parseMemoryOperandFlag(Flags))
|
|
|
|
return true;
|
|
|
|
}
|
2015-08-03 23:08:19 +00:00
|
|
|
if (Token.isNot(MIToken::Identifier) ||
|
|
|
|
(Token.stringValue() != "load" && Token.stringValue() != "store"))
|
|
|
|
return error("expected 'load' or 'store' memory operation");
|
|
|
|
if (Token.stringValue() == "load")
|
|
|
|
Flags |= MachineMemOperand::MOLoad;
|
|
|
|
else
|
|
|
|
Flags |= MachineMemOperand::MOStore;
|
|
|
|
lex();
|
|
|
|
|
2017-11-28 18:57:02 +00:00
|
|
|
// Optional 'store' for operands that both load and store.
|
|
|
|
if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
|
|
|
|
Flags |= MachineMemOperand::MOStore;
|
|
|
|
lex();
|
|
|
|
}
|
|
|
|
|
2017-07-11 22:23:00 +00:00
|
|
|
// Optional synchronization scope.
|
|
|
|
SyncScope::ID SSID;
|
2017-12-15 22:22:58 +00:00
|
|
|
if (parseOptionalScope(MF.getFunction().getContext(), SSID))
|
2017-07-11 22:23:00 +00:00
|
|
|
return true;
|
2017-02-13 22:14:08 +00:00
|
|
|
|
|
|
|
// Up to two atomic orderings (cmpxchg provides guarantees on failure).
|
|
|
|
AtomicOrdering Order, FailureOrder;
|
|
|
|
if (parseOptionalAtomicOrdering(Order))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
if (parseOptionalAtomicOrdering(FailureOrder))
|
|
|
|
return true;
|
|
|
|
|
2021-05-19 22:25:51 -04:00
|
|
|
LLT MemoryType;
|
2018-08-20 20:37:57 +00:00
|
|
|
if (Token.isNot(MIToken::IntegerLiteral) &&
|
2021-05-19 22:25:51 -04:00
|
|
|
Token.isNot(MIToken::kw_unknown_size) &&
|
|
|
|
Token.isNot(MIToken::lparen))
|
|
|
|
return error("expected memory LLT, the size integer literal or 'unknown-size' after "
|
2018-08-20 20:37:57 +00:00
|
|
|
"memory operation");
|
2021-05-19 22:25:51 -04:00
|
|
|
|
|
|
|
uint64_t Size = MemoryLocation::UnknownSize;
|
2018-08-20 20:37:57 +00:00
|
|
|
if (Token.is(MIToken::IntegerLiteral)) {
|
|
|
|
if (getUint64(Size))
|
|
|
|
return true;
|
2021-05-19 22:25:51 -04:00
|
|
|
|
|
|
|
// Convert from bytes to bits for storage.
|
|
|
|
MemoryType = LLT::scalar(8 * Size);
|
|
|
|
lex();
|
2018-08-20 20:37:57 +00:00
|
|
|
} else if (Token.is(MIToken::kw_unknown_size)) {
|
|
|
|
Size = MemoryLocation::UnknownSize;
|
2021-05-19 22:25:51 -04:00
|
|
|
lex();
|
|
|
|
} else {
|
|
|
|
if (expectAndConsume(MIToken::lparen))
|
|
|
|
return true;
|
|
|
|
if (parseLowLevelType(Token.location(), MemoryType))
|
|
|
|
return true;
|
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
Size = MemoryType.getSizeInBytes();
|
2018-08-20 20:37:57 +00:00
|
|
|
}
|
2015-08-03 23:08:19 +00:00
|
|
|
|
2015-08-12 20:33:26 +00:00
|
|
|
MachinePointerInfo Ptr = MachinePointerInfo();
|
2016-06-04 00:06:31 +00:00
|
|
|
if (Token.is(MIToken::Identifier)) {
|
2017-11-28 18:57:02 +00:00
|
|
|
const char *Word =
|
|
|
|
((Flags & MachineMemOperand::MOLoad) &&
|
|
|
|
(Flags & MachineMemOperand::MOStore))
|
|
|
|
? "on"
|
|
|
|
: Flags & MachineMemOperand::MOLoad ? "from" : "into";
|
2016-06-04 00:06:31 +00:00
|
|
|
if (Token.stringValue() != Word)
|
|
|
|
return error(Twine("expected '") + Word + "'");
|
|
|
|
lex();
|
|
|
|
|
|
|
|
if (parseMachinePointerInfo(Ptr))
|
|
|
|
return true;
|
|
|
|
}
|
2021-09-24 15:54:17 -07:00
|
|
|
uint64_t BaseAlignment =
|
2021-05-19 22:25:51 -04:00
|
|
|
(Size != MemoryLocation::UnknownSize ? PowerOf2Ceil(Size) : 1);
|
2015-08-17 22:05:15 +00:00
|
|
|
AAMDNodes AAInfo;
|
2015-08-17 22:09:52 +00:00
|
|
|
MDNode *Range = nullptr;
|
2015-08-17 22:05:15 +00:00
|
|
|
while (consumeIfPresent(MIToken::comma)) {
|
|
|
|
switch (Token.kind()) {
|
2022-02-23 11:35:55 +00:00
|
|
|
case MIToken::kw_align: {
|
2021-01-11 19:58:35 -08:00
|
|
|
// align is printed if it is different than size.
|
2022-02-23 11:35:55 +00:00
|
|
|
uint64_t Alignment;
|
|
|
|
if (parseAlignment(Alignment))
|
2021-01-11 19:58:35 -08:00
|
|
|
return true;
|
2022-02-23 11:35:55 +00:00
|
|
|
if (Ptr.Offset & (Alignment - 1)) {
|
|
|
|
// MachineMemOperand::getAlign never returns a value greater than the
|
|
|
|
// alignment of offset, so this just guards against hand-written MIR
|
|
|
|
// that specifies a large "align" value when it should probably use
|
|
|
|
// "basealign" instead.
|
|
|
|
return error("specified alignment is more aligned than offset");
|
|
|
|
}
|
|
|
|
BaseAlignment = Alignment;
|
2021-01-11 19:58:35 -08:00
|
|
|
break;
|
2022-02-23 11:35:55 +00:00
|
|
|
}
|
2021-01-11 19:58:35 -08:00
|
|
|
case MIToken::kw_basealign:
|
|
|
|
// basealign is printed if it is different than align.
|
2015-08-17 22:05:15 +00:00
|
|
|
if (parseAlignment(BaseAlignment))
|
|
|
|
return true;
|
|
|
|
break;
|
2018-01-26 11:47:28 +00:00
|
|
|
case MIToken::kw_addrspace:
|
|
|
|
if (parseAddrspace(Ptr.AddrSpace))
|
|
|
|
return true;
|
|
|
|
break;
|
2015-08-17 22:05:15 +00:00
|
|
|
case MIToken::md_tbaa:
|
|
|
|
lex();
|
|
|
|
if (parseMDNode(AAInfo.TBAA))
|
|
|
|
return true;
|
|
|
|
break;
|
2015-08-17 22:06:40 +00:00
|
|
|
case MIToken::md_alias_scope:
|
|
|
|
lex();
|
|
|
|
if (parseMDNode(AAInfo.Scope))
|
|
|
|
return true;
|
|
|
|
break;
|
2015-08-17 22:08:02 +00:00
|
|
|
case MIToken::md_noalias:
|
|
|
|
lex();
|
|
|
|
if (parseMDNode(AAInfo.NoAlias))
|
|
|
|
return true;
|
|
|
|
break;
|
2015-08-17 22:09:52 +00:00
|
|
|
case MIToken::md_range:
|
|
|
|
lex();
|
|
|
|
if (parseMDNode(Range))
|
|
|
|
return true;
|
|
|
|
break;
|
2015-08-17 22:05:15 +00:00
|
|
|
// TODO: Report an error on duplicate metadata nodes.
|
|
|
|
default:
|
2015-08-17 22:09:52 +00:00
|
|
|
return error("expected 'align' or '!tbaa' or '!alias.scope' or "
|
|
|
|
"'!noalias' or '!range'");
|
2015-08-17 22:05:15 +00:00
|
|
|
}
|
2015-08-07 20:48:30 +00:00
|
|
|
}
|
2015-08-03 23:08:19 +00:00
|
|
|
if (expectAndConsume(MIToken::rparen))
|
|
|
|
return true;
|
2021-05-19 22:25:51 -04:00
|
|
|
Dest = MF.getMachineMemOperand(Ptr, Flags, MemoryType, Align(BaseAlignment),
|
|
|
|
AAInfo, Range, SSID, Order, FailureOrder);
|
2015-08-03 23:08:19 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {
|
|
|
|
assert((Token.is(MIToken::kw_pre_instr_symbol) ||
|
|
|
|
Token.is(MIToken::kw_post_instr_symbol)) &&
|
|
|
|
"Invalid token for a pre- post-instruction symbol!");
|
|
|
|
lex();
|
|
|
|
if (Token.isNot(MIToken::MCSymbol))
|
|
|
|
return error("expected a symbol after 'pre-instr-symbol'");
|
|
|
|
Symbol = getOrCreateMCSymbol(Token.stringValue());
|
|
|
|
lex();
|
|
|
|
if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
|
|
|
|
Token.is(MIToken::lbrace))
|
|
|
|
return false;
|
|
|
|
if (Token.isNot(MIToken::comma))
|
|
|
|
return error("expected ',' before the next machine operand");
|
2019-11-05 10:54:50 -08:00
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MIParser::parseHeapAllocMarker(MDNode *&Node) {
|
|
|
|
assert(Token.is(MIToken::kw_heap_alloc_marker) &&
|
|
|
|
"Invalid token for a heap alloc marker!");
|
|
|
|
lex();
|
2023-05-14 17:14:49 +08:00
|
|
|
if (parseMDNode(Node))
|
|
|
|
return true;
|
2019-11-05 10:54:50 -08:00
|
|
|
if (!Node)
|
|
|
|
return error("expected a MDNode after 'heap-alloc-marker'");
|
|
|
|
if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
|
|
|
|
Token.is(MIToken::lbrace))
|
|
|
|
return false;
|
|
|
|
if (Token.isNot(MIToken::comma))
|
|
|
|
return error("expected ',' before the next machine operand");
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2022-09-14 10:30:25 +02:00
|
|
|
bool MIParser::parsePCSections(MDNode *&Node) {
|
|
|
|
assert(Token.is(MIToken::kw_pcsections) &&
|
|
|
|
"Invalid token for a PC sections!");
|
|
|
|
lex();
|
2023-05-14 17:14:49 +08:00
|
|
|
if (parseMDNode(Node))
|
|
|
|
return true;
|
2022-09-14 10:30:25 +02:00
|
|
|
if (!Node)
|
|
|
|
return error("expected a MDNode after 'pcsections'");
|
|
|
|
if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
|
|
|
|
Token.is(MIToken::lbrace))
|
|
|
|
return false;
|
|
|
|
if (Token.isNot(MIToken::comma))
|
|
|
|
return error("expected ',' before the next machine operand");
|
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-08-06 23:57:04 +00:00
|
|
|
static void initSlots2BasicBlocks(
|
|
|
|
const Function &F,
|
|
|
|
DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
|
|
|
|
ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
|
2015-07-27 22:42:41 +00:00
|
|
|
MST.incorporateFunction(F);
|
2022-07-17 01:33:28 -07:00
|
|
|
for (const auto &BB : F) {
|
2015-07-27 22:42:41 +00:00
|
|
|
if (BB.hasName())
|
|
|
|
continue;
|
|
|
|
int Slot = MST.getLocalSlot(&BB);
|
|
|
|
if (Slot == -1)
|
|
|
|
continue;
|
|
|
|
Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-08-06 23:57:04 +00:00
|
|
|
static const BasicBlock *getIRBlockFromSlot(
|
|
|
|
unsigned Slot,
|
|
|
|
const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
|
2020-12-27 09:57:27 -08:00
|
|
|
return Slots2BasicBlocks.lookup(Slot);
|
2015-07-27 22:42:41 +00:00
|
|
|
}
|
|
|
|
|
2015-08-06 23:57:04 +00:00
|
|
|
const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
|
|
|
|
if (Slots2BasicBlocks.empty())
|
2017-12-15 22:22:58 +00:00
|
|
|
initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
|
2015-08-06 23:57:04 +00:00
|
|
|
return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
|
|
|
|
}
|
|
|
|
|
|
|
|
const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
|
2017-12-15 22:22:58 +00:00
|
|
|
if (&F == &MF.getFunction())
|
2015-08-06 23:57:04 +00:00
|
|
|
return getIRBlock(Slot);
|
|
|
|
DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
|
|
|
|
initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
|
|
|
|
return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
|
|
|
|
}
|
|
|
|
|
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
llvm-svn: 339962
2018-08-16 23:11:05 +00:00
|
|
|
MCSymbol *MIParser::getOrCreateMCSymbol(StringRef Name) {
|
|
|
|
// FIXME: Currently we can't recognize temporary or local symbols and call all
|
|
|
|
// of the appropriate forms to create them. However, this handles basic cases
|
|
|
|
// well as most of the special aspects are recognized by a prefix on their
|
|
|
|
// name, and the input names should already be unique. For test cases, keeping
|
|
|
|
// the symbol name out of the symbol table isn't terribly important.
|
|
|
|
return MF.getContext().getOrCreateSymbol(Name);
|
|
|
|
}
|
|
|
|
|
2017-07-11 22:23:00 +00:00
|
|
|
bool MIParser::parseStringConstant(std::string &Result) {
|
|
|
|
if (Token.isNot(MIToken::StringConstant))
|
|
|
|
return error("expected string constant");
|
2020-01-28 20:23:46 +01:00
|
|
|
Result = std::string(Token.stringValue());
|
2017-07-11 22:23:00 +00:00
|
|
|
lex();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-13 22:23:23 +00:00
|
|
|
bool llvm::parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS,
|
|
|
|
StringRef Src,
|
2015-08-13 23:10:16 +00:00
|
|
|
SMDiagnostic &Error) {
|
2016-07-13 23:27:50 +00:00
|
|
|
return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
|
2015-08-13 23:10:16 +00:00
|
|
|
}
|
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool llvm::parseMachineInstructions(PerFunctionMIParsingState &PFS,
|
2016-07-13 23:27:50 +00:00
|
|
|
StringRef Src, SMDiagnostic &Error) {
|
|
|
|
return MIParser(PFS, Error, Src).parseBasicBlocks();
|
2015-06-22 17:02:30 +00:00
|
|
|
}
|
2015-06-30 18:16:42 +00:00
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool llvm::parseMBBReference(PerFunctionMIParsingState &PFS,
|
2016-07-13 23:27:50 +00:00
|
|
|
MachineBasicBlock *&MBB, StringRef Src,
|
2016-07-13 22:23:23 +00:00
|
|
|
SMDiagnostic &Error) {
|
2016-07-13 23:27:50 +00:00
|
|
|
return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
|
2016-11-15 00:03:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bool llvm::parseRegisterReference(PerFunctionMIParsingState &PFS,
|
2020-04-08 17:25:21 -04:00
|
|
|
Register &Reg, StringRef Src,
|
2016-11-15 00:03:14 +00:00
|
|
|
SMDiagnostic &Error) {
|
|
|
|
return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
|
2015-06-30 18:16:42 +00:00
|
|
|
}
|
2015-07-14 21:24:41 +00:00
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool llvm::parseNamedRegisterReference(PerFunctionMIParsingState &PFS,
|
2020-04-08 17:25:21 -04:00
|
|
|
Register &Reg, StringRef Src,
|
2015-07-14 21:24:41 +00:00
|
|
|
SMDiagnostic &Error) {
|
2016-07-13 23:27:50 +00:00
|
|
|
return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
|
2015-07-14 21:24:41 +00:00
|
|
|
}
|
2015-07-27 17:42:45 +00:00
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool llvm::parseVirtualRegisterReference(PerFunctionMIParsingState &PFS,
|
|
|
|
VRegInfo *&Info, StringRef Src,
|
2015-07-27 17:42:45 +00:00
|
|
|
SMDiagnostic &Error) {
|
2016-10-11 03:13:01 +00:00
|
|
|
return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
|
2015-07-27 17:42:45 +00:00
|
|
|
}
|
2015-08-18 22:26:26 +00:00
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool llvm::parseStackObjectReference(PerFunctionMIParsingState &PFS,
|
2016-07-13 23:27:50 +00:00
|
|
|
int &FI, StringRef Src,
|
2015-08-18 22:26:26 +00:00
|
|
|
SMDiagnostic &Error) {
|
2016-07-13 23:27:50 +00:00
|
|
|
return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
|
2015-08-18 22:26:26 +00:00
|
|
|
}
|
2015-08-19 00:13:25 +00:00
|
|
|
|
2016-10-11 03:13:01 +00:00
|
|
|
bool llvm::parseMDNode(PerFunctionMIParsingState &PFS,
|
2016-07-13 23:27:50 +00:00
|
|
|
MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
|
|
|
|
return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
|
2015-08-19 00:13:25 +00:00
|
|
|
}
|
2020-01-08 20:02:37 -08:00
|
|
|
|
2021-05-25 20:21:21 -04:00
|
|
|
bool llvm::parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src,
|
|
|
|
SMRange SrcRange, SMDiagnostic &Error) {
|
|
|
|
return MIParser(PFS, Error, Src, SrcRange).parseMachineMetadata();
|
|
|
|
}
|
|
|
|
|
2020-01-08 20:02:37 -08:00
|
|
|
bool MIRFormatter::parseIRValue(StringRef Src, MachineFunction &MF,
|
|
|
|
PerFunctionMIParsingState &PFS, const Value *&V,
|
|
|
|
ErrorCallbackType ErrorCallback) {
|
|
|
|
MIToken Token;
|
|
|
|
Src = lexMIToken(Src, Token, [&](StringRef::iterator Loc, const Twine &Msg) {
|
|
|
|
ErrorCallback(Loc, Msg);
|
|
|
|
});
|
|
|
|
V = nullptr;
|
|
|
|
|
|
|
|
return ::parseIRValue(Token, PFS, V, ErrorCallback);
|
|
|
|
}
|