mirror of
https://github.com/llvm/llvm-project.git
synced 2025-04-29 06:06:06 +00:00
[WebAssembly] Lower SIMD nnan setcc nodes
Summary: Adds patterns to lower all the remaining setcc modes: lt, gt, le, and ge. Fixes PR40912. Reviewers: aheejin, sbc100, dschuff Reviewed By: dschuff Subscribers: jgravelle-google, hiraditya, sunfish, jdoerfert, llvm-commits, srj Tags: #llvm Differential Revision: https://reviews.llvm.org/D59519 llvm-svn: 356431
This commit is contained in:
Thomas Lively
parent
dc087de14c
commit
0200d62ec7
@ -417,16 +417,18 @@ defm GE_U : SIMDConditionInt<"ge_u", SETUGE, 33>;
|
||||
defm GE : SIMDConditionFP<"ge", SETOGE, 69>;
|
||||
|
||||
// Lower float comparisons that don't care about NaN to standard WebAssembly
|
||||
// float comparisons. These instructions are generated in the target-independent
|
||||
// expansion of unordered comparisons and ordered ne.
|
||||
def : Pat<(v4i32 (seteq (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
|
||||
(v4i32 (EQ_v4f32 (v4f32 V128:$lhs), (v4f32 V128:$rhs)))>;
|
||||
def : Pat<(v4i32 (setne (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
|
||||
(v4i32 (NE_v4f32 (v4f32 V128:$lhs), (v4f32 V128:$rhs)))>;
|
||||
def : Pat<(v2i64 (seteq (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
|
||||
(v2i64 (EQ_v2f64 (v2f64 V128:$lhs), (v2f64 V128:$rhs)))>;
|
||||
def : Pat<(v2i64 (setne (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
|
||||
(v2i64 (NE_v2f64 (v2f64 V128:$lhs), (v2f64 V128:$rhs)))>;
|
||||
// float comparisons. These instructions are generated with nnan and in the
|
||||
// target-independent expansion of unordered comparisons and ordered ne.
|
||||
foreach nodes = [[seteq, EQ_v4f32], [setne, NE_v4f32], [setlt, LT_v4f32],
|
||||
[setgt, GT_v4f32], [setle, LE_v4f32], [setge, GE_v4f32]] in
|
||||
def : Pat<(v4i32 (nodes[0] (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
|
||||
(v4i32 (nodes[1] (v4f32 V128:$lhs), (v4f32 V128:$rhs)))>;
|
||||
|
||||
foreach nodes = [[seteq, EQ_v2f64], [setne, NE_v2f64], [setlt, LT_v2f64],
|
||||
[setgt, GT_v2f64], [setle, LE_v2f64], [setge, GE_v2f64]] in
|
||||
def : Pat<(v2i64 (nodes[0] (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
|
||||
(v2i64 (nodes[1] (v2f64 V128:$lhs), (v2f64 V128:$rhs)))>;
|
||||
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Bitwise operations
|
||||
|
||||
@ -647,6 +647,16 @@ define <4 x i1> @compare_oeq_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_oeq_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_oeq_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_oeq_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan oeq <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_oeq_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_oeq_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -658,6 +668,17 @@ define <4 x i32> @compare_sext_oeq_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_oeq_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_oeq_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_oeq_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan oeq <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ogt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ogt_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -668,6 +689,16 @@ define <4 x i1> @compare_ogt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ogt_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ogt_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_ogt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan ogt <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ogt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ogt_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -679,6 +710,17 @@ define <4 x i32> @compare_sext_ogt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ogt_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ogt_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_ogt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan ogt <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_oge_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_oge_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -689,6 +731,16 @@ define <4 x i1> @compare_oge_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_oge_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_oge_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_oge_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan oge <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_oge_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_oge_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -700,6 +752,17 @@ define <4 x i32> @compare_sext_oge_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_oge_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_oge_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_oge_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan oge <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_olt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_olt_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -710,6 +773,16 @@ define <4 x i1> @compare_olt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_olt_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_olt_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_olt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan olt <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_olt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_olt_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -721,6 +794,17 @@ define <4 x i32> @compare_sext_olt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_olt_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_olt_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_olt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan olt <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ole_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ole_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -731,6 +815,16 @@ define <4 x i1> @compare_ole_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ole_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ole_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_ole_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan ole <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ole_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ole_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -742,6 +836,17 @@ define <4 x i32> @compare_sext_ole_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ole_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ole_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_ole_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan ole <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_one_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_one_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -756,6 +861,16 @@ define <4 x i1> @compare_one_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_one_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_one_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_one_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan one <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_one_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_one_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -771,6 +886,17 @@ define <4 x i32> @compare_sext_one_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_one_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_one_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_one_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan one <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ord_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ord_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -783,6 +909,18 @@ define <4 x i1> @compare_ord_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ord_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ord_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
|
||||
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_ord_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan ord <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ord_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ord_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -796,6 +934,19 @@ define <4 x i32> @compare_sext_ord_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ord_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ord_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
|
||||
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_ord_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan ord <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ueq_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ueq_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -810,6 +961,16 @@ define <4 x i1> @compare_ueq_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ueq_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ueq_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_ueq_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan ueq <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ueq_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ueq_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -825,6 +986,17 @@ define <4 x i32> @compare_sext_ueq_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ueq_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ueq_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]
|
||||
define <4 x i32> @compare_sext_ueq_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan ueq <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ugt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ugt_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -836,6 +1008,16 @@ define <4 x i1> @compare_ugt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ugt_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ugt_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_ugt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan ugt <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ugt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ugt_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -848,6 +1030,17 @@ define <4 x i32> @compare_sext_ugt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ugt_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ugt_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_ugt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan ugt <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_uge_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_uge_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -859,6 +1052,16 @@ define <4 x i1> @compare_uge_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_uge_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_uge_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_uge_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan uge <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_uge_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_uge_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -871,6 +1074,17 @@ define <4 x i32> @compare_sext_uge_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_uge_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_uge_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_uge_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan uge <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ult_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ult_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -882,6 +1096,16 @@ define <4 x i1> @compare_ult_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ult_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ult_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_ult_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan ult <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ult_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ult_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -894,6 +1118,17 @@ define <4 x i32> @compare_sext_ult_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ult_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ult_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_ult_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan ult <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ule_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ule_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -905,6 +1140,16 @@ define <4 x i1> @compare_ule_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ule_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_ule_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_ule_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan ule <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ule_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ule_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -917,6 +1162,17 @@ define <4 x i32> @compare_sext_ule_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ule_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_ule_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_ule_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan ule <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_une_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_une_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -927,6 +1183,16 @@ define <4 x i1> @compare_une_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_une_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_une_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_une_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan une <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_une_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_une_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -938,6 +1204,17 @@ define <4 x i32> @compare_sext_une_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_une_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_une_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_une_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan une <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_uno_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_uno_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -950,6 +1227,18 @@ define <4 x i1> @compare_uno_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_uno_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_uno_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
|
||||
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i1> @compare_uno_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp nnan uno <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_uno_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_uno_v4f32 (v128, v128) -> (v128){{$}}
|
||||
@ -963,6 +1252,19 @@ define <4 x i32> @compare_sext_uno_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_uno_nnan_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128-NEXT: .functype compare_sext_uno_nnan_v4f32 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
|
||||
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <4 x i32> @compare_sext_uno_nnan_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%cmp = fcmp nnan uno <4 x float> %x, %y
|
||||
%res = sext <4 x i1> %cmp to <4 x i32>
|
||||
ret <4 x i32> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_oeq_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -974,6 +1276,17 @@ define <2 x i1> @compare_oeq_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_oeq_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_oeq_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_oeq_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan oeq <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_oeq_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -986,6 +1299,18 @@ define <2 x i64> @compare_sext_oeq_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_oeq_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_oeq_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_oeq_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan oeq <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ogt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -997,6 +1322,17 @@ define <2 x i1> @compare_ogt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ogt_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_ogt_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_ogt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan ogt <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ogt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1009,6 +1345,18 @@ define <2 x i64> @compare_sext_ogt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ogt_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_ogt_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_ogt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan ogt <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_oge_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1020,6 +1368,17 @@ define <2 x i1> @compare_oge_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_oge_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_oge_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_oge_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan oge <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_oge_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1032,6 +1391,18 @@ define <2 x i64> @compare_sext_oge_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_oge_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_oge_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_oge_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan oge <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_olt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1043,6 +1414,17 @@ define <2 x i1> @compare_olt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_olt_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_olt_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_olt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan olt <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_olt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1055,6 +1437,18 @@ define <2 x i64> @compare_sext_olt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_olt_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_olt_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_olt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan olt <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ole_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1066,6 +1460,17 @@ define <2 x i1> @compare_ole_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ole_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_ole_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_ole_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan ole <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ole_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1078,6 +1483,18 @@ define <2 x i64> @compare_sext_ole_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ole_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_ole_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_ole_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan ole <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_one_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1093,6 +1510,17 @@ define <2 x i1> @compare_one_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_one_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_one_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_one_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan one <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_one_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1109,6 +1537,18 @@ define <2 x i64> @compare_sext_one_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_one_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_one_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_one_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan one <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ord_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1122,6 +1562,19 @@ define <2 x i1> @compare_ord_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ord_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_ord_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
|
||||
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_ord_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan ord <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ord_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1136,6 +1589,20 @@ define <2 x i64> @compare_sext_ord_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ord_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_ord_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
|
||||
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_ord_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan ord <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ueq_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1151,6 +1618,17 @@ define <2 x i1> @compare_ueq_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ueq_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_ueq_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_ueq_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan ueq <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ueq_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1167,6 +1645,18 @@ define <2 x i64> @compare_sext_ueq_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ueq_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_ueq_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_ueq_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan ueq <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ugt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1179,6 +1669,17 @@ define <2 x i1> @compare_ugt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ugt_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_ugt_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_ugt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan ugt <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ugt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1192,6 +1693,18 @@ define <2 x i64> @compare_sext_ugt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ugt_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_ugt_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_ugt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan ugt <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_uge_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1204,6 +1717,17 @@ define <2 x i1> @compare_uge_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_uge_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_uge_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_uge_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan uge <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_uge_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1217,6 +1741,18 @@ define <2 x i64> @compare_sext_uge_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_uge_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_uge_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_uge_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan uge <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ult_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1229,6 +1765,17 @@ define <2 x i1> @compare_ult_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ult_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_ult_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_ult_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan ult <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ult_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1242,6 +1789,18 @@ define <2 x i64> @compare_sext_ult_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ult_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_ult_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_ult_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan ult <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ule_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1254,6 +1813,17 @@ define <2 x i1> @compare_ule_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_ule_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_ule_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_ule_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan ule <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ule_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1267,6 +1837,18 @@ define <2 x i64> @compare_sext_ule_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_ule_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_ule_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_ule_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan ule <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_une_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1278,6 +1860,17 @@ define <2 x i1> @compare_une_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_une_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_une_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_une_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan une <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_une_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1290,6 +1883,18 @@ define <2 x i64> @compare_sext_une_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_une_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_une_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_une_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan une <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_uno_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1303,6 +1908,19 @@ define <2 x i1> @compare_uno_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_uno_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_uno_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
|
||||
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i1> @compare_uno_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp nnan uno <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_uno_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
@ -1316,3 +1934,17 @@ define <2 x i64> @compare_sext_uno_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: compare_sext_uno_nnan_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128-NEXT: .functype compare_sext_uno_nnan_v2f64 (v128, v128) -> (v128){{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
|
||||
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
|
||||
; SIMD128-NEXT: return $pop[[R]]{{$}}
|
||||
define <2 x i64> @compare_sext_uno_nnan_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%cmp = fcmp nnan uno <2 x double> %x, %y
|
||||
%res = sext <2 x i1> %cmp to <2 x i64>
|
||||
ret <2 x i64> %res
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user