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Revert "[SLP]Support revectorization of the previously vectorized scalars"
This reverts commit 0e3049c562ccdea288c3b1f3b3d1ce5992d284b0.
This commit is contained in:
Alexander Kornienko
GitHub
parent
5748ddbab4
commit
1fcb75a5c0
llvm
lib/Transforms/Vectorize
test/Transforms/SLPVectorizer
@ -3783,6 +3783,11 @@ private:
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if (isa<PoisonValue>(V))
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continue;
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auto It = ScalarToTreeEntries.find(V);
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assert(
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(It == ScalarToTreeEntries.end() ||
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(It->getSecond().size() == 1 && It->getSecond().front() == Last) ||
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doesNotNeedToBeScheduled(V)) &&
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"Scalar already in tree!");
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if (It == ScalarToTreeEntries.end()) {
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ScalarToTreeEntries.try_emplace(V).first->getSecond().push_back(Last);
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(void)Processed.insert(V);
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@ -4042,9 +4047,6 @@ private:
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private:
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/// Used for getting a "good" final ordering of instructions.
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int SchedulingPriority = 0;
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/// True if this instruction (or bundle) is scheduled (or considered as
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/// scheduled in the dry-run).
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bool IsScheduled = false;
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/// The kind of the ScheduleEntity.
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const Kind K = Kind::ScheduleData;
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@ -4058,10 +4060,6 @@ private:
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return SD->isReady();
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return cast<ScheduleBundle>(this)->isReady();
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}
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/// Gets/sets if the bundle is scheduled.
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bool isScheduled() const { return IsScheduled; }
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void setScheduled(bool Scheduled) { IsScheduled = Scheduled; }
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static bool classof(const ScheduleEntity *) { return true; }
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};
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@ -4134,6 +4132,10 @@ private:
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IsScheduled = false;
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}
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/// Gets/sets if the bundle is scheduled.
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bool isScheduled() const { return IsScheduled; }
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void setScheduled(bool Scheduled) { IsScheduled = Scheduled; }
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/// Gets the number of unscheduled dependencies.
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int getUnscheduledDeps() const { return UnscheduledDeps; }
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/// Gets the number of dependencies.
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@ -4208,6 +4210,10 @@ private:
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/// for scheduling.
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/// Note that this is negative as long as Dependencies is not calculated.
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int UnscheduledDeps = InvalidDeps;
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/// True if this instruction is scheduled (or considered as scheduled in the
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/// dry-run).
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bool IsScheduled = false;
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};
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#ifndef NDEBUG
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@ -4252,6 +4258,11 @@ private:
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}
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}
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bool isScheduled() const {
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return all_of(Bundle,
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[](const ScheduleData *SD) { return SD->isScheduled(); });
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}
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/// Returns the number of unscheduled dependencies in the bundle.
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int unscheduledDepsInBundle() const {
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assert(*this && "bundle must not be empty");
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@ -4508,22 +4519,12 @@ private:
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ProcessBundleMember(SD, nullptr);
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} else {
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ScheduleBundle &Bundle = *cast<ScheduleBundle>(Data);
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Bundle.setScheduled(/*Scheduled=*/true);
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for_each(Bundle.getBundle(), [](ScheduleData *SD) {
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SD->setScheduled(/*Scheduled=*/true);
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});
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LLVM_DEBUG(dbgs() << "SLP: schedule " << Bundle << "\n");
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auto AreAllBundlesScheduled = [&](const ScheduleData *SD) {
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ArrayRef<ScheduleBundle *> SDBundles =
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getScheduleBundles(SD->getInst());
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return !SDBundles.empty() &&
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all_of(SDBundles, [&](const ScheduleBundle *SDBundle) {
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return SDBundle->isScheduled();
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});
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};
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for (ScheduleData *SD : Bundle.getBundle()) {
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if (AreAllBundlesScheduled(SD)) {
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SD->setScheduled(/*Scheduled=*/true);
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ProcessBundleMember(SD, &Bundle);
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}
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}
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for (ScheduleData *SD : Bundle.getBundle())
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ProcessBundleMember(SD, &Bundle);
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}
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}
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@ -4554,11 +4555,10 @@ private:
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SD->verify();
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}
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assert(all_of(ReadyInsts,
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[](const ScheduleEntity *Bundle) {
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return Bundle->isReady();
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}) &&
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"item in ready list not ready?");
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for (const ScheduleEntity *Bundle : ReadyInsts) {
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assert(Bundle->isReady() && "item in ready list not ready?");
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(void)Bundle;
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}
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}
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/// Put all instructions into the ReadyList which are ready for scheduling.
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@ -7440,7 +7440,7 @@ void BoUpSLP::buildExternalUses(
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// Some in-tree scalars will remain as scalar in vectorized
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// instructions. If that is the case, the one in FoundLane will
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// be used.
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if (all_of(UseEntries, [&](TreeEntry *UseEntry) {
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if (any_of(UseEntries, [&](TreeEntry *UseEntry) {
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return UseEntry->State == TreeEntry::ScatterVectorize ||
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!doesInTreeUserNeedToExtract(
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Scalar, getRootEntryInstruction(*UseEntry), TLI,
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@ -9488,47 +9488,14 @@ void BoUpSLP::buildTree_rec(ArrayRef<Value *> VL, unsigned Depth,
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// We now know that this is a vector of instructions of the same type from
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// the same block.
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// Check that none of the instructions in the bundle are already in the tree
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// and the node may be not profitable for the vectorization as the small
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// alternate node.
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if (S && S.isAltShuffle()) {
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auto GetNumVectorizedExtracted = [&]() {
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APInt Extracted = APInt::getZero(VL.size());
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APInt Vectorized = APInt::getAllOnes(VL.size());
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for (auto [Idx, V] : enumerate(VL)) {
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auto *I = dyn_cast<Instruction>(V);
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if (!I || doesNotNeedToBeScheduled(I) ||
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all_of(I->operands(), [&](const Use &U) {
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return isa<ExtractElementInst>(U.get());
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}))
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continue;
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if (isVectorized(I))
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Vectorized.clearBit(Idx);
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else if (!I->hasOneUser() && !areAllUsersVectorized(I, UserIgnoreList))
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Extracted.setBit(Idx);
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}
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return std::make_pair(Vectorized, Extracted);
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};
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auto [Vectorized, Extracted] = GetNumVectorizedExtracted();
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constexpr TTI::TargetCostKind Kind = TTI::TCK_RecipThroughput;
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bool PreferScalarize = !Vectorized.isAllOnes() && VL.size() == 2;
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if (!Vectorized.isAllOnes() && !PreferScalarize) {
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// Rough cost estimation, if the vector code (+ potential extracts) is
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// more profitable than the scalar + buildvector.
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Type *ScalarTy = VL.front()->getType();
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auto *VecTy = getWidenedType(ScalarTy, VL.size());
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InstructionCost VectorizeCostEstimate =
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::getShuffleCost(*TTI, TTI::SK_PermuteTwoSrc, VecTy, {}, Kind) +
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::getScalarizationOverhead(*TTI, ScalarTy, VecTy, Extracted,
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/*Insert=*/false, /*Extract=*/true, Kind);
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InstructionCost ScalarizeCostEstimate =
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::getScalarizationOverhead(*TTI, ScalarTy, VecTy, Vectorized,
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/*Insert=*/true, /*Extract=*/false, Kind);
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PreferScalarize = VectorizeCostEstimate > ScalarizeCostEstimate;
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}
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if (PreferScalarize) {
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LLVM_DEBUG(dbgs() << "SLP: The instructions are in tree and alternate "
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"node is not profitable.\n");
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// Check that none of the instructions in the bundle are already in the tree.
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for (Value *V : VL) {
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if ((!IsScatterVectorizeUserTE && !isa<Instruction>(V)) ||
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doesNotNeedToBeScheduled(V))
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continue;
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if (isVectorized(V)) {
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LLVM_DEBUG(dbgs() << "SLP: The instruction (" << *V
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<< ") is already in tree.\n");
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if (TryToFindDuplicates(S)) {
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auto Invalid = ScheduleBundle::invalid();
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newTreeEntry(VL, Invalid /*not vectorized*/, S, UserTreeIdx,
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@ -9617,6 +9584,8 @@ void BoUpSLP::buildTree_rec(ArrayRef<Value *> VL, unsigned Depth,
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#endif
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if (!BundlePtr || (*BundlePtr && !*BundlePtr.value())) {
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LLVM_DEBUG(dbgs() << "SLP: We are not able to schedule this bundle!\n");
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assert((!BS.getScheduleData(VL0) || BS.getScheduleBundles(VL0).empty()) &&
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"tryScheduleBundle should not create bundle on failure");
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// Last chance to try to vectorize alternate node.
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if (S.isAltShuffle() && ReuseShuffleIndices.empty() &&
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TrySplitNode(SmallNodeSize, S))
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@ -12405,7 +12374,7 @@ BoUpSLP::getEntryCost(const TreeEntry *E, ArrayRef<Value *> VectorizedVals,
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SmallBitVector UsedScalars(Sz, false);
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for (unsigned I = 0; I < Sz; ++I) {
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if (isa<Instruction>(UniqueValues[I]) &&
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getTreeEntries(UniqueValues[I]).front() == E)
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is_contained(getTreeEntries(UniqueValues[I]), E))
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continue;
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UsedScalars.set(I);
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}
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@ -13975,7 +13944,6 @@ InstructionCost BoUpSLP::getTreeCost(ArrayRef<Value *> VectorizedVals,
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for (ExternalUser &EU : ExternalUses) {
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ScalarUserAndIdx.emplace_back(EU.Scalar, EU.User, EU.Lane);
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}
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SmallDenseSet<std::pair<Value *, Value *>, 8> CheckedScalarUser;
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for (ExternalUser &EU : ExternalUses) {
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// Uses by ephemeral values are free (because the ephemeral value will be
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// removed prior to code generation, and so the extraction will be
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@ -13983,12 +13951,6 @@ InstructionCost BoUpSLP::getTreeCost(ArrayRef<Value *> VectorizedVals,
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if (EphValues.count(EU.User))
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continue;
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// Check if the scalar for the given user or all users is accounted already.
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if (!CheckedScalarUser.insert(std::make_pair(EU.Scalar, EU.User)).second ||
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(EU.User &&
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CheckedScalarUser.contains(std::make_pair(EU.Scalar, nullptr))))
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continue;
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// Used in unreachable blocks or in EH pads (rarely executed) or is
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// terminated with unreachable instruction.
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if (BasicBlock *UserParent =
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@ -14691,16 +14653,10 @@ BoUpSLP::isGatherShuffledSingleRegisterEntry(
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PHINode *UserPHI = UseEI.UserTE->State != TreeEntry::SplitVectorize
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? dyn_cast<PHINode>(UseEI.UserTE->getMainOp())
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: nullptr;
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Instruction *InsertPt =
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const Instruction *InsertPt =
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UserPHI ? UserPHI->getIncomingBlock(UseEI.EdgeIdx)->getTerminator()
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: &getLastInstructionInBundle(UseEI.UserTE);
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if (TEInsertPt == InsertPt) {
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// If the schedulable insertion point is used in multiple entries - just
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// exit, no known ordering at this point, available only after real
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// scheduling.
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if (!doesNotNeedToBeScheduled(InsertPt) &&
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(TEUseEI.UserTE != UseEI.UserTE || TEUseEI.EdgeIdx < UseEI.EdgeIdx))
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continue;
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// If the users are the PHI nodes with the same incoming blocks - skip.
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if (TEUseEI.UserTE->State == TreeEntry::Vectorize &&
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TEUseEI.UserTE->getOpcode() == Instruction::PHI &&
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@ -15426,29 +15382,19 @@ Instruction &BoUpSLP::getLastInstructionInBundle(const TreeEntry *E) {
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// Set the insert point to the beginning of the basic block if the entry
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// should not be scheduled.
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auto FindScheduleBundle = [&](const TreeEntry *E) -> const ScheduleBundle * {
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const auto *It = BlocksSchedules.find(BB);
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auto IsNotScheduledEntry = [&](const TreeEntry *E) {
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if (E->isGather())
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return nullptr;
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return false;
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// Found previously that the instruction do not need to be scheduled.
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const auto *It = BlocksSchedules.find(BB);
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if (It == BlocksSchedules.end())
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return nullptr;
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for (Value *V : E->Scalars) {
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auto *I = dyn_cast<Instruction>(V);
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if (!I || isa<PHINode>(I) || doesNotNeedToBeScheduled(I))
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continue;
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ArrayRef<ScheduleBundle *> Bundles = It->second->getScheduleBundles(I);
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if (Bundles.empty())
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continue;
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const auto *It = find_if(
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Bundles, [&](ScheduleBundle *B) { return B->getTreeEntry() == E; });
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if (It != Bundles.end())
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return *It;
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}
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return nullptr;
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return It == BlocksSchedules.end() || all_of(E->Scalars, [&](Value *V) {
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if (!isa<Instruction>(V))
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return true;
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return It->second->getScheduleBundles(V).empty();
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});
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};
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const ScheduleBundle *Bundle = FindScheduleBundle(E);
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if (!E->isGather() && !Bundle) {
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if (IsNotScheduledEntry(E) ||
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(!E->isGather() && all_of(E->Scalars, isVectorLikeInstWithConstOps))) {
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if ((E->getOpcode() == Instruction::GetElementPtr &&
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any_of(E->Scalars,
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[](Value *V) {
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@ -15474,10 +15420,19 @@ Instruction &BoUpSLP::getLastInstructionInBundle(const TreeEntry *E) {
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// scheduled, and the last instruction is VL.back(). So we start with
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// VL.back() and iterate over schedule data until we reach the end of the
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// bundle. The end of the bundle is marked by null ScheduleData.
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if (Bundle) {
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assert(!E->isGather() && "Gathered instructions should not be scheduled");
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Res = Bundle->getBundle().back()->getInst();
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return *Res;
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if (It != BlocksSchedules.end() && !E->isGather()) {
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Value *V = E->isOneOf(E->Scalars.back());
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if (doesNotNeedToBeScheduled(V))
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V = *find_if_not(E->Scalars, doesNotNeedToBeScheduled);
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if (ArrayRef<ScheduleBundle *> Bundles = It->second->getScheduleBundles(V);
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!Bundles.empty()) {
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const auto *It = find_if(
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Bundles, [&](ScheduleBundle *B) { return B->getTreeEntry() == E; });
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assert(It != Bundles.end() && "Failed to find bundle");
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Res = (*It)->getBundle().back()->getInst();
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return *Res;
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}
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assert(E->getOpcode() == Instruction::PHI && "Expected PHI");
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}
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// LastInst can still be null at this point if there's either not an entry
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@ -16230,10 +16185,10 @@ BoUpSLP::getMatchedVectorizedOperand(const TreeEntry *E, unsigned NodeIdx,
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const InstructionsState &S) {
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if (!S)
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return nullptr;
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for (TreeEntry *TE : ScalarToTreeEntries.lookup(S.getMainOp()))
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if (TE->UserTreeIndex.UserTE == E && TE->UserTreeIndex.EdgeIdx == NodeIdx &&
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TE->isSame(VL))
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return TE;
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if (TreeEntry *VE = getSameValuesTreeEntry(S.getMainOp(), VL);
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VE && VE->UserTreeIndex.UserTE == E &&
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VE->UserTreeIndex.EdgeIdx == NodeIdx)
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return VE;
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return nullptr;
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}
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@ -17926,13 +17881,13 @@ Value *BoUpSLP::vectorizeTree(
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const ExtraValueToDebugLocsMap &ExternallyUsedValues,
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Instruction *ReductionRoot,
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ArrayRef<std::tuple<Value *, unsigned, bool>> VectorValuesAndScales) {
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// Clean Entry-to-LastInstruction table. It can be affected after scheduling,
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// need to rebuild it.
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EntryToLastInstruction.clear();
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// All blocks must be scheduled before any instructions are inserted.
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for (auto &BSIter : BlocksSchedules) {
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scheduleBlock(BSIter.second.get());
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}
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// Clean Entry-to-LastInstruction table. It can be affected after scheduling,
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// need to rebuild it.
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EntryToLastInstruction.clear();
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if (ReductionRoot)
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Builder.SetInsertPoint(ReductionRoot->getParent(),
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@ -18774,10 +18729,18 @@ BoUpSLP::BlockScheduling::tryScheduleBundle(ArrayRef<Value *> VL, BoUpSLP *SLP,
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// dependencies. As soon as the bundle is "ready" it means that there are no
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// cyclic dependencies and we can schedule it. Note that's important that we
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// don't "schedule" the bundle yet.
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SmallPtrSet<const ScheduleBundle *, 16> Visited;
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while (((!Bundle && ReSchedule) || (Bundle && !Bundle.isReady())) &&
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!ReadyInsts.empty()) {
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ScheduleEntity *Picked = ReadyInsts.pop_back_val();
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assert(Picked->isReady() && "must be ready to schedule");
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const auto *PickedBundle = dyn_cast<ScheduleBundle>(Picked);
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if (PickedBundle && !Visited.insert(PickedBundle).second) {
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assert(PickedBundle->isScheduled() && "bundle must be scheduled");
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continue;
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}
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assert((PickedBundle ? PickedBundle->isReady()
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: cast<ScheduleData>(Picked)->isReady()) &&
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"must be ready to schedule");
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schedule(Picked, ReadyInsts);
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if (Picked == &Bundle)
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break;
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@ -18831,16 +18794,8 @@ BoUpSLP::BlockScheduling::tryScheduleBundle(ArrayRef<Value *> VL, BoUpSLP *SLP,
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TryScheduleBundleImpl(ReSchedule, Bundle);
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if (!Bundle.isReady()) {
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for (ScheduleData *BD : Bundle.getBundle()) {
|
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if (BD->isReady()) {
|
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ArrayRef<ScheduleBundle *> Bundles = getScheduleBundles(BD->getInst());
|
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if (Bundles.empty()) {
|
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ReadyInsts.insert(BD);
|
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continue;
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}
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for (ScheduleBundle *B : Bundles)
|
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if (B->isReady())
|
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ReadyInsts.insert(B);
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}
|
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if (BD->isReady())
|
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ReadyInsts.insert(BD);
|
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}
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ScheduledBundlesList.pop_back();
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for (Value *V : VL) {
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@ -19171,11 +19126,6 @@ void BoUpSLP::BlockScheduling::resetSchedule() {
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SD->setScheduled(/*Scheduled=*/false);
|
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SD->resetUnscheduledDeps();
|
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}
|
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for (ScheduleBundle *Bundle : getScheduleBundles(I)) {
|
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assert(isInSchedulingRegion(*Bundle) &&
|
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"ScheduleBundle not in scheduling region");
|
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Bundle->setScheduled(/*Scheduled=*/false);
|
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}
|
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}
|
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ReadyInsts.clear();
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}
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@ -19234,7 +19184,6 @@ void BoUpSLP::scheduleBlock(BlockScheduling *BS) {
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Instruction *LastScheduledInst = BS->ScheduleEnd;
|
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|
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// Do the "real" scheduling.
|
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SmallPtrSet<Instruction *, 16> Scheduled;
|
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while (!ReadyInsts.empty()) {
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auto *Picked = *ReadyInsts.begin();
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ReadyInsts.erase(ReadyInsts.begin());
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@ -19244,14 +19193,10 @@ void BoUpSLP::scheduleBlock(BlockScheduling *BS) {
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if (auto *Bundle = dyn_cast<ScheduleBundle>(Picked)) {
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for (const ScheduleData *BundleMember : Bundle->getBundle()) {
|
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Instruction *PickedInst = BundleMember->getInst();
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if (!Scheduled.insert(PickedInst).second)
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continue;
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if (PickedInst->getNextNonDebugInstruction() != LastScheduledInst)
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PickedInst->moveAfter(LastScheduledInst->getPrevNode());
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LastScheduledInst = PickedInst;
|
||||
}
|
||||
EntryToLastInstruction.try_emplace(Bundle->getTreeEntry(),
|
||||
LastScheduledInst);
|
||||
} else {
|
||||
auto *SD = cast<ScheduleData>(Picked);
|
||||
Instruction *PickedInst = SD->getInst();
|
||||
|
||||
@ -39,26 +39,28 @@ define void @test() {
|
||||
; CHECK: [[BB77]]:
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <16 x float> [[TMP11]], <16 x float> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 14, i32 15, i32 poison, i32 poison>
|
||||
; CHECK-NEXT: [[TMP17:%.*]] = insertelement <8 x float> [[TMP12]], float [[I70]], i32 0
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x float> poison, float [[I70]], i32 1
|
||||
; CHECK-NEXT: [[TMP19:%.*]] = insertelement <8 x float> [[TMP14]], float [[I68]], i32 2
|
||||
; CHECK-NEXT: [[TMP16:%.*]] = insertelement <8 x float> [[TMP19]], float [[I66]], i32 3
|
||||
; CHECK-NEXT: [[TMP20:%.*]] = insertelement <8 x float> [[TMP16]], float [[I67]], i32 6
|
||||
; CHECK-NEXT: [[TMP21:%.*]] = insertelement <8 x float> [[TMP20]], float [[I69]], i32 7
|
||||
; CHECK-NEXT: [[TMP30:%.*]] = insertelement <2 x float> poison, float [[I68]], i32 0
|
||||
; CHECK-NEXT: [[TMP31:%.*]] = insertelement <2 x float> [[TMP30]], float [[I66]], i32 1
|
||||
; CHECK-NEXT: [[TMP39:%.*]] = shufflevector <16 x float> [[TMP25]], <16 x float> poison, <16 x i32> <i32 poison, i32 poison, i32 3, i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <16 x float> [[TMP39]], <16 x float> [[TMP25]], <16 x i32> <i32 poison, i32 poison, i32 2, i32 3, i32 18, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 19, i32 poison, i32 poison>
|
||||
; CHECK-NEXT: br label %[[BB78:.*]]
|
||||
; CHECK: [[BB78]]:
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = phi <8 x float> [ [[TMP17]], %[[BB77]] ], [ [[TMP36:%.*]], %[[BB78]] ]
|
||||
; CHECK-NEXT: [[TMP22:%.*]] = phi <8 x float> [ [[TMP21]], %[[BB77]] ], [ [[TMP31:%.*]], %[[BB78]] ]
|
||||
; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <8 x float> [[TMP22]], <8 x float> poison, <16 x i32> <i32 0, i32 3, i32 1, i32 2, i32 3, i32 0, i32 2, i32 3, i32 2, i32 6, i32 2, i32 3, i32 0, i32 7, i32 6, i32 6>
|
||||
; CHECK-NEXT: [[TMP16:%.*]] = phi <2 x float> [ [[TMP31]], %[[BB77]] ], [ [[TMP37:%.*]], %[[BB78]] ]
|
||||
; CHECK-NEXT: [[TMP38:%.*]] = shufflevector <8 x float> [[TMP15]], <8 x float> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 1, i32 0, i32 3, i32 1, i32 3, i32 5, i32 3, i32 1, i32 0, i32 4, i32 5, i32 5>
|
||||
; CHECK-NEXT: [[TMP21:%.*]] = shufflevector <8 x float> [[TMP15]], <8 x float> poison, <16 x i32> <i32 2, i32 poison, i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
|
||||
; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <2 x float> [[TMP16]], <2 x float> poison, <16 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
|
||||
; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <16 x float> [[TMP21]], <16 x float> [[TMP20]], <16 x i32> <i32 0, i32 17, i32 2, i32 16, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
|
||||
; CHECK-NEXT: [[TMP22:%.*]] = shufflevector <8 x float> [[TMP15]], <8 x float> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
|
||||
; CHECK-NEXT: [[TMP40:%.*]] = shufflevector <16 x float> [[TMP23]], <16 x float> [[TMP22]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 18, i32 6, i32 7, i32 8, i32 20, i32 10, i32 11, i32 12, i32 21, i32 14, i32 15>
|
||||
; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <16 x float> [[TMP40]], <16 x float> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 1, i32 5, i32 3, i32 1, i32 3, i32 9, i32 3, i32 1, i32 5, i32 13, i32 9, i32 9>
|
||||
; CHECK-NEXT: [[TMP18:%.*]] = fmul fast <16 x float> [[TMP24]], [[TMP13]]
|
||||
; CHECK-NEXT: [[TMP26:%.*]] = fmul fast <16 x float> [[TMP38]], [[TMP25]]
|
||||
; CHECK-NEXT: [[TMP27:%.*]] = fadd fast <16 x float> [[TMP26]], [[TMP18]]
|
||||
; CHECK-NEXT: [[TMP28:%.*]] = fadd fast <16 x float> [[TMP27]], poison
|
||||
; CHECK-NEXT: [[TMP29:%.*]] = fadd fast <16 x float> [[TMP28]], poison
|
||||
; CHECK-NEXT: [[TMP36]] = shufflevector <16 x float> [[TMP29]], <16 x float> poison, <8 x i32> <i32 5, i32 11, i32 12, i32 10, i32 14, i32 15, i32 poison, i32 poison>
|
||||
; CHECK-NEXT: [[TMP31]] = shufflevector <16 x float> [[TMP29]], <16 x float> poison, <8 x i32> <i32 12, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 14, i32 15>
|
||||
; CHECK-NEXT: [[TMP37]] = shufflevector <16 x float> [[TMP29]], <16 x float> poison, <2 x i32> <i32 6, i32 7>
|
||||
; CHECK-NEXT: br i1 poison, label %[[BB78]], label %[[BB167]]
|
||||
; CHECK: [[BB167]]:
|
||||
; CHECK-NEXT: [[TMP32:%.*]] = phi <16 x float> [ [[TMP11]], %[[BB64]] ], [ [[TMP29]], %[[BB78]] ]
|
||||
|
||||
@ -123,17 +123,18 @@ define <4 x i32> @build_vec_v4i32_reuse_0(<2 x i32> %v0, <2 x i32> %v1) {
|
||||
|
||||
define <4 x i32> @build_vec_v4i32_reuse_1(<2 x i32> %v0, <2 x i32> %v1) {
|
||||
; CHECK-LABEL: @build_vec_v4i32_reuse_1(
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[V0:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x i32> [[V1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add <4 x i32> [[TMP6]], [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = xor <4 x i32> [[TMP6]], [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i32> [[V0:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
|
||||
; CHECK-NEXT: [[V0_1:%.*]] = extractelement <2 x i32> [[V0]], i64 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[V1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
|
||||
; CHECK-NEXT: [[V1_1:%.*]] = extractelement <2 x i32> [[V1]], i64 1
|
||||
; CHECK-NEXT: [[TMP0_1:%.*]] = add i32 [[V0_1]], [[V1_1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add <4 x i32> [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = xor <4 x i32> [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i32> [[V0]], <2 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[V1]], <2 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = add <4 x i32> [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = xor <4 x i32> [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x i32> [[TMP8]], <4 x i32> [[TMP11]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = sub <4 x i32> [[TMP5]], [[TMP10]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x i32> [[TMP5]], <4 x i32> poison, <4 x i32> <i32 poison, i32 poison, i32 3, i32 2>
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP0_1]], i64 0
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP7]], <4 x i32> poison, <4 x i32> <i32 0, i32 0, i32 2, i32 3>
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = sub <4 x i32> [[TMP5]], [[TMP8]]
|
||||
; CHECK-NEXT: ret <4 x i32> [[TMP9]]
|
||||
;
|
||||
%v0.0 = extractelement <2 x i32> %v0, i32 0
|
||||
|
||||
@ -123,17 +123,18 @@ define <4 x i32> @build_vec_v4i32_reuse_0(<2 x i32> %v0, <2 x i32> %v1) {
|
||||
|
||||
define <4 x i32> @build_vec_v4i32_reuse_1(<2 x i32> %v0, <2 x i32> %v1) {
|
||||
; CHECK-LABEL: @build_vec_v4i32_reuse_1(
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[V0:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x i32> [[V1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add <4 x i32> [[TMP6]], [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = xor <4 x i32> [[TMP6]], [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i32> [[V0:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
|
||||
; CHECK-NEXT: [[V0_1:%.*]] = extractelement <2 x i32> [[V0]], i64 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[V1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
|
||||
; CHECK-NEXT: [[V1_1:%.*]] = extractelement <2 x i32> [[V1]], i64 1
|
||||
; CHECK-NEXT: [[TMP0_1:%.*]] = add i32 [[V0_1]], [[V1_1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add <4 x i32> [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = xor <4 x i32> [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i32> [[V0]], <2 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[V1]], <2 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = add <4 x i32> [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = xor <4 x i32> [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x i32> [[TMP8]], <4 x i32> [[TMP11]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = sub <4 x i32> [[TMP5]], [[TMP10]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x i32> [[TMP5]], <4 x i32> poison, <4 x i32> <i32 poison, i32 poison, i32 3, i32 2>
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP0_1]], i64 0
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP7]], <4 x i32> poison, <4 x i32> <i32 0, i32 0, i32 2, i32 3>
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = sub <4 x i32> [[TMP5]], [[TMP8]]
|
||||
; CHECK-NEXT: ret <4 x i32> [[TMP9]]
|
||||
;
|
||||
%v0.0 = extractelement <2 x i32> %v0, i32 0
|
||||
|
||||
@ -206,15 +206,15 @@ define i32 @reorder_indices_1(float %0) {
|
||||
; POW2-ONLY-SAME: float [[TMP0:%.*]]) {
|
||||
; POW2-ONLY-NEXT: entry:
|
||||
; POW2-ONLY-NEXT: [[NOR1:%.*]] = alloca [0 x [3 x float]], i32 0, align 4
|
||||
; POW2-ONLY-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr float, ptr [[NOR1]], i64 1
|
||||
; POW2-ONLY-NEXT: [[ARRAYIDX2_I265:%.*]] = getelementptr float, ptr [[NOR1]], i64 2
|
||||
; POW2-ONLY-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX2_I265]], align 4
|
||||
; POW2-ONLY-NEXT: [[TMP7:%.*]] = load <2 x float>, ptr [[ARRAYIDX_I]], align 4
|
||||
; POW2-ONLY-NEXT: [[TMP2:%.*]] = load <2 x float>, ptr [[NOR1]], align 4
|
||||
; POW2-ONLY-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP2]], i32 0
|
||||
; POW2-ONLY-NEXT: [[TMP4:%.*]] = fneg float [[TMP3]]
|
||||
; POW2-ONLY-NEXT: [[NEG11_I:%.*]] = fmul float [[TMP4]], [[TMP0]]
|
||||
; POW2-ONLY-NEXT: [[TMP5:%.*]] = call float @llvm.fmuladd.f32(float [[TMP1]], float 0.000000e+00, float [[NEG11_I]])
|
||||
; POW2-ONLY-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <2 x i32> <i32 1, i32 poison>
|
||||
; POW2-ONLY-NEXT: [[TMP7:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP1]], i32 1
|
||||
; POW2-ONLY-NEXT: [[TMP8:%.*]] = fneg <2 x float> [[TMP7]]
|
||||
; POW2-ONLY-NEXT: [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i32 0
|
||||
; POW2-ONLY-NEXT: [[TMP10:%.*]] = shufflevector <2 x float> [[TMP9]], <2 x float> poison, <2 x i32> zeroinitializer
|
||||
|
||||
@ -8,19 +8,19 @@ define void @test(ptr %0, i32 %add651) {
|
||||
; CHECK-NEXT: [[PREDPEL11:%.*]] = alloca [0 x [0 x [25 x i32]]], i32 0, align 16
|
||||
; CHECK-NEXT: [[ARRAYIDX469_6:%.*]] = getelementptr i8, ptr [[PREDPEL11]], i64 28
|
||||
; CHECK-NEXT: [[ARRAYIDX469_7:%.*]] = getelementptr i8, ptr [[PREDPEL11]], i64 32
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PREDPEL11]], i64 40
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 8
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX469_6]], align 4
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = load <2 x i32>, ptr [[ARRAYIDX469_7]], align 16
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PREDPEL11]], i64 36
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX469_7]], align 16
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX469_6]], align 4
|
||||
; CHECK-NEXT: [[CONV470_7:%.*]] = trunc i32 [[TMP2]] to i16
|
||||
; CHECK-NEXT: store i16 [[CONV470_7]], ptr [[TMP0]], align 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 8
|
||||
; CHECK-NEXT: [[ARRAYIDX660:%.*]] = getelementptr i8, ptr [[TMP4]], i64 7800
|
||||
; CHECK-NEXT: [[ARRAYIDX689:%.*]] = getelementptr i8, ptr [[TMP4]], i64 7816
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = load <2 x i32>, ptr [[TMP1]], align 4
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i32> [[TMP3]], splat (i32 1)
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> [[TMP5]], <2 x i32> <i32 1, i32 2>
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = add <2 x i32> [[TMP6]], [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i32> <i32 1, i32 poison>, i32 [[TMP5]], i32 1
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> <i32 1, i32 poison>, <2 x i32> <i32 2, i32 1>
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = add <2 x i32> [[TMP8]], [[TMP9]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[ADD651]], i32 0
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP2]], i32 1
|
||||
|
||||
@ -8,13 +8,14 @@ define void @test() {
|
||||
; CHECK-NEXT: [[ARRAYIDX21_I:%.*]] = getelementptr inbounds [4 x float], ptr undef, i64 2
|
||||
; CHECK-NEXT: br label [[BB1:%.*]]
|
||||
; CHECK: bb1:
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[ARRAYIDX10_I_I86]], align 4
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x float>, ptr undef, align 4
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x float>, ptr undef, align 4
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fsub <2 x float> zeroinitializer, [[TMP0]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[ARRAYIDX10_I_I86]], align 4
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = load float, ptr undef, align 4
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x float> <float 0.000000e+00, float poison>, float [[TMP2]], i32 1
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x float> [[TMP0]], float [[TMP3]], i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x float> <float poison, float 0.000000e+00>, float [[TMP2]], i32 0
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[TMP4]], <2 x float> [[TMP3]], <2 x float> [[TMP6]])
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[TMP4]], <2 x float> [[TMP5]], <2 x float> [[TMP6]])
|
||||
; CHECK-NEXT: br i1 false, label [[BB2:%.*]], label [[BB3:%.*]]
|
||||
; CHECK: bb2:
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = fmul <2 x float> [[TMP7]], zeroinitializer
|
||||
|
||||
@ -205,15 +205,15 @@ define i32 @reorder_indices_1(float %0) {
|
||||
; POW2-ONLY-SAME: float [[TMP0:%.*]]) {
|
||||
; POW2-ONLY-NEXT: entry:
|
||||
; POW2-ONLY-NEXT: [[NOR1:%.*]] = alloca [0 x [3 x float]], i32 0, align 4
|
||||
; POW2-ONLY-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr float, ptr [[NOR1]], i64 1
|
||||
; POW2-ONLY-NEXT: [[ARRAYIDX2_I265:%.*]] = getelementptr float, ptr [[NOR1]], i64 2
|
||||
; POW2-ONLY-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX2_I265]], align 4
|
||||
; POW2-ONLY-NEXT: [[TMP7:%.*]] = load <2 x float>, ptr [[ARRAYIDX_I]], align 4
|
||||
; POW2-ONLY-NEXT: [[TMP2:%.*]] = load <2 x float>, ptr [[NOR1]], align 4
|
||||
; POW2-ONLY-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP2]], i32 0
|
||||
; POW2-ONLY-NEXT: [[TMP4:%.*]] = fneg float [[TMP3]]
|
||||
; POW2-ONLY-NEXT: [[NEG11_I:%.*]] = fmul float [[TMP4]], [[TMP0]]
|
||||
; POW2-ONLY-NEXT: [[TMP5:%.*]] = call float @llvm.fmuladd.f32(float [[TMP1]], float 0.000000e+00, float [[NEG11_I]])
|
||||
; POW2-ONLY-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <2 x i32> <i32 1, i32 poison>
|
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; POW2-ONLY-NEXT: [[TMP7:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP1]], i32 1
|
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; POW2-ONLY-NEXT: [[TMP8:%.*]] = fneg <2 x float> [[TMP7]]
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; POW2-ONLY-NEXT: [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i32 0
|
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; POW2-ONLY-NEXT: [[TMP10:%.*]] = shufflevector <2 x float> [[TMP9]], <2 x float> poison, <2 x i32> zeroinitializer
|
||||
|
||||
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Reference in New Issue
Block a user