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[lld][LoongArch] Relax TLS LE/GD/LD (#123600)
In local-exec form, the code sequence is converted as follows:
```
From:
lu12i.w $rd, %le_hi20_r(sym)
R_LARCH_TLS_LE_HI20_R, R_LARCH_RELAX
add.w/d $rd, $rd, $tp, %le_add_r(sym)
R_LARCH_TLS_LE_ADD_R, R_LARCH_RELAX
addi/ld/st.w/d $rd, $rd, %le_lo12_r(sym)
R_LARCH_TLS_LE_LO12_R, R_LARCH_RELAX
To:
addi/ld/st.w/d $rd, $tp, %le_lo12_r(sym)
R_LARCH_TLS_LE_LO12_R
```
In global-dynamic or local-dynamic, the code sequence is converted as
follows:
```
From:
pcalau12i $a0, %ld_pc_hi20(sym) | %gd_pc_hi20(sym)
R_LARCH_TLS_GD_PC_HI20 | R_LARCH_TLS_LD_PC_HI20, R_LARCH_RELAX
addi.w/d $a0, $a0, %got_pc_lo12(sym) | %got_pc_lo12(sym)
R_LARCH_GOT_PC_LO12, R_LARCH_RELAX
To:
pcaddi $a0, %got_pc_lo12(sym) | %got_pc_lo12(sym)
R_LARCH_TLS_GD_PCREL20_S2 | R_LARCH_TLS_LD_PCREL20_S2
```
Note: For initial-exec form, since it involves the conversion from IE to
LE, we will implement it in a future patch.
This commit is contained in:
Zhaoxin Yang
GitHub
parent
75f76d482c
commit
1fe702fdec
@ -154,6 +154,10 @@ static uint32_t setJ20(uint32_t insn, uint32_t imm) {
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return (insn & 0xfe00001f) | (extractBits(imm, 19, 0) << 5);
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}
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static uint32_t setJ5(uint32_t insn, uint32_t imm) {
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return (insn & 0xfffffc1f) | (extractBits(imm, 4, 0) << 5);
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}
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static uint32_t setK12(uint32_t insn, uint32_t imm) {
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return (insn & 0xffc003ff) | (extractBits(imm, 11, 0) << 10);
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}
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@ -761,10 +765,10 @@ static bool isPairRelaxable(ArrayRef<Relocation> relocs, size_t i) {
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// Relax code sequence.
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// From:
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// pcalau12i $a0, %pc_hi20(sym)
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// addi.w/d $a0, $a0, %pc_lo12(sym)
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// pcalau12i $a0, %pc_hi20(sym) | %ld_pc_hi20(sym) | %gd_pc_hi20(sym)
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// addi.w/d $a0, $a0, %pc_lo12(sym) | %got_pc_lo12(sym) | %got_pc_lo12(sym)
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// To:
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// pcaddi $a0, %pc_lo12(sym)
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// pcaddi $a0, %pc_lo12(sym) | %got_pc_lo12(sym) | %got_pc_lo12(sym)
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//
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// From:
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// pcalau12i $a0, %got_pc_hi20(sym_got)
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@ -778,6 +782,10 @@ static void relaxPCHi20Lo12(Ctx &ctx, const InputSection &sec, size_t i,
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if (!((rHi20.type == R_LARCH_PCALA_HI20 &&
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rLo12.type == R_LARCH_PCALA_LO12) ||
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(rHi20.type == R_LARCH_GOT_PC_HI20 &&
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rLo12.type == R_LARCH_GOT_PC_LO12) ||
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(rHi20.type == R_LARCH_TLS_GD_PC_HI20 &&
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rLo12.type == R_LARCH_GOT_PC_LO12) ||
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(rHi20.type == R_LARCH_TLS_LD_PC_HI20 &&
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rLo12.type == R_LARCH_GOT_PC_LO12)))
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return;
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@ -798,6 +806,8 @@ static void relaxPCHi20Lo12(Ctx &ctx, const InputSection &sec, size_t i,
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else if (rHi20.expr == RE_LOONGARCH_PAGE_PC ||
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rHi20.expr == RE_LOONGARCH_GOT_PAGE_PC)
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dest = rHi20.sym->getVA(ctx);
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else if (rHi20.expr == RE_LOONGARCH_TLSGD_PAGE_PC)
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dest = ctx.in.got->getGlobalDynAddr(*rHi20.sym);
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else {
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Err(ctx) << getErrorLoc(ctx, (const uint8_t *)loc) << "unknown expr ("
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<< rHi20.expr << ") against symbol " << rHi20.sym
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@ -827,7 +837,12 @@ static void relaxPCHi20Lo12(Ctx &ctx, const InputSection &sec, size_t i,
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return;
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sec.relaxAux->relocTypes[i] = R_LARCH_RELAX;
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sec.relaxAux->relocTypes[i + 2] = R_LARCH_PCREL20_S2;
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if (rHi20.type == R_LARCH_TLS_GD_PC_HI20)
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sec.relaxAux->relocTypes[i + 2] = R_LARCH_TLS_GD_PCREL20_S2;
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else if (rHi20.type == R_LARCH_TLS_LD_PC_HI20)
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sec.relaxAux->relocTypes[i + 2] = R_LARCH_TLS_LD_PCREL20_S2;
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else
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sec.relaxAux->relocTypes[i + 2] = R_LARCH_PCREL20_S2;
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sec.relaxAux->writes.push_back(insn(PCADDI, getD5(nextInsn), 0, 0));
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remove = 4;
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}
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@ -863,6 +878,33 @@ static void relaxCall36(Ctx &ctx, const InputSection &sec, size_t i,
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}
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}
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// Relax code sequence.
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// From:
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// lu12i.w $rd, %le_hi20_r(sym)
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// add.w/d $rd, $rd, $tp, %le_add_r(sym)
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// addi/ld/st.w/d $rd, $rd, %le_lo12_r(sym)
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// To:
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// addi/ld/st.w/d $rd, $tp, %le_lo12_r(sym)
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static void relaxTlsLe(Ctx &ctx, const InputSection &sec, size_t i,
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uint64_t loc, Relocation &r, uint32_t &remove) {
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uint64_t val = r.sym->getVA(ctx, r.addend);
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// Check if the val exceeds the range of addi/ld/st.
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if (!isInt<12>(val))
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return;
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uint32_t currInsn = read32le(sec.content().data() + r.offset);
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switch (r.type) {
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case R_LARCH_TLS_LE_HI20_R:
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case R_LARCH_TLS_LE_ADD_R:
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sec.relaxAux->relocTypes[i] = R_LARCH_RELAX;
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remove = 4;
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break;
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case R_LARCH_TLS_LE_LO12_R:
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sec.relaxAux->writes.push_back(setJ5(currInsn, R_TP));
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sec.relaxAux->relocTypes[i] = R_LARCH_TLS_LE_LO12_R;
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break;
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}
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}
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static bool relax(Ctx &ctx, InputSection &sec) {
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const uint64_t secAddr = sec.getVA();
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const MutableArrayRef<Relocation> relocs = sec.relocs();
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@ -903,6 +945,8 @@ static bool relax(Ctx &ctx, InputSection &sec) {
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}
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case R_LARCH_PCALA_HI20:
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case R_LARCH_GOT_PC_HI20:
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case R_LARCH_TLS_GD_PC_HI20:
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case R_LARCH_TLS_LD_PC_HI20:
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// The overflow check for i+2 will be carried out in isPairRelaxable.
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if (isPairRelaxable(relocs, i))
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relaxPCHi20Lo12(ctx, sec, i, loc, r, relocs[i + 2], remove);
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@ -911,6 +955,12 @@ static bool relax(Ctx &ctx, InputSection &sec) {
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if (relaxable(relocs, i))
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relaxCall36(ctx, sec, i, loc, r, remove);
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break;
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case R_LARCH_TLS_LE_HI20_R:
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case R_LARCH_TLS_LE_ADD_R:
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case R_LARCH_TLS_LE_LO12_R:
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if (relaxable(relocs, i))
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relaxTlsLe(ctx, sec, i, loc, r, remove);
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break;
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}
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// For all anchors whose offsets are <= r.offset, they are preceded by
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@ -1015,9 +1065,22 @@ void LoongArch::finalizeRelax(int passes) const {
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r.expr = r.sym->hasFlag(NEEDS_PLT) ? R_PLT_PC : R_PC;
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break;
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case R_LARCH_B26:
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case R_LARCH_TLS_LE_LO12_R:
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skip = 4;
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write32le(p, aux.writes[writesIdx++]);
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break;
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case R_LARCH_TLS_GD_PCREL20_S2:
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// Note: R_LARCH_TLS_LD_PCREL20_S2 must also use R_TLSGD_PC instead
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// of R_TLSLD_PC due to historical reasons. In fact, right now TLSLD
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// behaves exactly like TLSGD on LoongArch.
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//
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// This reason has also been mentioned in mold commit:
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// https://github.com/rui314/mold/commit/5dfa1cf07c03bd57cb3d493b652ef22441bcd71c
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case R_LARCH_TLS_LD_PCREL20_S2:
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skip = 4;
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write32le(p, aux.writes[writesIdx++]);
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r.expr = R_TLSGD_PC;
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break;
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default:
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llvm_unreachable("unsupported type");
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}
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@ -27,10 +27,6 @@
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX-NEXT: R_LARCH_PCREL20_S2 _start
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX32-NEXT: nop
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# RELAX32-NEXT: R_LARCH_ALIGN *ABS*+0xc
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# RELAX32-NEXT: nop
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# RELAX32-NEXT: ret
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# RELAX64-NEXT: bl -8
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# RELAX64-NEXT: R_LARCH_B26 _start
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@ -38,8 +34,38 @@
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# RELAX64-NEXT: b -12
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# RELAX64-NEXT: R_LARCH_B26 _start
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# RELAX64-NEXT: R_LARCH_RELAX *ABS*
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# RELAX64-NEXT: ret
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# RELAX-NEXT: lu12i.w $a0, 0
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# RELAX-NEXT: R_LARCH_TLS_LE_HI20 a
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# RELAX-NEXT: ori $a0, $a0, 0
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# RELAX-NEXT: R_LARCH_TLS_LE_LO12 a
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# RELAX-NEXT: pcaddi $a0, [[#]]
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# RELAX-NEXT: R_LARCH_RELAX a
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX-NEXT: R_LARCH_TLS_GD_PCREL20_S2 a
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX-NEXT: pcaddi $a0, [[#]]
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# RELAX-NEXT: R_LARCH_RELAX a
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX-NEXT: R_LARCH_TLS_LD_PCREL20_S2 a
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX-NEXT: addi.{{[dw]}} $a0, $tp, 0
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# RELAX-NEXT: R_LARCH_RELAX a
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX-NEXT: R_LARCH_RELAX a
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX-NEXT: R_LARCH_TLS_LE_LO12_R a
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# RELAX-NEXT: R_LARCH_RELAX *ABS*
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# RELAX32-NEXT: nop
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# RELAX32-NEXT: R_LARCH_ALIGN *ABS*+0xc
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# RELAX32-NEXT: ret
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# RELAX64-NEXT: nop
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# RELAX64-NEXT: R_LARCH_ALIGN *ABS*+0xc
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# RELAX64-NEXT: nop
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# RELAX64-NEXT: nop
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# RELAX64-NEXT: ret
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# NORELAX: <_start>:
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# NORELAX-NEXT: pcalau12i $a0, 0
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@ -62,8 +88,36 @@
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# NORELAX-NEXT: R_LARCH_CALL36 _start
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# NORELAX-NEXT: R_LARCH_RELAX *ABS*
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# NORELAX-NEXT: jirl $zero, $a0, -24
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# NORELAX-NEXT: ret
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# NORELAX-NEXT: lu12i.w $a0, 0
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# NORELAX-NEXT: R_LARCH_TLS_LE_HI20 a
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# NORELAX-NEXT: ori $a0, $a0, 0
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# NORELAX-NEXT: R_LARCH_TLS_LE_LO12 a
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# NORELAX-NEXT: pcalau12i $a0, 16
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# NORELAX-NEXT: R_LARCH_TLS_GD_PC_HI20 a
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# NORELAX-NEXT: R_LARCH_RELAX *ABS*
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# NORELAX-NEXT: addi.d $a0, $a0, 8
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# NORELAX-NEXT: R_LARCH_GOT_PC_LO12 a
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# NORELAX-NEXT: R_LARCH_RELAX *ABS*
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# NORELAX-NEXT: pcalau12i $a0, 16
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# NORELAX-NEXT: R_LARCH_TLS_LD_PC_HI20 a
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# NORELAX-NEXT: R_LARCH_RELAX *ABS*
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# NORELAX-NEXT: addi.d $a0, $a0, 8
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# NORELAX-NEXT: R_LARCH_GOT_PC_LO12 a
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# NORELAX-NEXT: R_LARCH_RELAX *ABS*
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# NORELAX-NEXT: lu12i.w $a0, 0
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# NORELAX-NEXT: R_LARCH_TLS_LE_HI20_R a
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# NORELAX-NEXT: R_LARCH_RELAX *ABS*
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# NORELAX-NEXT: add.d $a0, $a0, $tp
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# NORELAX-NEXT: R_LARCH_TLS_LE_ADD_R a
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# NORELAX-NEXT: R_LARCH_RELAX *ABS*
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# NORELAX-NEXT: addi.d $a0, $a0, 0
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# NORELAX-NEXT: R_LARCH_TLS_LE_LO12_R a
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# NORELAX-NEXT: R_LARCH_RELAX *ABS*
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# NORELAX-NEXT: nop
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# NORELAX-NEXT: R_LARCH_ALIGN *ABS*+0xc
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# NORELAX-NEXT: nop
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# NORELAX-NEXT: nop
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# NORELAX-NEXT: ret
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# CHECKR: <_start>:
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# CHECKR-NEXT: pcalau12i $a0, 0
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@ -86,12 +140,53 @@
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# CHECKR-NEXT: R_LARCH_CALL36 _start
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# CHECKR-NEXT: R_LARCH_RELAX *ABS*
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# CHECKR-NEXT: jr $a0
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# CHECKR-NEXT: lu12i.w $a0, 0
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# CHECKR-NEXT: R_LARCH_TLS_LE_HI20 a
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# CHECKR-NEXT: ori $a0, $a0, 0
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# CHECKR-NEXT: R_LARCH_TLS_LE_LO12 a
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# CHECKR-NEXT: pcalau12i $a0, 0
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# CHECKR-NEXT: R_LARCH_TLS_GD_PC_HI20 a
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# CHECKR-NEXT: R_LARCH_RELAX *ABS*
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# CHECKR-NEXT: addi.d $a0, $a0, 0
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# CHECKR-NEXT: R_LARCH_GOT_PC_LO12 a
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# CHECKR-NEXT: R_LARCH_RELAX *ABS*
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# CHECKR-NEXT: pcalau12i $a0, 0
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# CHECKR-NEXT: R_LARCH_TLS_LD_PC_HI20 a
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# CHECKR-NEXT: R_LARCH_RELAX *ABS*
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# CHECKR-NEXT: addi.d $a0, $a0, 0
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# CHECKR-NEXT: R_LARCH_GOT_PC_LO12 a
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# CHECKR-NEXT: R_LARCH_RELAX *ABS*
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# CHECKR-NEXT: lu12i.w $a0, 0
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# CHECKR-NEXT: R_LARCH_TLS_LE_HI20_R a
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# CHECKR-NEXT: R_LARCH_RELAX *ABS*
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# CHECKR-NEXT: add.d $a0, $a0, $tp
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# CHECKR-NEXT: R_LARCH_TLS_LE_ADD_R a
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# CHECKR-NEXT: R_LARCH_RELAX *ABS*
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# CHECKR-NEXT: addi.d $a0, $a0, 0
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# CHECKR-NEXT: R_LARCH_TLS_LE_LO12_R a
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# CHECKR-NEXT: R_LARCH_RELAX *ABS*
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# CHECKR-NEXT: nop
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# CHECKR-NEXT: R_LARCH_ALIGN *ABS*+0xc
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# CHECKR-NEXT: nop
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# CHECKR-NEXT: nop
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# CHECKR-NEXT: ret
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.macro add dst, src1, src2, src3
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.ifdef ELF64
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add.d \dst, \src1, \src2, \src3
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.else
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add.w \dst, \src1, \src2, \src3
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.endif
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.endm
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.macro addi dst, src1, src2
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.ifdef ELF64
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addi.d \dst, \src1, \src2
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.else
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addi.w \dst, \src1, \src2
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.endif
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.endm
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.global _start
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_start:
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la.pcrel $a0, _start
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@ -101,5 +196,19 @@ _start:
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call36 _start
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tail36 $a0, _start
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.endif
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la.tls.le $a0, a # without R_LARCH_RELAX reloaction
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la.tls.gd $a0, a
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la.tls.ld $a0, a
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lu12i.w $a0, %le_hi20_r(a)
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add $a0, $a0, $tp, %le_add_r(a)
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addi $a0, $a0, %le_lo12_r(a)
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.p2align 4
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ret
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.section .tbss,"awT",@nobits
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.globl a
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a:
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.zero 4
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115
lld/test/ELF/loongarch-relax-tls-le.s
Normal file
115
lld/test/ELF/loongarch-relax-tls-le.s
Normal file
@ -0,0 +1,115 @@
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# REQUIRES: loongarch
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# RUN: llvm-mc --filetype=obj --triple=loongarch32 -mattr=+relax --defsym ELF32=1 %s -o %t.32.o
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# RUN: llvm-mc --filetype=obj --triple=loongarch64 -mattr=+relax %s -o %t.64.o
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# RUN: ld.lld %t.32.o -o %t.32
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# RUN: llvm-objdump -d --no-show-raw-insn %t.32 | FileCheck --check-prefixes=RELAX32 %s
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# RUN: ld.lld %t.64.o -o %t.64
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# RUN: llvm-objdump -d --no-show-raw-insn %t.64 | FileCheck --check-prefixes=RELAX64 %s
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# RELAX32-LABEL: <_start>:
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## .LANCHOR0@tprel = 8
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# RELAX32-NEXT: addi.w $a0, $tp, 8
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# RELAX32-NEXT: ld.w $a1, $a0, 0
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# RELAX32-NEXT: ld.w $a2, $tp, 8
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## .a@tprel - 4 = 0x7fc
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# RELAX32-NEXT: addi.w $a1, $zero, 1
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# RELAX32-NEXT: addi.w $a1, $a1, 2
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# RELAX32-NEXT: st.w $a1, $tp, 2044
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## .a@tprel = 0x800
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# RELAX32-NEXT: lu12i.w $a0, 1
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# RELAX32-NEXT: add.w $a0, $a0, $tp
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# RELAX32-NEXT: addi.w $a0, $a0, -2048
|
||||
|
||||
# RELAX64-LABEL: <_start>:
|
||||
## .LANCHOR0@tprel = 8
|
||||
# RELAX64-NEXT: addi.d $a0, $tp, 8
|
||||
# RELAX64-NEXT: ld.d $a1, $a0, 0
|
||||
# RELAX64-NEXT: ld.d $a2, $tp, 8
|
||||
## .a@tprel - 4 = 0x7fc
|
||||
# RELAX64-NEXT: addi.d $a1, $zero, 1
|
||||
# RELAX64-NEXT: addi.d $a1, $a1, 2
|
||||
# RELAX64-NEXT: st.d $a1, $tp, 2044
|
||||
## .a@tprel = 0x800
|
||||
# RELAX64-NEXT: lu12i.w $a0, 1
|
||||
# RELAX64-NEXT: add.d $a0, $a0, $tp
|
||||
# RELAX64-NEXT: addi.d $a0, $a0, -2048
|
||||
|
||||
.macro add dst, src1, src2, src3
|
||||
.ifdef ELF32
|
||||
add.w \dst, \src1, \src2, \src3
|
||||
.else
|
||||
add.d \dst, \src1, \src2, \src3
|
||||
.endif
|
||||
.endm
|
||||
.macro inst op dst, src1, src2
|
||||
.ifdef ELF32
|
||||
.ifc \op, addi
|
||||
addi.w \dst, \src1, \src2
|
||||
.else; .ifc \op, ld
|
||||
ld.w \dst, \src1, \src2
|
||||
.else; .ifc \op, st
|
||||
st.w \dst, \src1, \src2
|
||||
.else; .ifc \op, ldptr
|
||||
ldptr.w \dst, \src1, \src2
|
||||
.else
|
||||
.error "Unknown op in ELF32 mode"
|
||||
.endif; .endif; .endif; .endif
|
||||
.else
|
||||
.ifc \op, addi
|
||||
addi.d \dst, \src1, \src2
|
||||
.else; .ifc \op, ld
|
||||
ld.d \dst, \src1, \src2
|
||||
.else; .ifc \op, st
|
||||
st.d \dst, \src1, \src2
|
||||
.else; .ifc \op, ldptr
|
||||
ldptr.d \dst, \src1, \src2
|
||||
.else
|
||||
.error "Unknown op in ELF64 mode"
|
||||
.endif; .endif; .endif; .endif
|
||||
.endif
|
||||
.endm
|
||||
|
||||
.macro addi dst, src1, src2
|
||||
inst addi \dst, \src1, \src2
|
||||
.endm
|
||||
.macro ld dst, src1, src2
|
||||
inst ld \dst, \src1, \src2
|
||||
.endm
|
||||
.macro st dst, src1, src2
|
||||
inst st \dst, \src1, \src2
|
||||
.endm
|
||||
.macro ldptr dst, src1, src2
|
||||
inst ldptr \dst, \src1, \src2
|
||||
.endm
|
||||
|
||||
_start:
|
||||
## Test instructions not in pairs.
|
||||
lu12i.w $a0, %le_hi20_r(.LANCHOR0)
|
||||
add $a0, $a0, $tp, %le_add_r(.LANCHOR0)
|
||||
addi $a0, $a0, %le_lo12_r(.LANCHOR0)
|
||||
ld $a1, $a0, 0
|
||||
ld $a2, $a0, %le_lo12_r(.LANCHOR0)
|
||||
|
||||
## hi20(a-4) = hi20(0x7fc) = 0. relaxable
|
||||
## Test non-adjacent instructions.
|
||||
lu12i.w $a0, %le_hi20_r(a-4)
|
||||
addi $a1, $zero, 0x1
|
||||
add $a0, $a0, $tp, %le_add_r(a-4)
|
||||
addi $a1, $a1, 0x2
|
||||
st $a1, $a0, %le_lo12_r(a-4)
|
||||
|
||||
## hi20(a) = hi20(0x800) = 1. not relaxable
|
||||
lu12i.w $a0, %le_hi20_r(a)
|
||||
add $a0, $a0, $tp, %le_add_r(a)
|
||||
addi $a0, $a0, %le_lo12_r(a)
|
||||
|
||||
.section .tbss,"awT",@nobits
|
||||
.space 8
|
||||
.LANCHOR0:
|
||||
.space 0x800-8
|
||||
.globl a
|
||||
a:
|
||||
.zero 4
|
||||
@ -1,14 +1,17 @@
|
||||
# REQUIRES: loongarch
|
||||
# RUN: rm -rf %t && split-file %s %t
|
||||
|
||||
## LoongArch psABI doesn't specify TLS relaxation. Though the code sequences are not
|
||||
## relaxed, dynamic relocations can be omitted for GD->LE relaxation.
|
||||
## LoongArch psABI doesn't specify TLS relaxation. It can be handled the same way as gcc:
|
||||
## (a) code sequence can be converted from `pcalau12i+addi.[wd]` to `pcaddi`.
|
||||
## (b) dynamic relocations can be omitted for GD->LE relaxation.
|
||||
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 %t/a.s -o %t/a.32.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 -mattr=+relax %t/a.s -o %t/a.32.relax.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 %t/bc.s -o %t/bc.32.o
|
||||
# RUN: ld.lld -shared -soname=bc.so %t/bc.32.o -o %t/bc.32.so
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 %t/tga.s -o %t/tga.32.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 %t/a.s -o %t/a.64.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 %t/a.s -mattr=+relax -o %t/a.64.relax.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 %t/bc.s -o %t/bc.64.o
|
||||
# RUN: ld.lld -shared -soname=bc.so %t/bc.64.o -o %t/bc.64.so
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 %t/tga.s -o %t/tga.64.o
|
||||
@ -17,6 +20,9 @@
|
||||
# RUN: ld.lld -shared %t/a.32.o %t/bc.32.o -o %t/gd.32.so
|
||||
# RUN: llvm-readobj -r %t/gd.32.so | FileCheck --check-prefix=GD32-REL %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/gd.32.so | FileCheck --check-prefix=GD32 %s
|
||||
# RUN: ld.lld -shared %t/a.32.relax.o %t/bc.32.o -o %t/gd.32.relax.so
|
||||
# RUN: llvm-readobj -r %t/gd.32.relax.so | FileCheck --check-prefix=GD32-REL-RELAX %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/gd.32.relax.so | FileCheck --check-prefix=GD32-RELAX %s
|
||||
|
||||
## LA32 GD -> LE
|
||||
# RUN: ld.lld %t/a.32.o %t/bc.32.o %t/tga.32.o -o %t/le.32
|
||||
@ -35,6 +41,9 @@
|
||||
# RUN: ld.lld -shared %t/a.64.o %t/bc.64.o -o %t/gd.64.so
|
||||
# RUN: llvm-readobj -r %t/gd.64.so | FileCheck --check-prefix=GD64-REL %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/gd.64.so | FileCheck --check-prefix=GD64 %s
|
||||
# RUN: ld.lld -shared %t/a.64.relax.o %t/bc.64.o -o %t/gd.64.relax.so
|
||||
# RUN: llvm-readobj -r %t/gd.64.relax.so | FileCheck --check-prefix=GD64-REL-RELAX %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/gd.64.relax.so | FileCheck --check-prefix=GD64-RELAX %s
|
||||
|
||||
## LA64 GD -> LE
|
||||
# RUN: ld.lld %t/a.64.o %t/bc.64.o %t/tga.64.o -o %t/le.64
|
||||
@ -66,6 +75,21 @@
|
||||
# GD32-NEXT: addi.w $a0, $a0, 792
|
||||
# GD32-NEXT: bl 44
|
||||
|
||||
# GD32-REL-RELAX: .rela.dyn {
|
||||
# GD32-REL-RELAX-NEXT: 0x20300 R_LARCH_TLS_DTPMOD32 a 0x0
|
||||
# GD32-REL-RELAX-NEXT: 0x20304 R_LARCH_TLS_DTPREL32 a 0x0
|
||||
# GD32-REL-RELAX-NEXT: 0x20308 R_LARCH_TLS_DTPMOD32 b 0x0
|
||||
# GD32-REL-RELAX-NEXT: 0x2030C R_LARCH_TLS_DTPREL32 b 0x0
|
||||
# GD32-REL-RELAX-NEXT: }
|
||||
|
||||
## &DTPMOD(a) - . = 0x20300 - 0x10250 = 16428<<2
|
||||
# GD32-RELAX: 10250: pcaddi $a0, 16428
|
||||
# GD32-RELAX-NEXT: bl 44
|
||||
|
||||
## &DTPMOD(b) - . = 0x20308 - 0x10258 = 16428<<2
|
||||
# GD32-RELAX: 10258: pcaddi $a0, 16428
|
||||
# GD32-RELAX-NEXT: bl 36
|
||||
|
||||
# GD64-REL: .rela.dyn {
|
||||
# GD64-REL-NEXT: 0x204C0 R_LARCH_TLS_DTPMOD64 a 0x0
|
||||
# GD64-REL-NEXT: 0x204C8 R_LARCH_TLS_DTPREL64 a 0x0
|
||||
@ -83,6 +107,21 @@
|
||||
# GD64-NEXT: addi.d $a0, $a0, 1232
|
||||
# GD64-NEXT: bl 36
|
||||
|
||||
# GD64-REL-RELAX: .rela.dyn {
|
||||
# GD64-REL-RELAX-NEXT: 0x204C0 R_LARCH_TLS_DTPMOD64 a 0x0
|
||||
# GD64-REL-RELAX-NEXT: 0x204C8 R_LARCH_TLS_DTPREL64 a 0x0
|
||||
# GD64-REL-RELAX-NEXT: 0x204D0 R_LARCH_TLS_DTPMOD64 b 0x0
|
||||
# GD64-REL-RELAX-NEXT: 0x204D8 R_LARCH_TLS_DTPREL64 b 0x0
|
||||
# GD64-REL-RELAX-NEXT: }
|
||||
|
||||
## &DTPMOD(a) - . = 0x204c0 - 0x10398 = 16458<<2
|
||||
# GD64-RELAX: 10398: pcaddi $a0, 16458
|
||||
# GD64-RELAX-NEXT: bl 52
|
||||
|
||||
## &DTPMOD(b) - . = 0x204d0 - 0x103a0 = 16460<<2
|
||||
# GD64-RELAX: 103a0: pcaddi $a0, 16460
|
||||
# GD64-RELAX-NEXT: bl 44
|
||||
|
||||
# NOREL: no relocations
|
||||
|
||||
## .got contains pre-populated values: [a@dtpmod, a@dtprel, b@dtpmod, b@dtprel]
|
||||
|
||||
@ -1,12 +1,15 @@
|
||||
# REQUIRES: loongarch
|
||||
# RUN: rm -rf %t && split-file %s %t
|
||||
|
||||
## LoongArch psABI doesn't specify TLS relaxation. Though the code sequences are not
|
||||
## relaxed, dynamic relocations can be omitted for LD->LE relaxation.
|
||||
## LoongArch psABI doesn't specify TLS relaxation. It can be handled the same way as gcc:
|
||||
## (a) code sequence can be converted from `pcalau12i+addi.[wd]` to `pcaddi`.
|
||||
## (b) dynamic relocations can be omitted for LD->LE relaxation.
|
||||
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 --position-independent %t/a.s -o %t/a.32.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 --position-independent -mattr=+relax %t/a.s -o %t/a.32.relax.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 %t/tga.s -o %t/tga.32.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 --position-independent %t/a.s -o %t/a.64.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 --position-independent -mattr=+relax %t/a.s -o %t/a.64.relax.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 %t/tga.s -o %t/tga.64.o
|
||||
|
||||
## LA32 LD
|
||||
@ -14,24 +17,34 @@
|
||||
# RUN: llvm-readobj -r %t/ld.32.so | FileCheck --check-prefix=LD32-REL %s
|
||||
# RUN: llvm-readelf -x .got %t/ld.32.so | FileCheck --check-prefix=LD32-GOT %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/ld.32.so | FileCheck --check-prefixes=LD32 %s
|
||||
# RUN: ld.lld -shared %t/a.32.relax.o -o %t/ld.32.relax.so
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/ld.32.relax.so | FileCheck --check-prefixes=LD32-RELAX %s
|
||||
|
||||
## LA32 LD -> LE
|
||||
# RUN: ld.lld %t/a.32.o %t/tga.32.o -o %t/le.32
|
||||
# RUN: llvm-readelf -r %t/le.32 | FileCheck --check-prefix=NOREL %s
|
||||
# RUN: llvm-readelf -x .got %t/le.32 | FileCheck --check-prefix=LE32-GOT %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/le.32 | FileCheck --check-prefixes=LE32 %s
|
||||
# RUN: ld.lld %t/a.32.relax.o %t/tga.32.o -o %t/le.32.relax
|
||||
# RUN: llvm-readelf -x .got %t/le.32.relax | FileCheck --check-prefix=LE32-GOT-RELAX %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/le.32.relax | FileCheck --check-prefixes=LE32-RELAX %s
|
||||
|
||||
## LA64 LD
|
||||
# RUN: ld.lld -shared %t/a.64.o -o %t/ld.64.so
|
||||
# RUN: llvm-readobj -r %t/ld.64.so | FileCheck --check-prefix=LD64-REL %s
|
||||
# RUN: llvm-readelf -x .got %t/ld.64.so | FileCheck --check-prefix=LD64-GOT %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/ld.64.so | FileCheck --check-prefixes=LD64 %s
|
||||
# RUN: ld.lld -shared %t/a.64.relax.o -o %t/ld.64.relax.so
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/ld.64.relax.so | FileCheck --check-prefixes=LD64-RELAX %s
|
||||
|
||||
## LA64 LD -> LE
|
||||
# RUN: ld.lld %t/a.64.o %t/tga.64.o -o %t/le.64
|
||||
# RUN: llvm-readelf -r %t/le.64 | FileCheck --check-prefix=NOREL %s
|
||||
# RUN: llvm-readelf -x .got %t/le.64 | FileCheck --check-prefix=LE64-GOT %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/le.64 | FileCheck --check-prefixes=LE64 %s
|
||||
# RUN: ld.lld %t/a.64.relax.o %t/tga.64.o -o %t/le.64.relax
|
||||
# RUN: llvm-readelf -x .got %t/le.64.relax | FileCheck --check-prefix=LE64-GOT-RELAX %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t/le.64.relax | FileCheck --check-prefixes=LE64-RELAX %s
|
||||
|
||||
## a@dtprel = st_value(a) = 0 is a link-time constant.
|
||||
# LD32-REL: .rela.dyn {
|
||||
@ -56,6 +69,14 @@
|
||||
# LD64-NEXT: addi.d $a0, $a0, 1024
|
||||
# LD64-NEXT: bl 40
|
||||
|
||||
## LA32: &DTPMOD(a) - . = 0x20280 - 0x101cc = 16429<<2
|
||||
# LD32-RELAX: 101cc: pcaddi $a0, 16429
|
||||
# LD32-RELAX-NEXT: bl 48
|
||||
|
||||
## LA64: &DTPMOD(a) - . = 0x20400 - 0x102e0 = 16456<<2
|
||||
# LD64-RELAX: 102e0: pcaddi $a0, 16456
|
||||
# LD64-RELAX-NEXT: bl 44
|
||||
|
||||
# NOREL: no relocations
|
||||
|
||||
## a is local - its DTPMOD/DTPREL slots are link-time constants.
|
||||
@ -66,6 +87,12 @@
|
||||
# LE64-GOT: section '.got':
|
||||
# LE64-GOT-NEXT: 0x000301d8 01000000 00000000 00000000 00000000
|
||||
|
||||
# LE32-GOT-RELAX: section '.got':
|
||||
# LE32-GOT-RELAX-NEXT: 0x0003011c 01000000 00000000
|
||||
|
||||
# LE64-GOT-RELAX: section '.got':
|
||||
# LE64-GOT-RELAX-NEXT: 0x000301d0 01000000 00000000 00000000 00000000
|
||||
|
||||
## LA32: DTPMOD(.LANCHOR0) - . = 0x30120 - 0x20114: 0x10 pages, page offset 0x120
|
||||
# LE32: 20114: pcalau12i $a0, 16
|
||||
# LE32-NEXT: addi.w $a0, $a0, 288
|
||||
@ -76,6 +103,15 @@
|
||||
# LE64-NEXT: addi.d $a0, $a0, 472
|
||||
# LE64-NEXT: bl 4
|
||||
|
||||
## LA32: DTPMOD(.LANCHOR0) - . = 0x3011c - 0x20114 = 16386<<2
|
||||
# LE32-RELAX: 20114: pcaddi $a0, 16386
|
||||
# LE32-RELAX-NEXT: bl 4
|
||||
|
||||
## LA64: DTPMOD(.LANCHOR0) - . = 0x301d0 - 0x201c8 = 16386<<2
|
||||
# LE64-RELAX: 201c8: pcaddi $a0, 16386
|
||||
# LE64-RELAX-NEXT: bl 4
|
||||
|
||||
|
||||
#--- a.s
|
||||
la.tls.ld $a0, .LANCHOR0
|
||||
bl %plt(__tls_get_addr)
|
||||
|
||||
@ -1,14 +1,20 @@
|
||||
# REQUIRES: loongarch
|
||||
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 --defsym ELF32=1 %s -o %t.32.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch32 --defsym ELF32=1 -mattr=+relax %s -o %t.32.relax.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 %s -o %t.64.o
|
||||
# RUN: llvm-mc --filetype=obj --triple=loongarch64 -mattr=+relax %s -o %t.64.relax.o
|
||||
|
||||
# RUN: ld.lld %t.32.o -o %t.32
|
||||
# RUN: llvm-nm -p %t.32 | FileCheck --check-prefixes=NM %s
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t.32 | FileCheck --check-prefixes=LE,LE32 %s
|
||||
# RUN: ld.lld %t.32.relax.o -o %t.32.relax
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t.32.relax | FileCheck --check-prefixes=LE,LE32-RELAX %s
|
||||
|
||||
# RUN: ld.lld %t.64.o -o %t.64
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t.64 | FileCheck --check-prefixes=LE,LE64 %s
|
||||
# RUN: ld.lld %t.64.relax.o -o %t.64.relax
|
||||
# RUN: llvm-objdump -d --no-show-raw-insn %t.64.relax | FileCheck --check-prefixes=LE,LE64-RELAX %s
|
||||
|
||||
# RUN: not ld.lld -shared %t.32.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR --implicit-check-not=error:
|
||||
|
||||
@ -37,12 +43,22 @@
|
||||
# LE32-NEXT: add.w $a0, $a0, $tp
|
||||
# LE32-NEXT: addi.w $a0, $a0, -2048
|
||||
|
||||
# LE32-RELAX: addi.w $a0, $tp, 8
|
||||
# LE32-RELAX-NEXT: lu12i.w $a0, 1
|
||||
# LE32-RELAX-NEXT: add.w $a0, $a0, $tp
|
||||
# LE32-RELAX-NEXT: addi.w $a0, $a0, -2048
|
||||
|
||||
# LE64: add.d $a0, $a0, $tp
|
||||
# LE64-NEXT: addi.d $a0, $a0, 8
|
||||
# LE64-NEXT: lu12i.w $a0, 1
|
||||
# LE64-NEXT: add.d $a0, $a0, $tp
|
||||
# LE64-NEXT: addi.d $a0, $a0, -2048
|
||||
|
||||
# LE64-RELAX: addi.d $a0, $tp, 8
|
||||
# LE64-RELAX-NEXT: lu12i.w $a0, 1
|
||||
# LE64-RELAX-NEXT: add.d $a0, $a0, $tp
|
||||
# LE64-RELAX-NEXT: addi.d $a0, $a0, -2048
|
||||
|
||||
# LE-EMPTY:
|
||||
|
||||
.macro add dst, src1, src2, src3
|
||||
|
||||
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Reference in New Issue
Block a user