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[AMDGPU] Fix crash in the SILoadStoreOptimizer (#93862)
It does not properly handle situation when address calculation uses V_ADDC_U32 0, 0, carry-in (i.e. with both src0 and src1 immediates).
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@ -2034,7 +2034,7 @@ void SILoadStoreOptimizer::processBaseWithConstOffset(const MachineOperand &Base
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if (Src0->isImm())
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std::swap(Src0, Src1);
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if (!Src1->isImm())
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if (!Src1->isImm() || Src0->isImm())
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return;
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uint64_t Offset1 = Src1->getImm();
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26
llvm/test/CodeGen/AMDGPU/load-store-opt-addc0.mir
Normal file
26
llvm/test/CodeGen/AMDGPU/load-store-opt-addc0.mir
Normal file
@ -0,0 +1,26 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-load-store-opt -o - %s | FileCheck --check-prefix=GCN %s
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# This used to crash
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---
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name: analyze_addc_0_0
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body: |
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bb.1.entry:
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liveins: $vgpr0
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; GCN-LABEL: name: analyze_addc_0_0
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], 16, 0, implicit $exec
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; GCN-NEXT: [[V_ADDC_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADDC_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADDC_U32_e64 0, 0, killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
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; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, [[V_ADDC_U32_e64_]], %subreg.sub1
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; GCN-NEXT: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[REG_SEQUENCE]], 0, 0, implicit $exec
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32, %2:sreg_64_xexec = V_ADD_CO_U32_e64 %0, 16, 0, implicit $exec
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%3:vgpr_32, dead %26:sreg_64_xexec = V_ADDC_U32_e64 0, 0, killed %2, 0, implicit $exec
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%4:vreg_64 = REG_SEQUENCE %1, %subreg.sub0, %3, %subreg.sub1
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%5:vreg_128 = GLOBAL_LOAD_DWORDX4 %4, 0, 0, implicit $exec
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...
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