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Revert "[RISCV][NFC] Make generated intrinsic records more human-readable (#133710)"
This reverts commit d0cf5cd5f9790dc21396936d076389c3be1a9599. Error: "declaration of ‘clang::RISCV::RequiredExtensions {anonymous}::SemaRecord::RequiredExtensions’ changes meaning of ‘RequiredExtensions’ [-fpermissive]"
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parent
b283ff7eb1
commit
21ff45dea1
clang
include/clang/Support
lib
utils/TableGen
@ -11,7 +11,6 @@
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/BitmaskEnum.h"
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#include "llvm/ADT/Bitset.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringRef.h"
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#include <cstdint>
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@ -377,8 +376,6 @@ enum PolicyScheme : uint8_t {
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HasPolicyOperand,
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};
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llvm::raw_ostream &operator<<(llvm::raw_ostream &OS, enum PolicyScheme PS);
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// TODO refactor RVVIntrinsic class design after support all intrinsic
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// combination. This represents an instantiation of an intrinsic with a
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// particular type and prototype
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@ -510,23 +507,6 @@ enum RVVRequire {
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RVV_REQ_NUM,
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};
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llvm::raw_ostream &operator<<(llvm::raw_ostream &OS, enum RVVRequire Require);
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struct RequiredExtensions {
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llvm::Bitset<RVV_REQ_NUM> Bits;
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RequiredExtensions() {}
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RequiredExtensions(std::initializer_list<RVVRequire> Init) {
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for (auto I : Init)
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Bits.set(I);
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}
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void set(unsigned I) { Bits.set(I); }
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bool operator[](unsigned I) const { return Bits[I]; }
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};
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llvm::raw_ostream &operator<<(llvm::raw_ostream &OS,
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const RequiredExtensions &Exts);
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// Raw RVV intrinsic info, used to expand later.
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// This struct is highly compact for minimized code size.
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struct RVVIntrinsicRecord {
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@ -538,7 +518,7 @@ struct RVVIntrinsicRecord {
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const char *OverloadedName;
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// Required target features for this intrinsic.
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RequiredExtensions RequiredExtensions;
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uint32_t RequiredExtensions[(RVV_REQ_NUM + 31) / 32];
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// Prototype for this intrinsic, index of RVVSignatureTable.
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uint16_t PrototypeIndex;
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@ -232,7 +232,8 @@ void RISCVIntrinsicManagerImpl::ConstructRVVIntrinsics(
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for (auto &Record : Recs) {
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// Check requirements.
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if (llvm::any_of(FeatureCheckList, [&](const auto &Item) {
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return Record.RequiredExtensions[Item.second] &&
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return ((Record.RequiredExtensions[Item.second / 32] &
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(1U << (Item.second % 32))) != 0) &&
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!TI.hasFeature(Item.first);
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}))
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continue;
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@ -1196,91 +1196,36 @@ SmallVector<PrototypeDescriptor> parsePrototypes(StringRef Prototypes) {
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return PrototypeDescriptors;
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}
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#define STRINGIFY(NAME) \
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case NAME: \
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OS << #NAME; \
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break;
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llvm::raw_ostream &operator<<(llvm::raw_ostream &OS, enum PolicyScheme PS) {
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switch (PS) {
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STRINGIFY(SchemeNone)
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STRINGIFY(HasPassthruOperand)
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STRINGIFY(HasPolicyOperand)
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}
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return OS;
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}
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llvm::raw_ostream &operator<<(llvm::raw_ostream &OS, enum RVVRequire Require) {
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switch (Require) {
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STRINGIFY(RVV_REQ_RV64)
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STRINGIFY(RVV_REQ_Zvfhmin)
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STRINGIFY(RVV_REQ_Xsfvcp)
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STRINGIFY(RVV_REQ_Xsfvfnrclipxfqf)
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STRINGIFY(RVV_REQ_Xsfvfwmaccqqq)
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STRINGIFY(RVV_REQ_Xsfvqmaccdod)
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STRINGIFY(RVV_REQ_Xsfvqmaccqoq)
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STRINGIFY(RVV_REQ_Zvbb)
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STRINGIFY(RVV_REQ_Zvbc)
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STRINGIFY(RVV_REQ_Zvkb)
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STRINGIFY(RVV_REQ_Zvkg)
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STRINGIFY(RVV_REQ_Zvkned)
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STRINGIFY(RVV_REQ_Zvknha)
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STRINGIFY(RVV_REQ_Zvknhb)
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STRINGIFY(RVV_REQ_Zvksed)
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STRINGIFY(RVV_REQ_Zvksh)
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STRINGIFY(RVV_REQ_Zvfbfwma)
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STRINGIFY(RVV_REQ_Zvfbfmin)
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STRINGIFY(RVV_REQ_Zvfh)
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STRINGIFY(RVV_REQ_Experimental)
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default:
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llvm_unreachable("Unsupported RVVRequire!");
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break;
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}
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return OS;
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}
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#undef STRINGIFY
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llvm::raw_ostream &operator<<(llvm::raw_ostream &OS,
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const RequiredExtensions &Exts) {
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OS << "{";
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ListSeparator LS;
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for (unsigned I = 0; I < RVV_REQ_NUM; I++)
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if (Exts[I])
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OS << LS << static_cast<RVVRequire>(I);
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OS << "}";
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return OS;
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}
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raw_ostream &operator<<(raw_ostream &OS, const RVVIntrinsicRecord &Record) {
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OS << "{";
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OS << "/*Name=*/\"" << Record.Name << "\", ";
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OS << "\"" << Record.Name << "\",";
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if (Record.OverloadedName == nullptr ||
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StringRef(Record.OverloadedName).empty())
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OS << "/*OverloadedName=*/nullptr, ";
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OS << "nullptr,";
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else
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OS << "/*OverloadedName=*/\"" << Record.OverloadedName << "\", ";
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OS << "/*RequiredExtensions=*/" << Record.RequiredExtensions << ", ";
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OS << "/*PrototypeIndex=*/" << Record.PrototypeIndex << ", ";
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OS << "/*SuffixIndex=*/" << Record.SuffixIndex << ", ";
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OS << "/*OverloadedSuffixIndex=*/" << Record.OverloadedSuffixIndex << ", ";
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OS << "/*PrototypeLength=*/" << (int)Record.PrototypeLength << ", ";
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OS << "/*SuffixLength=*/" << (int)Record.SuffixLength << ", ";
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OS << "/*OverloadedSuffixSize=*/" << (int)Record.OverloadedSuffixSize << ", ";
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OS << "/*TypeRangeMask=*/" << (int)Record.TypeRangeMask << ", ";
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OS << "/*Log2LMULMask=*/" << (int)Record.Log2LMULMask << ", ";
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OS << "/*NF=*/" << (int)Record.NF << ", ";
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OS << "/*HasMasked=*/" << (int)Record.HasMasked << ", ";
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OS << "/*HasVL=*/" << (int)Record.HasVL << ", ";
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OS << "/*HasMaskedOffOperand=*/" << (int)Record.HasMaskedOffOperand << ", ";
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OS << "/*HasTailPolicy=*/" << (int)Record.HasTailPolicy << ", ";
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OS << "/*HasMaskPolicy=*/" << (int)Record.HasMaskPolicy << ", ";
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OS << "/*HasFRMRoundModeOp=*/" << (int)Record.HasFRMRoundModeOp << ", ";
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OS << "/*IsTuple=*/" << (int)Record.IsTuple << ", ";
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OS << "/*UnMaskedPolicyScheme=*/" << (PolicyScheme)Record.UnMaskedPolicyScheme
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<< ", ";
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OS << "/*MaskedPolicyScheme=*/" << (PolicyScheme)Record.MaskedPolicyScheme
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<< ", ";
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OS << "\"" << Record.OverloadedName << "\",";
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OS << "{";
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for (uint32_t Exts : Record.RequiredExtensions)
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OS << Exts << ',';
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OS << "},";
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OS << Record.PrototypeIndex << ",";
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OS << Record.SuffixIndex << ",";
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OS << Record.OverloadedSuffixIndex << ",";
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OS << (int)Record.PrototypeLength << ",";
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OS << (int)Record.SuffixLength << ",";
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OS << (int)Record.OverloadedSuffixSize << ",";
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OS << (int)Record.TypeRangeMask << ",";
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OS << (int)Record.Log2LMULMask << ",";
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OS << (int)Record.NF << ",";
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OS << (int)Record.HasMasked << ",";
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OS << (int)Record.HasVL << ",";
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OS << (int)Record.HasMaskedOffOperand << ",";
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OS << (int)Record.HasTailPolicy << ",";
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OS << (int)Record.HasMaskPolicy << ",";
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OS << (int)Record.HasFRMRoundModeOp << ",";
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OS << (int)Record.IsTuple << ",";
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OS << (int)Record.UnMaskedPolicyScheme << ",";
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OS << (int)Record.MaskedPolicyScheme << ",";
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OS << "},\n";
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return OS;
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}
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@ -45,7 +45,7 @@ struct SemaRecord {
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unsigned Log2LMULMask;
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// Required extensions for this intrinsic.
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RequiredExtensions RequiredExtensions;
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uint32_t RequiredExtensions[(RVV_REQ_NUM + 31) / 32];
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// Prototype for this intrinsic.
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SmallVector<PrototypeDescriptor> Prototype;
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@ -769,6 +769,7 @@ void RVVEmitter::createRVVIntrinsics(
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SR.Log2LMULMask = Log2LMULMask;
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memset(SR.RequiredExtensions, 0, sizeof(SR.RequiredExtensions));
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for (auto RequiredFeature : RequiredFeatures) {
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unsigned RequireExt =
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StringSwitch<RVVRequire>(RequiredFeature)
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@ -792,7 +793,7 @@ void RVVEmitter::createRVVIntrinsics(
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.Case("Zvfbfmin", RVV_REQ_Zvfbfmin)
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.Case("Zvfh", RVV_REQ_Zvfh)
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.Case("Experimental", RVV_REQ_Experimental);
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SR.RequiredExtensions.set(RequireExt);
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SR.RequiredExtensions[RequireExt / 32] |= 1U << (RequireExt % 32);
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}
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SR.NF = NF;
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@ -836,7 +837,8 @@ void RVVEmitter::createRVVIntrinsicRecords(std::vector<RVVIntrinsicRecord> &Out,
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R.PrototypeLength = SR.Prototype.size();
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R.SuffixLength = SR.Suffix.size();
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R.OverloadedSuffixSize = SR.OverloadedSuffix.size();
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R.RequiredExtensions = SR.RequiredExtensions;
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memcpy(R.RequiredExtensions, SR.RequiredExtensions,
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sizeof(R.RequiredExtensions));
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R.TypeRangeMask = SR.TypeRangeMask;
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R.Log2LMULMask = SR.Log2LMULMask;
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R.NF = SR.NF;
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