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[SLP]Synchronize cost of gather/buildvector nodes with codegen
If the buildvector node contains constants and non-constants, need to consider shuffling of the constant vec and insertion of unique elements into the vector. Also, if there is an input vector, need to consider the cost of shuffling source vector and constant vector and then insertion and shuffling of the non-constant elements. Reviewers: hiraditya, RKSimon Reviewed By: RKSimon Pull Request: https://github.com/llvm/llvm-project/pull/135245
This commit is contained in:
Alexey Bataev
GitHub
parent
8fc2538f33
commit
33af951f3f
@ -15358,15 +15358,14 @@ InstructionCost BoUpSLP::getGatherCost(ArrayRef<Value *> VL, bool ForPoisonSrc,
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constexpr TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput;
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InstructionCost Cost;
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auto EstimateInsertCost = [&](unsigned I, Value *V) {
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if (V->getType() != ScalarTy) {
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DemandedElements.setBit(I);
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if (V->getType() != ScalarTy)
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Cost += TTI->getCastInstrCost(Instruction::Trunc, ScalarTy, V->getType(),
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TTI::CastContextHint::None, CostKind);
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V = nullptr;
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}
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if (!ForPoisonSrc)
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DemandedElements.setBit(I);
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};
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SmallVector<int> ShuffleMask(VL.size(), PoisonMaskElem);
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SmallVector<int> ConstantShuffleMask(VL.size(), PoisonMaskElem);
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std::iota(ConstantShuffleMask.begin(), ConstantShuffleMask.end(), 0);
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for (unsigned I = 0, E = VL.size(); I < E; ++I) {
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Value *V = VL[I];
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// No need to shuffle duplicates for constants.
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@ -15376,6 +15375,11 @@ InstructionCost BoUpSLP::getGatherCost(ArrayRef<Value *> VL, bool ForPoisonSrc,
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continue;
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}
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if (isConstant(V)) {
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ConstantShuffleMask[I] = I + E;
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ShuffleMask[I] = I;
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continue;
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}
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auto Res = UniqueElements.try_emplace(V, I);
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if (Res.second) {
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EstimateInsertCost(I, V);
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@ -15387,18 +15391,28 @@ InstructionCost BoUpSLP::getGatherCost(ArrayRef<Value *> VL, bool ForPoisonSrc,
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ShuffledElements.setBit(I);
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ShuffleMask[I] = Res.first->second;
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}
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if (ForPoisonSrc) {
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Cost = getScalarizationOverhead(*TTI, ScalarTy, VecTy,
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/*DemandedElts*/ ~ShuffledElements,
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/*Insert*/ true,
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/*Extract*/ false, CostKind,
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/*ForPoisonSrc=*/true, VL);
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} else if (!DemandedElements.isZero()) {
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// FIXME: add a cost for constant vector materialization.
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bool IsAnyNonUndefConst =
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any_of(VL, [](Value *V) { return !isa<UndefValue>(V) && isConstant(V); });
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// 1. Shuffle input source vector and constant vector.
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if (!ForPoisonSrc && IsAnyNonUndefConst) {
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Cost += ::getShuffleCost(*TTI, TargetTransformInfo::SK_PermuteTwoSrc, VecTy,
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ConstantShuffleMask);
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for (auto [Idx, I] : enumerate(ShuffleMask)) {
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if (I == PoisonMaskElem)
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I = Idx;
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else
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I += VL.size();
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}
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}
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// 2. Insert unique non-constants.
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if (!DemandedElements.isZero())
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Cost += getScalarizationOverhead(*TTI, ScalarTy, VecTy, DemandedElements,
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/*Insert=*/true,
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/*Extract=*/false, CostKind,
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/*ForPoisonSrc=*/false, VL);
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}
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ForPoisonSrc && !IsAnyNonUndefConst, VL);
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// 3. Shuffle duplicates.
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if (DuplicateNonConst)
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Cost += ::getShuffleCost(*TTI, TargetTransformInfo::SK_PermuteSingleSrc,
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VecTy, ShuffleMask);
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@ -114,13 +114,13 @@ define void @fun2(ptr %0, ptr %Dst) {
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; CHECK: [[BB4]]:
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; CHECK-NEXT: ret void
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; CHECK: [[BB5]]:
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[DST]], i64 24
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; CHECK-NEXT: store i64 [[TMP2]], ptr [[TMP6]], align 8
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; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[DST]], i64 16
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; CHECK-NEXT: store i64 0, ptr [[TMP7]], align 8
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i64> <i64 0, i64 poison>, i64 [[TMP2]], i32 1
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; CHECK-NEXT: store <2 x i64> [[TMP8]], ptr [[TMP7]], align 8
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; CHECK-NEXT: br label %[[BB4]]
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;
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; REMARK-NOT: Function: fun2
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; Looks like there is bug in TTI, where insertion into index 1 is free, while insertion in to index 0 is 1.
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; REMARK: Function: fun2
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%3 = load i64, ptr %0, align 8
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%4 = icmp eq i64 %3, 0
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@ -520,22 +520,36 @@ define i1 @ExtractIdxNotConstantInt2(float %a, float %b, float %c, <4 x float> %
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define i1 @foo(float %a, float %b, float %c, <4 x float> %vec, i64 %idx2) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: [[VECEXT_I291_I166:%.*]] = extractelement <4 x float> [[VEC:%.*]], i64 0
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; CHECK-NEXT: [[SUB14_I167:%.*]] = fsub float undef, [[VECEXT_I291_I166]]
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[C:%.*]], i32 1
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; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[VEC]], <4 x float> poison, <2 x i32> <i32 poison, i32 1>
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; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x float> [[TMP3]], float [[SUB14_I167]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x float> [[TMP2]], [[TMP4]]
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; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x float> <float poison, float 3.000000e+01>, float [[B:%.*]], i32 0
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; CHECK-NEXT: [[TMP7:%.*]] = fsub <2 x float> [[TMP5]], [[TMP6]]
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; CHECK-NEXT: [[TMP8:%.*]] = fadd <2 x float> [[TMP7]], <float 1.000000e+01, float 2.000000e+00>
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; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x float> [[TMP8]], i32 0
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; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x float> [[TMP8]], i32 1
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; CHECK-NEXT: [[MUL123_I184:%.*]] = fmul float [[TMP9]], [[TMP10]]
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; CHECK-NEXT: [[CMP_I185:%.*]] = fcmp ogt float [[MUL123_I184]], 0.000000e+00
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; CHECK-NEXT: ret i1 [[CMP_I185]]
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; SSE-LABEL: @foo(
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; SSE-NEXT: [[VECEXT_I291_I166:%.*]] = extractelement <4 x float> [[VEC:%.*]], i64 0
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; SSE-NEXT: [[SUB14_I167:%.*]] = fsub float undef, [[VECEXT_I291_I166]]
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; SSE-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i32 0
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; SSE-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[C:%.*]], i32 1
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; SSE-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[VEC]], <4 x float> poison, <2 x i32> <i32 poison, i32 1>
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; SSE-NEXT: [[TMP4:%.*]] = insertelement <2 x float> [[TMP3]], float [[SUB14_I167]], i32 0
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; SSE-NEXT: [[TMP5:%.*]] = fmul <2 x float> [[TMP2]], [[TMP4]]
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; SSE-NEXT: [[TMP6:%.*]] = insertelement <2 x float> <float poison, float 3.000000e+01>, float [[B:%.*]], i32 0
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; SSE-NEXT: [[TMP7:%.*]] = fsub <2 x float> [[TMP5]], [[TMP6]]
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; SSE-NEXT: [[TMP8:%.*]] = fadd <2 x float> [[TMP7]], <float 1.000000e+01, float 2.000000e+00>
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; SSE-NEXT: [[TMP9:%.*]] = extractelement <2 x float> [[TMP8]], i32 0
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; SSE-NEXT: [[TMP10:%.*]] = extractelement <2 x float> [[TMP8]], i32 1
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; SSE-NEXT: [[MUL123_I184:%.*]] = fmul float [[TMP9]], [[TMP10]]
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; SSE-NEXT: [[CMP_I185:%.*]] = fcmp ogt float [[MUL123_I184]], 0.000000e+00
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; SSE-NEXT: ret i1 [[CMP_I185]]
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;
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; AVX-LABEL: @foo(
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; AVX-NEXT: [[VECEXT_I291_I166:%.*]] = extractelement <4 x float> [[VEC:%.*]], i64 0
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; AVX-NEXT: [[SUB14_I167:%.*]] = fsub float undef, [[VECEXT_I291_I166]]
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; AVX-NEXT: [[FM:%.*]] = fmul float [[A:%.*]], [[SUB14_I167]]
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; AVX-NEXT: [[SUB25_I168:%.*]] = fsub float [[FM]], [[B:%.*]]
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; AVX-NEXT: [[VECEXT_I276_I169:%.*]] = extractelement <4 x float> [[VEC]], i64 1
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; AVX-NEXT: [[ADD36_I173:%.*]] = fadd float [[SUB25_I168]], 1.000000e+01
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; AVX-NEXT: [[MUL72_I179:%.*]] = fmul float [[C:%.*]], [[VECEXT_I276_I169]]
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; AVX-NEXT: [[ADD78_I180:%.*]] = fsub float [[MUL72_I179]], 3.000000e+01
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; AVX-NEXT: [[ADD79_I181:%.*]] = fadd float 2.000000e+00, [[ADD78_I180]]
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; AVX-NEXT: [[MUL123_I184:%.*]] = fmul float [[ADD36_I173]], [[ADD79_I181]]
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; AVX-NEXT: [[CMP_I185:%.*]] = fcmp ogt float [[MUL123_I184]], 0.000000e+00
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; AVX-NEXT: ret i1 [[CMP_I185]]
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;
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%vecext.i291.i166 = extractelement <4 x float> %vec, i64 0
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%sub14.i167 = fsub float undef, %vecext.i291.i166
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@ -26,9 +26,8 @@ define void @foo(ptr %arg) {
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; CHECK-NEXT: [[PHI:%.*]] = phi float [ 4.000000e+00, %[[BB]] ], [ 0.000000e+00, %[[BB27:.*]] ]
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; CHECK-NEXT: [[FADD8:%.*]] = fadd float 0.000000e+00, 0.000000e+00
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; CHECK-NEXT: [[FADD9:%.*]] = fadd float [[PHI]], 1.000000e+00
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x float> <float poison, float 0.000000e+00>, float [[FADD9]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x float> <float 1.000000e+00, float 0.000000e+00>, [[TMP0]]
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; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x float> [[TMP1]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = fadd float [[FADD9]], 1.000000e+00
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; CHECK-NEXT: [[FADD11:%.*]] = fadd float 0.000000e+00, 0.000000e+00
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; CHECK-NEXT: [[FREM:%.*]] = frem float [[TMP2]], 7.000000e+00
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; CHECK-NEXT: [[CALL12:%.*]] = call i32 @llvm.x86.sse.cvttss2si(<4 x float> zeroinitializer)
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; CHECK-NEXT: switch i32 [[CALL12]], label %[[BB13:.*]] [
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@ -60,7 +59,6 @@ define void @foo(ptr %arg) {
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; CHECK-NEXT: br label %[[BB20:.*]]
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; CHECK: [[BB20]]:
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; CHECK-NEXT: [[FADD21:%.*]] = fadd float [[FADD18]], 1.000000e+00
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x float> <float poison, float 0.000000e+00>, float [[FADD21]], i32 0
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; CHECK-NEXT: switch i32 0, label %[[BB22:.*]] [
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; CHECK-NEXT: i32 125, label %[[BB30]]
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; CHECK-NEXT: i32 98, label %[[BB30]]
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@ -71,8 +69,8 @@ define void @foo(ptr %arg) {
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; CHECK-NEXT: i32 121, label %[[BB30]]
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; CHECK-NEXT: ]
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; CHECK: [[BB22]]:
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; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x float> <float 1.000000e+00, float 0.000000e+00>, [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x float> [[TMP4]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = fadd float [[FADD21]], 1.000000e+00
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; CHECK-NEXT: [[TMP6:%.*]] = fadd float 0.000000e+00, 0.000000e+00
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; CHECK-NEXT: [[FREM25:%.*]] = frem float [[TMP5]], 7.000000e+00
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; CHECK-NEXT: [[FMUL26:%.*]] = fmul float [[FREM25]], 5.000000e+00
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; CHECK-NEXT: switch i32 0, label %[[BB27]] [
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@ -86,11 +84,11 @@ define void @foo(ptr %arg) {
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; CHECK-NEXT: ]
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; CHECK: [[BB27]]:
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; CHECK-NEXT: [[FADD28:%.*]] = fadd float [[TMP5]], 1.000000e+00
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; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[TMP4]], i32 1
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; CHECK-NEXT: [[FADD29:%.*]] = fadd float [[TMP6]], 0.000000e+00
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; CHECK-NEXT: br label %[[BB7]]
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; CHECK: [[BB30]]:
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; CHECK-NEXT: [[TMP7:%.*]] = phi <2 x float> [ [[TMP1]], %[[BB7]] ], [ [[TMP1]], %[[BB7]] ], [ [[TMP1]], %[[BB7]] ], [ [[TMP1]], %[[BB7]] ], [ [[TMP1]], %[[BB7]] ], [ [[TMP1]], %[[BB7]] ], [ [[TMP1]], %[[BB7]] ], [ zeroinitializer, %[[BB13]] ], [ zeroinitializer, %[[BB13]] ], [ zeroinitializer, %[[BB13]] ], [ zeroinitializer, %[[BB13]] ], [ zeroinitializer, %[[BB13]] ], [ zeroinitializer, %[[BB13]] ], [ zeroinitializer, %[[BB13]] ], [ [[TMP3]], %[[BB20]] ], [ [[TMP3]], %[[BB20]] ], [ [[TMP3]], %[[BB20]] ], [ [[TMP3]], %[[BB20]] ], [ [[TMP3]], %[[BB20]] ], [ [[TMP3]], %[[BB20]] ], [ [[TMP3]], %[[BB20]] ], [ [[TMP4]], %[[BB22]] ], [ [[TMP4]], %[[BB22]] ], [ [[TMP4]], %[[BB22]] ], [ [[TMP4]], %[[BB22]] ], [ [[TMP4]], %[[BB22]] ], [ [[TMP4]], %[[BB22]] ], [ [[TMP4]], %[[BB22]] ]
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; CHECK-NEXT: [[PHI31:%.*]] = phi float [ [[TMP2]], %[[BB7]] ], [ [[TMP2]], %[[BB7]] ], [ [[TMP2]], %[[BB7]] ], [ [[TMP2]], %[[BB7]] ], [ [[TMP2]], %[[BB7]] ], [ [[TMP2]], %[[BB7]] ], [ [[TMP2]], %[[BB7]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ [[FADD21]], %[[BB20]] ], [ [[FADD21]], %[[BB20]] ], [ [[FADD21]], %[[BB20]] ], [ [[FADD21]], %[[BB20]] ], [ [[FADD21]], %[[BB20]] ], [ [[FADD21]], %[[BB20]] ], [ [[FADD21]], %[[BB20]] ], [ [[TMP5]], %[[BB22]] ], [ [[TMP5]], %[[BB22]] ], [ [[TMP5]], %[[BB22]] ], [ [[TMP5]], %[[BB22]] ], [ [[TMP5]], %[[BB22]] ], [ [[TMP5]], %[[BB22]] ], [ [[TMP5]], %[[BB22]] ]
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; CHECK-NEXT: [[PHI32:%.*]] = phi float [ [[FADD11]], %[[BB7]] ], [ [[FADD11]], %[[BB7]] ], [ [[FADD11]], %[[BB7]] ], [ [[FADD11]], %[[BB7]] ], [ [[FADD11]], %[[BB7]] ], [ [[FADD11]], %[[BB7]] ], [ [[FADD11]], %[[BB7]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB13]] ], [ 0.000000e+00, %[[BB20]] ], [ 0.000000e+00, %[[BB20]] ], [ 0.000000e+00, %[[BB20]] ], [ 0.000000e+00, %[[BB20]] ], [ 0.000000e+00, %[[BB20]] ], [ 0.000000e+00, %[[BB20]] ], [ 0.000000e+00, %[[BB20]] ], [ [[TMP6]], %[[BB22]] ], [ [[TMP6]], %[[BB22]] ], [ [[TMP6]], %[[BB22]] ], [ [[TMP6]], %[[BB22]] ], [ [[TMP6]], %[[BB22]] ], [ [[TMP6]], %[[BB22]] ], [ [[TMP6]], %[[BB22]] ]
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; CHECK-NEXT: ret void
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;
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bb:
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@ -5,28 +5,37 @@ define void @test(i32 %arg) {
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; CHECK-LABEL: define void @test(
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; CHECK-SAME: i32 [[ARG:%.*]]) {
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; CHECK-NEXT: [[BB:.*]]:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> <i32 poison, i32 0>, i32 [[ARG]], i32 0
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; CHECK-NEXT: br label %[[BB1:.*]]
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; CHECK: [[BB1]]:
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP5:%.*]], %[[BB1]] ]
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; CHECK-NEXT: [[PHI2:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP6:%.*]], %[[BB1]] ]
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; CHECK-NEXT: [[PHI3:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[OP_RDX4:%.*]], %[[BB1]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x i32> [ zeroinitializer, %[[BB]] ], [ [[TMP4:%.*]], %[[BB1]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> poison, <8 x i32> <i32 0, i32 0, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0>
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; CHECK-NEXT: [[PHI2:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[ADD24:%.*]], %[[BB1]] ]
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; CHECK-NEXT: [[PHI3:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[XOR26:%.*]], %[[BB1]] ]
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[ADD]], [[ADD4]]
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; CHECK-NEXT: [[ADD23:%.*]] = add i32 [[PHI]], 0
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; CHECK-NEXT: [[ADD6:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i32> [[TMP2]], zeroinitializer
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; CHECK-NEXT: [[TMP4]] = add <2 x i32> [[TMP0]], <i32 0, i32 1>
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; CHECK-NEXT: [[TMP5]] = extractelement <2 x i32> [[TMP4]], i32 1
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; CHECK-NEXT: [[TMP6]] = extractelement <2 x i32> [[TMP4]], i32 0
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; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> [[TMP3]])
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; CHECK-NEXT: [[OP_RDX:%.*]] = xor i32 [[TMP7]], [[ADD]]
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; CHECK-NEXT: [[OP_RDX1:%.*]] = xor i32 [[ADD4]], [[ADD6]]
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; CHECK-NEXT: [[OP_RDX2:%.*]] = xor i32 [[ADD23]], [[TMP6]]
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; CHECK-NEXT: [[ADD7:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[XOR8:%.*]] = xor i32 [[ADD6]], [[XOR]]
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; CHECK-NEXT: [[XOR9:%.*]] = xor i32 [[XOR8]], [[ADD23]]
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; CHECK-NEXT: [[OP_RDX1:%.*]] = xor i32 [[XOR9]], [[ADD7]]
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; CHECK-NEXT: [[OP_RDX2:%.*]] = add i32 [[PHI]], 0
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; CHECK-NEXT: [[OP_RDX:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[ADD13:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[OP_RDX3:%.*]] = xor i32 [[OP_RDX]], [[OP_RDX1]]
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; CHECK-NEXT: [[OP_RDX4]] = xor i32 [[OP_RDX3]], [[OP_RDX2]]
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; CHECK-NEXT: [[OP_RDX4:%.*]] = xor i32 [[OP_RDX3]], [[OP_RDX2]]
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; CHECK-NEXT: [[XOR16:%.*]] = xor i32 [[OP_RDX4]], [[ADD13]]
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; CHECK-NEXT: [[ADD17:%.*]] = add i32 [[PHI]], 0
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; CHECK-NEXT: [[ADD18:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[ADD19:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[XOR20:%.*]] = xor i32 [[ADD18]], [[XOR16]]
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; CHECK-NEXT: [[XOR21:%.*]] = xor i32 [[XOR20]], [[ADD17]]
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; CHECK-NEXT: [[XOR22:%.*]] = xor i32 [[XOR21]], [[ADD19]]
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; CHECK-NEXT: [[ADD25:%.*]] = add i32 [[PHI2]], 0
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; CHECK-NEXT: [[ADD24]] = add i32 [[ARG]], 0
|
||||
; CHECK-NEXT: [[XOR25:%.*]] = xor i32 [[ADD25]], [[XOR22]]
|
||||
; CHECK-NEXT: [[XOR26]] = xor i32 [[XOR25]], [[ADD24]]
|
||||
; CHECK-NEXT: [[TMP5]] = add i32 1, 0
|
||||
; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i32 [[TMP5]], 0
|
||||
; CHECK-NEXT: br label %[[BB1]]
|
||||
;
|
||||
|
||||
@ -5,21 +5,21 @@ define void @test(i32 %0, ptr %p) {
|
||||
; CHECK-LABEL: define void @test(
|
||||
; CHECK-SAME: i32 [[TMP0:%.*]], ptr [[P:%.*]]) {
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> <i32 0, i32 poison, i32 0, i32 0>, i32 [[TMP0]], i32 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i32> [[TMP1]], <i32 1, i32 0, i32 1, i32 1>
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0]], 0
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> <i32 0, i32 0, i32 0, i32 poison>, i32 [[TMP0]], i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = xor <4 x i32> [[TMP1]], <i32 1, i32 1, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP5]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
|
||||
; CHECK-NEXT: [[OP_RDX:%.*]] = extractelement <8 x i32> [[TMP8]], i32 3
|
||||
; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[PH:%.*]]
|
||||
; CHECK: ph:
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> <i32 0, i32 0, i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0>, i32 [[TMP0]], i32 2
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 poison, i32 0, i32 0, i32 0>, i32 [[TMP0]], i32 4
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = phi <8 x i32> [ [[TMP8]], [[ENTRY:%.*]] ], [ [[TMP6]], [[PH]] ]
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = phi <4 x i32> [ [[TMP5]], [[ENTRY]] ], [ zeroinitializer, [[PH]] ]
|
||||
; CHECK-NEXT: [[OP_RDX:%.*]] = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> [[TMP9]])
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP7]])
|
||||
; CHECK-NEXT: [[OP_RDX5:%.*]] = or i32 [[TMP10]], [[TMP3]]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = call <4 x i32> @llvm.vector.extract.v4i32.v8i32(<8 x i32> [[TMP9]], i64 0)
|
||||
; CHECK-NEXT: [[RDX_OP:%.*]] = or <4 x i32> [[TMP10]], [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = call <8 x i32> @llvm.vector.insert.v8i32.v4i32(<8 x i32> [[TMP9]], <4 x i32> [[RDX_OP]], i64 0)
|
||||
; CHECK-NEXT: [[OP_RDX5:%.*]] = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> [[TMP11]])
|
||||
; CHECK-NEXT: [[OP_RDX2:%.*]] = or i32 [[OP_RDX5]], [[OP_RDX]]
|
||||
; CHECK-NEXT: store i32 [[OP_RDX2]], ptr [[P]], align 4
|
||||
; CHECK-NEXT: ret void
|
||||
|
||||
@ -4,10 +4,12 @@
|
||||
define i1 @src(i1 %cmp4.118.i) {
|
||||
; CHECK-LABEL: define i1 @src(
|
||||
; CHECK-SAME: i1 [[CMP4_118_I:%.*]]) {
|
||||
; CHECK-NEXT: [[CMP4_118_I_NOT:%.*]] = xor i1 [[CMP4_118_I]], true
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = freeze <4 x i1> poison
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i1> <i1 poison, i1 true, i1 true, i1 true>, i1 [[CMP4_118_I]], i32 0
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = xor <4 x i1> [[TMP4]], <i1 true, i1 poison, i1 poison, i1 poison>
|
||||
; CHECK-NEXT: [[DOTNOT7:%.*]] = xor i1 poison, true
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = freeze <4 x i1> [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP1]])
|
||||
; CHECK-NEXT: [[OP_RDX:%.*]] = select i1 [[CMP4_118_I_NOT]], i1 true, i1 [[TMP2]]
|
||||
; CHECK-NEXT: [[OP_RDX:%.*]] = select i1 [[TMP2]], i1 true, i1 [[DOTNOT7]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = freeze i1 [[OP_RDX]]
|
||||
; CHECK-NEXT: [[OP_RDX1:%.*]] = select i1 [[TMP3]], i1 true, i1 poison
|
||||
; CHECK-NEXT: ret i1 [[OP_RDX1]]
|
||||
|
||||
@ -4,12 +4,12 @@
|
||||
define i32 @test(ptr %isec, float %0) {
|
||||
; CHECK-LABEL: @test(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x float>, ptr [[ISEC:%.*]], align 4
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> <float 0.000000e+00, float poison>, float [[TMP0:%.*]], i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = fmul fast <2 x float> [[TMP2]], [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[ISEC:%.*]], align 4
|
||||
; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, ptr [[ISEC]], i64 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[ARRAYIDX10]], align 4
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = fmul fast float [[TMP0:%.*]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = fmul fast float 0.000000e+00, [[TMP1]]
|
||||
; CHECK-NEXT: [[CMP61:%.*]] = fcmp fast oge float 0.000000e+00, 0.000000e+00
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x float> [[TMP3]], i32 1
|
||||
; CHECK-NEXT: [[CMP63:%.*]] = fcmp fast ogt float [[TMP4]], [[TMP5]]
|
||||
; CHECK-NEXT: br i1 [[CMP63]], label [[CLEANUP:%.*]], label [[IF_END:%.*]]
|
||||
; CHECK: if.end:
|
||||
|
||||
@ -6,42 +6,45 @@ define void @test(ptr %p1, ptr %0, i32 %1, i1 %c1, ptr %p2) {
|
||||
; CHECK-SAME: ptr [[P1:%.*]], ptr [[TMP0:%.*]], i32 [[TMP1:%.*]], i1 [[C1:%.*]], ptr [[P2:%.*]]) {
|
||||
; CHECK-NEXT: [[TOP:.*:]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i64 8
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP0]], i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x ptr> [[TMP3]], <4 x ptr> poison, <4 x i32> zeroinitializer
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, <4 x ptr> [[TMP4]], <4 x i64> <i64 8, i64 12, i64 16, i64 20>
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x ptr> [[TMP5]], i32 2
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i64 12
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i64 16
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i64 20
|
||||
; CHECK-NEXT: br i1 [[C1]], label %[[L42:.*]], label %[[L41:.*]]
|
||||
; CHECK: [[L41]]:
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = icmp eq <4 x ptr> [[TMP5]], zeroinitializer
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = select <4 x i1> [[TMP7]], <4 x i32> zeroinitializer, <4 x i32> [[TMP8]]
|
||||
; CHECK-NEXT: [[DOTNOT276:%.*]] = icmp eq ptr [[TMP2]], null
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP2]], align 4
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[DOTNOT276]], i32 0, i32 [[TMP10]]
|
||||
; CHECK-NEXT: [[DOTNOT277:%.*]] = icmp eq ptr [[TMP12]], null
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP12]], align 4
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[DOTNOT277]], i32 0, i32 [[TMP8]]
|
||||
; CHECK-NEXT: [[DOTNOT278:%.*]] = icmp eq ptr [[TMP4]], null
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP4]], align 4
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[DOTNOT278]], i32 0, i32 [[TMP15]]
|
||||
; CHECK-NEXT: [[DOTNOT279:%.*]] = icmp eq ptr [[TMP5]], null
|
||||
; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP5]], align 4
|
||||
; CHECK-NEXT: [[TMP25:%.*]] = select i1 [[DOTNOT279]], i32 0, i32 [[TMP20]]
|
||||
; CHECK-NEXT: br label %[[L112:.*]]
|
||||
; CHECK: [[L42]]:
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP2]], align 4
|
||||
; CHECK-NEXT: [[DOTNOT280:%.*]] = icmp eq i32 [[TMP10]], 0
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> <i32 0, i32 0, i32 poison, i32 0>, i32 [[TMP1]], i32 2
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP2]], align 4
|
||||
; CHECK-NEXT: [[DOTNOT280:%.*]] = icmp eq i32 [[TMP14]], 0
|
||||
; CHECK-NEXT: br i1 [[DOTNOT280]], label %[[L112]], label %[[L47:.*]]
|
||||
; CHECK: [[L47]]:
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x ptr> [[TMP5]], i32 1
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
|
||||
; CHECK-NEXT: [[TMP25:%.*]] = insertelement <2 x ptr> poison, ptr [[TMP6]], i32 0
|
||||
; CHECK-NEXT: [[TMP26:%.*]] = shufflevector <4 x ptr> [[TMP5]], <4 x ptr> poison, <2 x i32> <i32 poison, i32 3>
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <2 x ptr> [[TMP25]], <2 x ptr> [[TMP26]], <2 x i32> <i32 0, i32 3>
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <2 x ptr> [[TMP14]], zeroinitializer
|
||||
; CHECK-NEXT: [[TMP16:%.*]] = load <2 x i32>, ptr [[TMP6]], align 4
|
||||
; CHECK-NEXT: [[TMP17:%.*]] = select <2 x i1> [[TMP15]], <2 x i32> zeroinitializer, <2 x i32> [[TMP16]]
|
||||
; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> <i32 0, i32 poison, i32 poison, i32 poison>, i32 [[TMP13]], i32 1
|
||||
; CHECK-NEXT: [[TMP19:%.*]] = call <4 x i32> @llvm.vector.insert.v4i32.v2i32(<4 x i32> [[TMP18]], <2 x i32> [[TMP17]], i64 2)
|
||||
; CHECK-NEXT: [[DOTNOT282:%.*]] = icmp eq ptr [[TMP4]], null
|
||||
; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP4]], align 4
|
||||
; CHECK-NEXT: [[TMP17:%.*]] = select i1 [[DOTNOT282]], i32 0, i32 [[TMP16]]
|
||||
; CHECK-NEXT: [[DOTNOT283:%.*]] = icmp eq ptr [[TMP5]], null
|
||||
; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP5]], align 4
|
||||
; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[DOTNOT283]], i32 0, i32 [[TMP18]]
|
||||
; CHECK-NEXT: br label %[[L112]]
|
||||
; CHECK: [[L112]]:
|
||||
; CHECK-NEXT: [[TMP20:%.*]] = phi <4 x i32> [ [[TMP19]], %[[L47]] ], [ [[TMP9]], %[[L41]] ], [ [[TMP11]], %[[L42]] ]
|
||||
; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[TMP20]], i32 0
|
||||
; CHECK-NEXT: [[TMP24:%.*]] = phi i32 [ [[TMP19]], %[[L47]] ], [ [[TMP25]], %[[L41]] ], [ 0, %[[L42]] ]
|
||||
; CHECK-NEXT: [[TMP23:%.*]] = phi i32 [ [[TMP17]], %[[L47]] ], [ [[TMP11]], %[[L41]] ], [ [[TMP1]], %[[L42]] ]
|
||||
; CHECK-NEXT: [[TMP22:%.*]] = phi i32 [ [[TMP13]], %[[L47]] ], [ [[TMP9]], %[[L41]] ], [ 0, %[[L42]] ]
|
||||
; CHECK-NEXT: [[TMP21:%.*]] = phi i32 [ 0, %[[L47]] ], [ [[TMP7]], %[[L41]] ], [ 0, %[[L42]] ]
|
||||
; CHECK-NEXT: store i32 [[TMP21]], ptr [[P2]], align 4
|
||||
; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[TMP20]], i32 1
|
||||
; CHECK-NEXT: store i32 [[TMP22]], ptr [[P1]], align 4
|
||||
; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[TMP20]], i32 2
|
||||
; CHECK-NEXT: store i32 [[TMP23]], ptr [[P2]], align 4
|
||||
; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[TMP20]], i32 3
|
||||
; CHECK-NEXT: store i32 [[TMP24]], ptr [[P1]], align 4
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user