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[docs][RISCV] Remove outdated note about zfa implementation status

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MC layer and codegen support for fli.{h,s,d} has since been implemented.
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Alex Bradbury 2023-04-05 14:52:08 +01:00
parent 7b58259481
commit 3d969191b2
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llvm/docs/RISCVUsage.rst
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@ -188,7 +188,7 @@ The primary goal of experimental support is to assist in the process of ratifica
LLVM implements the `1.0.1 draft specification <https://github.com/riscv/riscv-code-size-reduction/releases/tag/v1.0.1>`_.
``experimental-zfa``
LLVM implements a subset of `0.1 draft specification <https://github.com/riscv/riscv-isa-manual/releases/download/draft-20221119-5234c63/riscv-spec.pdf>`_ (see Chapter 25). Load-immediate instructions (fli.s/fli.d/fli.h) haven't been implemented yet.
LLVM implements a subset of `0.1 draft specification <https://github.com/riscv/riscv-isa-manual/releases/download/draft-20221119-5234c63/riscv-spec.pdf>`_ (see Chapter 25).
``experimental-zicond``
LLVM implements the `1.0-rc1 draft specification <https://github.com/riscv/riscv-zicond/releases/tag/v1.0-rc1`>_.