[X86][GlobalISel] Reorganize br/brcond tests (NFC) (#80204)

Removing duplicating tests under GlobalISel, consolidating to perform
checks with all three selectors.
This commit is contained in:
Evgeniy 2024-02-08 02:06:22 -08:00 committed by GitHub
parent 9ac82f0d3e
commit 49ee2ffc65
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7 changed files with 2479 additions and 872 deletions

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@ -1,19 +0,0 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs %s -o - | FileCheck %s
define void @uncondbr() {
; CHECK-LABEL: uncondbr:
; CHECK: # %bb.1: # %entry
; CHECK-NEXT: jmp .LBB0_3
; CHECK-NEXT: .LBB0_2: # %end
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB0_3: # %bb2
; CHECK-NEXT: jmp .LBB0_2
entry:
br label %bb2
end:
ret void
bb2:
br label %end
}

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@ -1,91 +0,0 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X64
; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X86
define i32 @test_1(i32 %a, i32 %b, i32 %tValue, i32 %fValue) {
; X64-LABEL: test_1:
; X64: # %bb.0: # %entry
; X64-NEXT: cmpl %esi, %edi
; X64-NEXT: setl %al
; X64-NEXT: testb $1, %al
; X64-NEXT: je .LBB0_2
; X64-NEXT: # %bb.1: # %if.then
; X64-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: retq
; X64-NEXT: .LBB0_2: # %if.else
; X64-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: retq
;
; X86-LABEL: test_1:
; X86: # %bb.0: # %entry
; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: setl %al
; X86-NEXT: testb $1, %al
; X86-NEXT: je .LBB0_2
; X86-NEXT: # %bb.1: # %if.then
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: jmp .LBB0_3
; X86-NEXT: .LBB0_2: # %if.else
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .LBB0_3: # %return
; X86-NEXT: movl %eax, (%esp)
; X86-NEXT: movl (%esp), %eax
; X86-NEXT: popl %ecx
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
entry:
%retval = alloca i32, align 4
%cmp = icmp slt i32 %a, %b
br i1 %cmp, label %if.then, label %if.else
if.then:
store i32 %tValue, ptr %retval, align 4
br label %return
if.else:
store i32 %fValue, ptr %retval, align 4
br label %return
return:
%0 = load i32, ptr %retval, align 4
ret i32 %0
}
define i32 @test_2(i32 %a) {
; X64-LABEL: test_2:
; X64: # %bb.0: # %entry
; X64-NEXT: testb $1, %dil
; X64-NEXT: je .LBB1_2
; X64-NEXT: # %bb.1: # %if.then
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: retq
; X64-NEXT: .LBB1_2: # %if.else
; X64-NEXT: movl $1, %eax
; X64-NEXT: retq
;
; X86-LABEL: test_2:
; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: testb $1, %al
; X86-NEXT: je .LBB1_2
; X86-NEXT: # %bb.1: # %if.then
; X86-NEXT: xorl %eax, %eax
; X86-NEXT: retl
; X86-NEXT: .LBB1_2: # %if.else
; X86-NEXT: movl $1, %eax
; X86-NEXT: retl
entry:
%cmp = trunc i32 %a to i1
br i1 %cmp, label %if.then, label %if.else
if.then:
ret i32 0
if.else:
ret i32 1
}

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@ -1,293 +0,0 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
define i32 @fcmp_oeq(float %x, float %y) {
; CHECK-LABEL: fcmp_oeq
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jne {{LBB.+_1}}
; CHECK-NEXT: jp {{LBB.+_1}}
%1 = fcmp oeq float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ogt(float %x, float %y) {
; CHECK-LABEL: fcmp_ogt
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jbe {{LBB.+_1}}
%1 = fcmp ogt float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_oge(float %x, float %y) {
; CHECK-LABEL: fcmp_oge
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jb {{LBB.+_1}}
%1 = fcmp oge float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_olt(float %x, float %y) {
; CHECK-LABEL: fcmp_olt
; CHECK: ucomiss %xmm0, %xmm1
; CHECK-NEXT: jbe {{LBB.+_1}}
%1 = fcmp olt float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ole(float %x, float %y) {
; CHECK-LABEL: fcmp_ole
; CHECK: ucomiss %xmm0, %xmm1
; CHECK-NEXT: jb {{LBB.+_1}}
%1 = fcmp ole float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_one(float %x, float %y) {
; CHECK-LABEL: fcmp_one
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: je {{LBB.+_1}}
%1 = fcmp one float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ord(float %x, float %y) {
; CHECK-LABEL: fcmp_ord
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jp {{LBB.+_1}}
%1 = fcmp ord float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_uno(float %x, float %y) {
; CHECK-LABEL: fcmp_uno
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jp {{LBB.+_2}}
%1 = fcmp uno float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ueq(float %x, float %y) {
; CHECK-LABEL: fcmp_ueq
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: je {{LBB.+_2}}
%1 = fcmp ueq float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ugt(float %x, float %y) {
; CHECK-LABEL: fcmp_ugt
; CHECK: ucomiss %xmm0, %xmm1
; CHECK-NEXT: jae {{LBB.+_1}}
%1 = fcmp ugt float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_uge(float %x, float %y) {
; CHECK-LABEL: fcmp_uge
; CHECK: ucomiss %xmm0, %xmm1
; CHECK-NEXT: ja {{LBB.+_1}}
%1 = fcmp uge float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ult(float %x, float %y) {
; CHECK-LABEL: fcmp_ult
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jae {{LBB.+_1}}
%1 = fcmp ult float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ule(float %x, float %y) {
; CHECK-LABEL: fcmp_ule
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: ja {{LBB.+_1}}
%1 = fcmp ule float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_une(float %x, float %y) {
; CHECK-LABEL: fcmp_une
; CHECK: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jne {{LBB.+_2}}
; CHECK-NEXT: jnp {{LBB.+_1}}
%1 = fcmp une float %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_eq(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_eq
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: jne {{LBB.+_1}}
%1 = icmp eq i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_ne(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_ne
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: je {{LBB.+_1}}
%1 = icmp ne i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_ugt(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_ugt
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: jbe {{LBB.+_1}}
%1 = icmp ugt i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_uge(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_uge
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: jb {{LBB.+_1}}
%1 = icmp uge i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_ult(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_ult
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: jae {{LBB.+_1}}
%1 = icmp ult i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_ule(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_ule
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: ja {{LBB.+_1}}
%1 = icmp ule i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_sgt(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_sgt
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: jle {{LBB.+_1}}
%1 = icmp sgt i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_sge(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_sge
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: jl {{LBB.+_1}}
%1 = icmp sge i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_slt(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_slt
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: jge {{LBB.+_1}}
%1 = icmp slt i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_sle(i32 %x, i32 %y) {
; CHECK-LABEL: icmp_sle
; CHECK: cmpl %esi, %edi
; CHECK-NEXT: jg {{LBB.+_1}}
%1 = icmp sle i32 %x, %y
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}

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@ -1,469 +0,0 @@
; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
define i32 @fcmp_oeq1(float %x) {
; CHECK-LABEL: fcmp_oeq1
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jp {{LBB.+_1}}
%1 = fcmp oeq float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_oeq2(float %x) {
; CHECK-LABEL: fcmp_oeq2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jne {{LBB.+_1}}
; CHECK-NEXT: jp {{LBB.+_1}}
%1 = fcmp oeq float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ogt1(float %x) {
; CHECK-LABEL: fcmp_ogt1
; CHECK-NOT: ucomiss
; CHECK: movl $1, %eax
%1 = fcmp ogt float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ogt2(float %x) {
; CHECK-LABEL: fcmp_ogt2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jbe {{LBB.+_1}}
%1 = fcmp ogt float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_oge1(float %x) {
; CHECK-LABEL: fcmp_oge1
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jp {{LBB.+_1}}
%1 = fcmp oge float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_oge2(float %x) {
; CHECK-LABEL: fcmp_oge2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jb {{LBB.+_1}}
%1 = fcmp oge float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_olt1(float %x) {
; CHECK-LABEL: fcmp_olt1
; CHECK-NOT: ucomiss
; CHECK: movl $1, %eax
%1 = fcmp olt float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_olt2(float %x) {
; CHECK-LABEL: fcmp_olt2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm0, %xmm1
; CHECK-NEXT: jbe {{LBB.+_1}}
%1 = fcmp olt float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ole1(float %x) {
; CHECK-LABEL: fcmp_ole1
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jp {{LBB.+_1}}
%1 = fcmp ole float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ole2(float %x) {
; CHECK-LABEL: fcmp_ole2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm0, %xmm1
; CHECK-NEXT: jb {{LBB.+_1}}
%1 = fcmp ole float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_one1(float %x) {
; CHECK-LABEL: fcmp_one1
; CHECK-NOT: ucomiss
; CHECK: movl $1, %eax
%1 = fcmp one float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_one2(float %x) {
; CHECK-LABEL: fcmp_one2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm1, %xmm0
; CHECK-NEXT: je {{LBB.+_1}}
%1 = fcmp one float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ord1(float %x) {
; CHECK-LABEL: fcmp_ord1
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jp {{LBB.+_1}}
%1 = fcmp ord float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ord2(float %x) {
; CHECK-LABEL: fcmp_ord2
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jp {{LBB.+_1}}
%1 = fcmp ord float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_uno1(float %x) {
; CHECK-LABEL: fcmp_uno1
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jp {{LBB.+_2}}
%1 = fcmp uno float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_uno2(float %x) {
; CHECK-LABEL: fcmp_uno2
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jp {{LBB.+_2}}
%1 = fcmp uno float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ueq1(float %x) {
; CHECK-LABEL: fcmp_ueq1
; CHECK-NOT: ucomiss
%1 = fcmp ueq float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ueq2(float %x) {
; CHECK-LABEL: fcmp_ueq2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm1, %xmm0
; CHECK-NEXT: je {{LBB.+_2}}
%1 = fcmp ueq float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ugt1(float %x) {
; CHECK-LABEL: fcmp_ugt1
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jnp {{LBB.+_1}}
%1 = fcmp ugt float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ugt2(float %x) {
; CHECK-LABEL: fcmp_ugt2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm0, %xmm1
; CHECK-NEXT: jae {{LBB.+_1}}
%1 = fcmp ugt float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_uge1(float %x) {
; CHECK-LABEL: fcmp_uge1
; CHECK-NOT: ucomiss
%1 = fcmp uge float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_uge2(float %x) {
; CHECK-LABEL: fcmp_uge2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm0, %xmm1
; CHECK-NEXT: ja {{LBB.+_1}}
%1 = fcmp uge float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ult1(float %x) {
; CHECK-LABEL: fcmp_ult1
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jnp {{LBB.+_1}}
%1 = fcmp ult float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ult2(float %x) {
; CHECK-LABEL: fcmp_ult2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jae {{LBB.+_1}}
%1 = fcmp ult float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ule1(float %x) {
; CHECK-LABEL: fcmp_ule1
; CHECK-NOT: ucomiss
%1 = fcmp ule float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_ule2(float %x) {
; CHECK-LABEL: fcmp_ule2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm1, %xmm0
; CHECK-NEXT: ja {{LBB.+_1}}
%1 = fcmp ule float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_une1(float %x) {
; CHECK-LABEL: fcmp_une1
; CHECK: ucomiss %xmm0, %xmm0
; CHECK-NEXT: jnp {{LBB.+_1}}
%1 = fcmp une float %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @fcmp_une2(float %x) {
; CHECK-LABEL: fcmp_une2
; CHECK: xorps %xmm1, %xmm1
; CHECK-NEXT: ucomiss %xmm1, %xmm0
; CHECK-NEXT: jne {{LBB.+_2}}
; CHECK-NEXT: jnp {{LBB.+_1}}
%1 = fcmp une float %x, 0.000000e+00
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_eq(i32 %x) {
; CHECK-LABEL: icmp_eq
; CHECK-NOT: cmpl
; CHECK: xorl %eax, %eax
%1 = icmp eq i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_ne(i32 %x) {
; CHECK-LABEL: icmp_ne
; CHECK-NOT: cmpl
; CHECK: movl $1, %eax
%1 = icmp ne i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_ugt(i32 %x) {
; CHECK-LABEL: icmp_ugt
; CHECK-NOT: cmpl
; CHECK: movl $1, %eax
%1 = icmp ugt i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_uge(i32 %x) {
; CHECK-LABEL: icmp_uge
; CHECK-NOT: cmpl
; CHECK: xorl %eax, %eax
%1 = icmp uge i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_ult(i32 %x) {
; CHECK-LABEL: icmp_ult
; CHECK-NOT: cmpl
; CHECK: movl $1, %eax
%1 = icmp ult i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_ule(i32 %x) {
; CHECK-LABEL: icmp_ule
; CHECK-NOT: cmpl
; CHECK: xorl %eax, %eax
%1 = icmp ule i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_sgt(i32 %x) {
; CHECK-LABEL: icmp_sgt
; CHECK-NOT: cmpl
; CHECK: movl $1, %eax
%1 = icmp sgt i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_sge(i32 %x) {
; CHECK-LABEL: icmp_sge
; CHECK-NOT: cmpl
; CHECK: xorl %eax, %eax
%1 = icmp sge i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_slt(i32 %x) {
; CHECK-LABEL: icmp_slt
; CHECK-NOT: cmpl
; CHECK: movl $1, %eax
%1 = icmp slt i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}
define i32 @icmp_sle(i32 %x) {
; CHECK-LABEL: icmp_sle
; CHECK-NOT: cmpl
; CHECK: xorl %eax, %eax
%1 = icmp sle i32 %x, %x
br i1 %1, label %bb1, label %bb2
bb2:
ret i32 1
bb1:
ret i32 0
}

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@ -0,0 +1,31 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -O0 -mtriple=i686-linux-gnu -global-isel=0 -verify-machineinstrs | FileCheck %s --check-prefix=DAG
; RUN: llc < %s -O0 -mtriple=i686-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=DAG
; RUN: llc < %s -O0 -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 -verify-machineinstrs | FileCheck %s --check-prefix=GISEL
; RUN: llc < %s -O0 -mtriple=x86_64-linux-gnu -global-isel=0 | FileCheck %s --check-prefix=DAG
; RUN: llc < %s -O0 -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=DAG
; RUN: llc < %s -O0 -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL
define void @uncondbr() {
; DAG-LABEL: uncondbr:
; DAG: # %bb.0: # %entry
; DAG-NEXT: jmp .LBB0_2
; DAG-NEXT: .LBB0_1: # %end
; DAG-NEXT: ret{{[l|q]}}
; DAG-NEXT: .LBB0_2: # %bb2
; DAG-NEXT: jmp .LBB0_1
;
; GISEL-LABEL: uncondbr:
; GISEL: # %bb.1: # %entry
; GISEL-NEXT: jmp .LBB0_3
; GISEL-NEXT: .LBB0_2: # %end
; GISEL-NEXT: ret{{[l|q]}}
; GISEL-NEXT: .LBB0_3: # %bb2
; GISEL-NEXT: jmp .LBB0_2
entry:
br label %bb2
end:
ret void
bb2:
br label %end
}

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File diff suppressed because it is too large Load Diff