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[ARM][test] Improve stack-protector tests

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llvm/test/LTO/ARM/ssp-static-reloc.ll is more about using the static
relocation model with "PIC Level" and unrelated to the LTO infrastructure.
Move the test. Update stack_guard_remat.ll to clearly test "PIC Level"
with the relevant relocation models.
This commit is contained in:
Fangrui Song 2023-10-31 15:30:08 -07:00
parent e8c0ae60d7
commit 6ae7b735db
3 changed files with 51 additions and 46 deletions
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41
llvm/test/CodeGen/ARM/stack-guard-elf.ll Normal file
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@ -0,0 +1,41 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc -relocation-model=static < %s | FileCheck %s
target triple = "armv7a-linux-gnueabi"
define i32 @test1() #0 {
; CHECK-LABEL: test1:
; CHECK: @ %bb.0:
; CHECK-NEXT: push {r11, lr}
; CHECK-NEXT: sub sp, sp, #8
; CHECK-NEXT: sub sp, sp, #1024
; CHECK-NEXT: movw r0, :lower16:__stack_chk_guard
; CHECK-NEXT: movt r0, :upper16:__stack_chk_guard
; CHECK-NEXT: ldr r0, [r0]
; CHECK-NEXT: ldr r0, [r0]
; CHECK-NEXT: str r0, [sp, #1028]
; CHECK-NEXT: add r0, sp, #4
; CHECK-NEXT: bl foo
; CHECK-NEXT: movw r1, :lower16:__stack_chk_guard
; CHECK-NEXT: ldr r0, [sp, #1028]
; CHECK-NEXT: movt r1, :upper16:__stack_chk_guard
; CHECK-NEXT: ldr r1, [r1]
; CHECK-NEXT: ldr r1, [r1]
; CHECK-NEXT: cmp r1, r0
; CHECK-NEXT: moveq r0, #0
; CHECK-NEXT: addeq sp, sp, #8
; CHECK-NEXT: addeq sp, sp, #1024
; CHECK-NEXT: popeq {r11, pc}
; CHECK-NEXT: .LBB0_1:
; CHECK-NEXT: bl __stack_chk_fail
%a1 = alloca [256 x i32], align 4
call void @foo(ptr %a1) #3
ret i32 0
}
declare void @foo(ptr)
attributes #0 = { nounwind sspstrong }
!llvm.module.flags = !{!0}
!0 = !{i32 8, !"PIC Level", i32 2}

16
llvm/test/CodeGen/ARM/stack_guard_remat.ll
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@ -1,9 +1,11 @@
; RUN: llc < %s -mtriple=arm-apple-ios -relocation-model=pic -no-integrated-as | FileCheck %s -check-prefix=PIC
; RUN: llc < %s -mtriple=arm-apple-ios -relocation-model=static -no-integrated-as | FileCheck %s -check-prefix=NO-PIC -check-prefix=STATIC
; RUN: llc < %s -mtriple=arm-apple-ios -relocation-model=dynamic-no-pic -no-integrated-as | FileCheck %s -check-prefix=NO-PIC -check-prefix=DYNAMIC-NO-PIC
; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 -relocation-model=pic -no-integrated-as | FileCheck %s -check-prefix=PIC-V7
; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 -relocation-model=static -no-integrated-as | FileCheck %s -check-prefix=STATIC-V7
; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 -relocation-model=dynamic-no-pic -no-integrated-as | FileCheck %s -check-prefix=DYNAMIC-NO-PIC-V7
; RUN: rm -rf %t && split-file %s %t && cd %t
; RUN: cat main.ll pic-flag.ll > pic.ll
; RUN: llc < pic.ll -mtriple=arm-apple-ios -relocation-model=pic -no-integrated-as | FileCheck %s -check-prefix=PIC
; RUN: llc < main.ll -mtriple=arm-apple-ios -relocation-model=static -no-integrated-as | FileCheck %s -check-prefix=NO-PIC -check-prefix=STATIC
; RUN: llc < main.ll -mtriple=arm-apple-ios -relocation-model=dynamic-no-pic -no-integrated-as | FileCheck %s -check-prefixes=NO-PIC,DYNAMIC-NO-PIC
; RUN: llc < pic.ll -mtriple=armv7-apple-ios -mcpu=cortex-a8 -relocation-model=pic -no-integrated-as | FileCheck %s -check-prefix=PIC-V7
; RUN: llc < main.ll -mtriple=armv7-apple-ios -mcpu=cortex-a8 -relocation-model=static -no-integrated-as | FileCheck %s -check-prefix=STATIC-V7
; RUN: llc < main.ll -mtriple=armv7-apple-ios -mcpu=cortex-a8 -relocation-model=dynamic-no-pic -no-integrated-as | FileCheck %s -check-prefix=DYNAMIC-NO-PIC-V7
;PIC: foo2
;PIC: ldr [[R0:r[0-9]+]], [[LABEL0:LCPI[0-9_]+]]
@ -47,6 +49,7 @@
;DYNAMIC-NO-PIC-V7: L___stack_chk_guard$non_lazy_ptr:
;DYNAMIC-NO-PIC-V7: .indirect_symbol ___stack_chk_guard
;--- main.ll
; Function Attrs: nounwind ssp
define i32 @test_stack_guard_remat() #0 {
%a1 = alloca [256 x i32], align 4
@ -67,5 +70,6 @@ declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
;--- pic-flag.ll
!llvm.module.flags = !{!0}
!0 = !{i32 7, !"PIC Level", i32 2}

40
llvm/test/LTO/ARM/ssp-static-reloc.ll
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@ -1,40 +0,0 @@
; RUN: llvm-as < %s > %t.bc
; RUN: llvm-lto -O0 -relocation-model=static -o %t.o %t.bc
; RUN: llvm-objdump -d -r %t.o | FileCheck %s
; Confirm that we do generate one too many indirections accessing the stack guard
; variable, when the relocation model is static and the PIC level is not 0..
; This is preparation for the fix.
;
target triple = "armv4t-unknown-unknown"
define arm_aapcscc i8 @foo() #0 {
entry:
%arr = alloca [200 x i8], align 1
call void @llvm.memset.p0.i32(ptr align 1 %arr, i8 0, i32 200, i1 false)
%arrayidx = getelementptr inbounds [200 x i8], ptr %arr, i32 0, i8 5
%0 = load i8, ptr %arrayidx, align 1
ret i8 %0
}
; CHECK: <foo>:
; CHECK: [[#%x,CURPC:]]:{{.*}} ldr r[[REG1:[0-9]+]], [pc, #0x[[#%x,OFFSET:]]]
; CHECK-NEXT: ldr r[[REG2:[0-9]+]], [r[[REG1]]]
; CHECK-NEXT: ldr r[[REG3:[0-9]+]], [r[[REG2]]]
; CHECK-NEXT: str r[[REG3]],
; CHECK: [[#CURPC + OFFSET + 8]]:{{.*}}.word
; CHECK-NEXT: R_ARM_ABS32 __stack_chk_guard
declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
define arm_aapcscc i32 @main() {
entry:
%call = call arm_aapcscc i8 @foo()
%conv = zext i8 %call to i32
ret i32 %conv
}
attributes #0 = { sspstrong }
!llvm.module.flags = !{!0}
!0 = !{i32 8, !"PIC Level", i32 2}