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[InstCombine] Use IRBuilder in freeze pushing transform (PR55619)
Use IRBuilder so that the newly created freeze instructions automatically gets inserted back into the IC worklist. The changed worklist processing order leads to some cosmetic differences in tests. Fixes https://github.com/llvm/llvm-project/issues/55619.
This commit is contained in:
Nikita Popov
parent
e7ddb4f6b4
commit
b2a13d3e2d
@ -3779,11 +3779,11 @@ InstCombinerImpl::pushFreezeToPreventPoisonFromPropagating(FreezeInst &OrigFI) {
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if (!MaybePoisonOperand)
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return OrigOp;
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auto *FrozenMaybePoisonOperand = new FreezeInst(
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Builder.SetInsertPoint(OrigOpInst);
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auto *FrozenMaybePoisonOperand = Builder.CreateFreeze(
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MaybePoisonOperand->get(), MaybePoisonOperand->get()->getName() + ".fr");
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replaceUse(*MaybePoisonOperand, FrozenMaybePoisonOperand);
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FrozenMaybePoisonOperand->insertBefore(OrigOpInst);
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return OrigOp;
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}
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@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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; RUN: opt < %s -passes=instcombine -instcombine-infinite-loop-threshold=2 -S | FileCheck %s
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define i32 @fold(i32 %x) {
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; CHECK-LABEL: @fold(
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@ -387,8 +387,8 @@ define i32 @test_chr_4(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-LABEL: @test_chr_4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
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; CHECK-NEXT: [[DOTFR2:%.*]] = freeze i32 [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR2]], 3
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; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
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; CHECK-NEXT: br i1 [[TMP2]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
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; CHECK: common.ret:
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@ -398,11 +398,11 @@ define i32 @test_chr_4(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[TMP3]] = add i32 [[SUM0:%.*]], 85
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR2]], 1
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; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP4]], 0
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; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[SUM0]], 42
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; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[DOTNOT]], i32 [[SUM0]], i32 [[TMP5]], !prof [[PROF16]]
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR2]], 2
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; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 42
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR1]], 1
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; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP5]], 0
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; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[DOTNOT]], i32 [[SUM0]], i32 [[TMP4]], !prof [[PROF16]]
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 2
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; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
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; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM1_NONCHR]], 43
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; CHECK-NEXT: [[SUM2_NONCHR]] = select i1 [[TMP7]], i32 [[SUM1_NONCHR]], i32 [[TMP8]], !prof [[PROF16]]
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@ -450,8 +450,8 @@ define i32 @test_chr_5(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-LABEL: @test_chr_5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
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; CHECK-NEXT: [[DOTFR3:%.*]] = freeze i32 [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR3]], 15
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; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 15
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 15
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; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
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; CHECK: bb0:
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@ -459,21 +459,21 @@ define i32 @test_chr_5(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 173
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR3]], 255
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR1]], 255
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; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP5]], 0
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; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
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; CHECK: bb0.nonchr:
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR3]], 1
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 1
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; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
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; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM0]], 42
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; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP7]], i32 [[SUM0]], i32 [[TMP8]], !prof [[PROF16]]
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR3]], 2
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR1]], 2
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; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
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; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[SUM1_NONCHR]], 43
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP10]], i32 [[SUM1_NONCHR]], i32 [[TMP11]], !prof [[PROF16]]
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; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[DOTFR3]], 4
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; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[DOTFR1]], 4
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; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 0
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; CHECK-NEXT: [[TMP14:%.*]] = and i32 [[DOTFR3]], 8
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; CHECK-NEXT: [[TMP14:%.*]] = and i32 [[DOTFR1]], 8
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; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i32 [[TMP14]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP15]], i32 44, i32 88
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; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
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@ -548,10 +548,10 @@ define i32 @test_chr_5_1(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-LABEL: @test_chr_5_1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
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; CHECK-NEXT: [[DOTFR3:%.*]] = freeze i32 [[TMP0]]
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; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUM0:%.*]], 4
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
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; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR3]], 11
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; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 11
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 11
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; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP2]]
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; CHECK-NEXT: br i1 [[TMP5]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
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@ -560,21 +560,21 @@ define i32 @test_chr_5_1(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[SUM0]], 173
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[DOTFR3]], 255
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; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[DOTFR1]], 255
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; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP8]], 0
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; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
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; CHECK: bb0.nonchr:
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR3]], 1
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR1]], 1
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; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
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; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[SUM0]], 42
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; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP10]], i32 [[SUM0]], i32 [[TMP11]], !prof [[PROF16]]
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; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[DOTFR3]], 2
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; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[DOTFR1]], 2
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; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 0
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; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[SUM1_NONCHR]], 43
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP13]], i32 [[SUM1_NONCHR]], i32 [[TMP14]], !prof [[PROF16]]
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; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[SUM0]], 4
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; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
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; CHECK-NEXT: [[TMP17:%.*]] = and i32 [[DOTFR3]], 8
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; CHECK-NEXT: [[TMP17:%.*]] = and i32 [[DOTFR1]], 8
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; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP17]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP18]], i32 44, i32 88
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; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
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@ -1286,8 +1286,8 @@ define i32 @test_chr_14(i32* %i, i32* %j, i32 %sum0, i1 %pred, i32 %z) !prof !14
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[Z_FR:%.*]] = freeze i32 [[Z:%.*]]
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; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[I:%.*]], align 4
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; CHECK-NEXT: [[V1_NOT:%.*]] = icmp eq i32 [[Z_FR]], 1
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; CHECK-NEXT: br i1 [[V1_NOT]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
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; CHECK-NEXT: [[V1:%.*]] = icmp eq i32 [[Z_FR]], 1
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; CHECK-NEXT: br i1 [[V1]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[V0:%.*]] = icmp eq i32 [[Z_FR]], 0
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; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i1 [[V0]], [[PRED:%.*]]
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@ -1659,8 +1659,6 @@ define i32 @test_chr_18(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[INC1:%.*]] = phi i32 [ [[TMP2:%.*]], [[BB2:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[LI:%.*]] = load i32, i32* [[I:%.*]], align 4
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; CHECK-NEXT: [[LI_FR:%.*]] = freeze i32 [[LI]]
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; CHECK-NEXT: [[A1:%.*]] = and i32 [[LI_FR]], 1
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; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[A1]], 0
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; CHECK-NEXT: [[SUM1:%.*]] = add i32 [[SUM0:%.*]], 42
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; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[LI_FR]], 5
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 5
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@ -1673,6 +1671,8 @@ define i32 @test_chr_18(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[CMP4_NONCHR:%.*]] = icmp eq i32 [[A4_NONCHR]], 0
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; CHECK-NEXT: br i1 [[CMP4_NONCHR]], label [[BB2]], label [[BB1_NONCHR:%.*]], !prof [[PROF16]]
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; CHECK: bb1.nonchr:
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; CHECK-NEXT: [[A1:%.*]] = and i32 [[LI_FR]], 1
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; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[A1]], 0
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[CMP1_NOT]], i32 [[SUM0]], i32 [[SUM1]], !prof [[PROF16]]
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; CHECK-NEXT: [[SUM3_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], 44
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; CHECK-NEXT: br label [[BB2]]
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@ -1746,8 +1746,8 @@ define i32 @test_chr_19(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-LABEL: @test_chr_19(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
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; CHECK-NEXT: [[DOTFR2:%.*]] = freeze i32 [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR2]], 9
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; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 9
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 9
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; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
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; CHECK: bb0:
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@ -1755,15 +1755,15 @@ define i32 @test_chr_19(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 173
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR2]], 255
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR1]], 255
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; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP5]], 0
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; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
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; CHECK: bb0.nonchr:
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR2]], 1
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 1
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; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
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; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM0]], 85
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP7]], i32 [[SUM0]], i32 [[TMP8]], !prof [[PROF16]]
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR2]], 8
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR1]], 8
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; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP10]], i32 44, i32 88
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; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
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@ -1853,9 +1853,9 @@ define i32 @test_chr_20(i32* %i, i32 %sum0, i1 %j) !prof !14 {
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; CHECK-NEXT: call void @foo()
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; CHECK-NEXT: br label [[BB4]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0]], 43
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; CHECK-NEXT: [[V3:%.*]] = and i32 [[I0_FR]], 2
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; CHECK-NEXT: [[V4_NOT:%.*]] = icmp eq i32 [[V3]], 0
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; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0]], 43
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[V4_NOT]], i32 [[SUM0]], i32 [[V8]], !prof [[PROF16]]
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; CHECK-NEXT: [[V6_NONCHR:%.*]] = and i32 [[I0_FR]], 4
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; CHECK-NEXT: [[V5_NONCHR:%.*]] = icmp eq i32 [[V6_NONCHR]], 0
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@ -17,7 +17,7 @@ define float @test_merge_allof_v4sf(<4 x float> %t) {
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i1> [[TMP3]] to i4
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i4 [[TMP4]], 0
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; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x float> [[T_FR]], <4 x float> poison, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[SHIFT]], [[T_FR]]
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; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[T_FR]], [[SHIFT]]
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; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP6]], i64 0
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TMP5]], float 0.000000e+00, float [[ADD]]
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; CHECK-NEXT: br label [[RETURN]]
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@ -90,14 +90,14 @@ return:
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define float @test_merge_anyof_v4sf(<4 x float> %t) {
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; CHECK-LABEL: @test_merge_anyof_v4sf(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[T_FR7:%.*]] = freeze <4 x float> [[T:%.*]]
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; CHECK-NEXT: [[TMP0:%.*]] = fcmp olt <4 x float> [[T_FR7]], zeroinitializer
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; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt <4 x float> [[T_FR7]], <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
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; CHECK-NEXT: [[T_FR:%.*]] = freeze <4 x float> [[T:%.*]]
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; CHECK-NEXT: [[TMP0:%.*]] = fcmp olt <4 x float> [[T_FR]], zeroinitializer
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; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt <4 x float> [[T_FR]], <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
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; CHECK-NEXT: [[TMP2:%.*]] = or <4 x i1> [[TMP1]], [[TMP0]]
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i1> [[TMP2]] to i4
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; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i4 [[TMP3]], 0
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; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x float> [[T_FR7]], <4 x float> poison, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP4:%.*]] = fadd <4 x float> [[SHIFT]], [[T_FR7]]
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; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x float> [[T_FR]], <4 x float> poison, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP4:%.*]] = fadd <4 x float> [[T_FR]], [[SHIFT]]
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; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP4]], i64 0
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; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], float [[ADD]], float 0.000000e+00
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; CHECK-NEXT: ret float [[RETVAL_0]]
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@ -177,7 +177,7 @@ define float @test_separate_allof_v4sf(<4 x float> %t) {
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i1> [[TMP3]] to i4
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i4 [[TMP4]], 0
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; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x float> [[T_FR]], <4 x float> poison, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[SHIFT]], [[T_FR]]
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; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[T_FR]], [[SHIFT]]
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; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP6]], i64 0
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TMP5]], float 0.000000e+00, float [[ADD]]
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; CHECK-NEXT: br label [[RETURN]]
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@ -261,11 +261,11 @@ define float @test_separate_anyof_v4sf(<4 x float> %t) {
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; CHECK: if.end:
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; CHECK-NEXT: [[TMP2:%.*]] = fcmp ogt <4 x float> [[T_FR]], <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i1> [[TMP2]] to i4
|
||||
; CHECK-NEXT: [[DOTNOT7:%.*]] = icmp eq i4 [[TMP3]], 0
|
||||
; CHECK-NEXT: [[DOTNOT6:%.*]] = icmp eq i4 [[TMP3]], 0
|
||||
; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x float> [[T_FR]], <4 x float> poison, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = fadd <4 x float> [[SHIFT]], [[T_FR]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = fadd <4 x float> [[T_FR]], [[SHIFT]]
|
||||
; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP4]], i64 0
|
||||
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[DOTNOT7]], float [[ADD]], float 0.000000e+00
|
||||
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[DOTNOT6]], float [[ADD]], float 0.000000e+00
|
||||
; CHECK-NEXT: br label [[RETURN]]
|
||||
; CHECK: return:
|
||||
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[IF_END]] ]
|
||||
@ -412,13 +412,13 @@ return:
|
||||
define float @test_merge_anyof_v4si(<4 x i32> %t) {
|
||||
; CHECK-LABEL: @test_merge_anyof_v4si(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[T_FR7:%.*]] = freeze <4 x i32> [[T:%.*]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = add <4 x i32> [[T_FR7]], <i32 -256, i32 -256, i32 -256, i32 -256>
|
||||
; CHECK-NEXT: [[T_FR:%.*]] = freeze <4 x i32> [[T:%.*]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = add <4 x i32> [[T_FR]], <i32 -256, i32 -256, i32 -256, i32 -256>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <4 x i32> [[TMP0]], <i32 -255, i32 -255, i32 -255, i32 -255>
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i1> [[TMP1]] to i4
|
||||
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i4 [[TMP2]], 0
|
||||
; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x i32> [[T_FR7]], <4 x i32> poison, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[SHIFT]], [[T_FR7]]
|
||||
; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x i32> [[T_FR]], <4 x i32> poison, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[T_FR]], [[SHIFT]]
|
||||
; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP3]], i64 0
|
||||
; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[ADD]] to float
|
||||
; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], float [[CONV]], float 0.000000e+00
|
||||
@ -568,11 +568,11 @@ define i32 @test_separate_anyof_v4si(<4 x i32> %t) {
|
||||
; CHECK: if.end:
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt <4 x i32> [[T_FR]], <i32 255, i32 255, i32 255, i32 255>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i1> [[TMP2]] to i4
|
||||
; CHECK-NEXT: [[DOTNOT7:%.*]] = icmp eq i4 [[TMP3]], 0
|
||||
; CHECK-NEXT: [[DOTNOT6:%.*]] = icmp eq i4 [[TMP3]], 0
|
||||
; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x i32> [[T_FR]], <4 x i32> poison, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw <4 x i32> [[SHIFT]], [[T_FR]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw <4 x i32> [[T_FR]], [[SHIFT]]
|
||||
; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP4]], i64 0
|
||||
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[DOTNOT7]], i32 [[ADD]], i32 0
|
||||
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[DOTNOT6]], i32 [[ADD]], i32 0
|
||||
; CHECK-NEXT: br label [[RETURN]]
|
||||
; CHECK: return:
|
||||
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[IF_END]] ]
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user