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Reapply "[SPIRV] Add radians intrinsic"

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I had too many tabs open and reverted #110800 by mistake, it was
supposed to be #110616.

This reverts commit dec6fe3de0f6475ea83391e5b0b4036cf56db35b.
This commit is contained in:
Justin Bogner 2024-10-07 09:24:34 -07:00
parent dec6fe3de0
commit b2c615fc79
4 changed files with 102 additions and 0 deletions
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1
llvm/include/llvm/IR/IntrinsicsSPIRV.td
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@ -84,4 +84,5 @@ let TargetPrefix = "spv" in {
[IntrNoMem, Commutative] >; [IntrNoMem, Commutative] >;
def int_spv_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>; def int_spv_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>;
def int_spv_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>; def int_spv_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;
def int_spv_radians : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty], [IntrNoMem]>;
} }

2
llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
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@ -2537,6 +2537,8 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
} }
case Intrinsic::spv_step: case Intrinsic::spv_step:
return selectExtInst(ResVReg, ResType, I, CL::step, GL::Step); return selectExtInst(ResVReg, ResType, I, CL::step, GL::Step);
case Intrinsic::spv_radians:
return selectExtInst(ResVReg, ResType, I, CL::radians, GL::Radians);
// Discard intrinsics which we do not expect to actually represent code after // Discard intrinsics which we do not expect to actually represent code after
// lowering or intrinsics which are not implemented but should not crash when // lowering or intrinsics which are not implemented but should not crash when
// found in a customer's LLVM IR input. // found in a customer's LLVM IR input.

48
llvm/test/CodeGen/SPIRV/hlsl-intrinsics/radians.ll Normal file
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@ -0,0 +1,48 @@
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; CHECK-DAG: %[[#op_ext_glsl:]] = OpExtInstImport "GLSL.std.450"
; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32
; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
; CHECK-DAG: %[[#vec4_float_32:]] = OpTypeVector %[[#float_32]] 4
; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
declare half @llvm.spv.radians.f16(half)
declare float @llvm.spv.radians.f32(float)
declare <4 x float> @llvm.spv.radians.v4f32(<4 x float>)
declare <4 x half> @llvm.spv.radians.v4f16(<4 x half>)
define noundef float @radians_float(float noundef %a) {
entry:
; CHECK: %[[#float_32_arg:]] = OpFunctionParameter %[[#float_32]]
; CHECK: %[[#]] = OpExtInst %[[#float_32]] %[[#op_ext_glsl]] Radians %[[#float_32_arg]]
%elt.radians = call float @llvm.spv.radians.f32(float %a)
ret float %elt.radians
}
define noundef half @radians_half(half noundef %a) {
entry:
; CHECK: %[[#float_16_arg:]] = OpFunctionParameter %[[#float_16]]
; CHECK: %[[#]] = OpExtInst %[[#float_16]] %[[#op_ext_glsl]] Radians %[[#float_16_arg]]
%elt.radians = call half @llvm.spv.radians.f16(half %a)
ret half %elt.radians
}
define noundef <4 x float> @radians_float_vector(<4 x float> noundef %a) {
entry:
; CHECK: %[[#vec4_float_32_arg:]] = OpFunctionParameter %[[#vec4_float_32]]
; CHECK: %[[#]] = OpExtInst %[[#vec4_float_32]] %[[#op_ext_glsl]] Radians %[[#vec4_float_32_arg]]
%elt.radians = call <4 x float> @llvm.spv.radians.v4f32(<4 x float> %a)
ret <4 x float> %elt.radians
}
define noundef <4 x half> @radians_half_vector(<4 x half> noundef %a) {
entry:
; CHECK: %[[#vec4_float_16_arg:]] = OpFunctionParameter %[[#vec4_float_16]]
; CHECK: %[[#]] = OpExtInst %[[#vec4_float_16]] %[[#op_ext_glsl]] Radians %[[#vec4_float_16_arg]]
%elt.radians = call <4 x half> @llvm.spv.radians.v4f16(<4 x half> %a)
ret <4 x half> %elt.radians
}

51
llvm/test/CodeGen/SPIRV/opencl/radians.ll Normal file
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@ -0,0 +1,51 @@
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; CHECK-DAG: %[[#op_ext_glsl:]] = OpExtInstImport "OpenCL.std"
; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32
; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
; CHECK-DAG: %[[#vec4_float_32:]] = OpTypeVector %[[#float_32]] 4
; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
declare half @llvm.spv.radians.f16(half)
declare float @llvm.spv.radians.f32(float)
declare <4 x float> @llvm.spv.radians.v4f32(<4 x float>)
declare <4 x half> @llvm.spv.radians.v4f16(<4 x half>)
define noundef float @radians_float(float noundef %a) {
entry:
; CHECK: %[[#float_32_arg:]] = OpFunctionParameter %[[#float_32]]
; CHECK: %[[#]] = OpExtInst %[[#float_32]] %[[#op_ext_glsl]] radians %[[#float_32_arg]]
%elt.radians = call float @llvm.spv.radians.f32(float %a)
ret float %elt.radians
}
define noundef half @radians_half(half noundef %a) {
entry:
; CHECK: %[[#float_16_arg:]] = OpFunctionParameter %[[#float_16]]
; CHECK: %[[#]] = OpExtInst %[[#float_16]] %[[#op_ext_glsl]] radians %[[#float_16_arg]]
%elt.radians = call half @llvm.spv.radians.f16(half %a)
ret half %elt.radians
}
define noundef <4 x float> @radians_float_vector(<4 x float> noundef %a) {
entry:
; CHECK: %[[#vec4_float_32_arg:]] = OpFunctionParameter %[[#vec4_float_32]]
; CHECK: %[[#]] = OpExtInst %[[#vec4_float_32]] %[[#op_ext_glsl]] radians %[[#vec4_float_32_arg]]
%elt.radians = call <4 x float> @llvm.spv.radians.v4f32(<4 x float> %a)
ret <4 x float> %elt.radians
}
define noundef <4 x half> @radians_half_vector(<4 x half> noundef %a) {
entry:
; CHECK: %[[#vec4_float_16_arg:]] = OpFunctionParameter %[[#vec4_float_16]]
; CHECK: %[[#]] = OpExtInst %[[#vec4_float_16]] %[[#op_ext_glsl]] radians %[[#vec4_float_16_arg]]
%elt.radians = call <4 x half> @llvm.spv.radians.v4f16(<4 x half> %a)
ret <4 x half> %elt.radians
}