[lldb] Use UnwindPlan::Row as values, part 2 (#132008)

This is the mechanical part of #131150.

I'm also removing the interfaces taking a RowSP.
This commit is contained in:
Pavel Labath 2025-03-20 09:18:40 +01:00 committed by GitHub
parent 14006c8b5b
commit b3b5527baa
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GPG Key ID: B5690EEEBB952194
25 changed files with 208 additions and 224 deletions

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@ -462,13 +462,9 @@ public:
void Dump(Stream &s, Thread *thread, lldb::addr_t base_addr) const;
void AppendRow(const RowSP &row_sp);
void AppendRow(Row row) { AppendRow(std::make_shared<Row>(std::move(row))); }
void AppendRow(Row row);
void InsertRow(const RowSP &row_sp, bool replace_existing = false);
void InsertRow(Row row, bool replace_existing = false) {
InsertRow(std::make_shared<Row>(std::move(row)), replace_existing);
}
void InsertRow(Row row, bool replace_existing = false);
// Returns a pointer to the best row for the given offset into the function's
// instructions. If offset is -1 it indicates that the function start is

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@ -349,16 +349,16 @@ UnwindPlanSP ABIMacOSX_arm64::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = arm64_dwarf::sp;
uint32_t pc_reg_num = arm64_dwarf::pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our previous Call Frame Address is the stack pointer
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
// Our previous PC is in the LR, all other registers are the same.
row->SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
row.SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("arm64 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -368,18 +368,17 @@ UnwindPlanSP ABIMacOSX_arm64::CreateDefaultUnwindPlan() {
uint32_t fp_reg_num = arm64_dwarf::fp;
uint32_t pc_reg_num = arm64_dwarf::pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 8;
row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row->SetOffset(0);
row->SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row.SetUnspecifiedRegistersAreUndefined(true);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("arm64-apple-darwin default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -389,14 +389,14 @@ UnwindPlanSP ABISysV_arm64::CreateFunctionEntryUnwindPlan() {
uint32_t lr_reg_num = arm64_dwarf::lr;
uint32_t sp_reg_num = arm64_dwarf::sp;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our previous Call Frame Address is the stack pointer, all other registers
// are the same.
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetReturnAddressRegister(lr_reg_num);
plan_sp->SetSourceName("arm64 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
@ -409,18 +409,17 @@ UnwindPlanSP ABISysV_arm64::CreateDefaultUnwindPlan() {
uint32_t fp_reg_num = arm64_dwarf::fp;
uint32_t pc_reg_num = arm64_dwarf::pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 8;
row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row->SetOffset(0);
row->SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row.SetUnspecifiedRegistersAreUndefined(true);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("arm64 default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -560,16 +560,16 @@ ValueObjectSP ABISysV_arc::GetReturnValueObjectImpl(Thread &thread,
}
UnwindPlanSP ABISysV_arc::CreateFunctionEntryUnwindPlan() {
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value.
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf::sp, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf::sp, 0);
// The previous PC is in the BLINK, all other registers are the same.
row->SetRegisterLocationToRegister(dwarf::pc, dwarf::blink, true);
row.SetRegisterLocationToRegister(dwarf::pc, dwarf::blink, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("arc at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;

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@ -1788,16 +1788,16 @@ UnwindPlanSP ABIMacOSX_arm::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = dwarf_sp;
uint32_t pc_reg_num = dwarf_pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
// The previous PC is in the LR, all other registers are the same.
row->SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
row.SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("arm at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -1808,18 +1808,17 @@ UnwindPlanSP ABIMacOSX_arm::CreateDefaultUnwindPlan() {
dwarf_r7; // apple uses r7 for all frames. Normal arm uses r11
uint32_t pc_reg_num = dwarf_pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 4;
row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row->SetOffset(0);
row->SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row.SetUnspecifiedRegistersAreUndefined(true);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("arm-apple-ios default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -1905,15 +1905,15 @@ UnwindPlanSP ABISysV_arm::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = dwarf_sp;
uint32_t pc_reg_num = dwarf_pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
// The previous PC is in the LR, all other registers are the same.
row->SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
row.SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("arm at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -1924,18 +1924,17 @@ UnwindPlanSP ABISysV_arm::CreateDefaultUnwindPlan() {
uint32_t fp_reg_num = dwarf_r11;
uint32_t pc_reg_num = dwarf_pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 4;
row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row->SetOffset(0);
row->SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row.SetUnspecifiedRegistersAreUndefined(true);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("arm default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -1196,18 +1196,17 @@ ValueObjectSP ABISysV_hexagon::GetReturnValueObjectImpl(
// called when we are on the first instruction of a new function for hexagon
// the return address is in RA (R31)
UnwindPlanSP ABISysV_hexagon::CreateFunctionEntryUnwindPlan() {
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value
row->GetCFAValue().SetIsRegisterPlusOffset(LLDB_REGNUM_GENERIC_SP, 4);
row->SetOffset(0);
row.GetCFAValue().SetIsRegisterPlusOffset(LLDB_REGNUM_GENERIC_SP, 4);
// The previous PC is in the LR
row->SetRegisterLocationToRegister(LLDB_REGNUM_GENERIC_PC,
LLDB_REGNUM_GENERIC_RA, true);
row.SetRegisterLocationToRegister(LLDB_REGNUM_GENERIC_PC,
LLDB_REGNUM_GENERIC_RA, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindGeneric);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetReturnAddressRegister(LLDB_REGNUM_GENERIC_RA);
plan_sp->SetSourceName("hexagon at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
@ -1219,17 +1218,17 @@ UnwindPlanSP ABISysV_hexagon::CreateDefaultUnwindPlan() {
uint32_t sp_reg_num = LLDB_REGNUM_GENERIC_SP;
uint32_t pc_reg_num = LLDB_REGNUM_GENERIC_PC;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
row->SetUnspecifiedRegistersAreUndefined(true);
row->GetCFAValue().SetIsRegisterPlusOffset(LLDB_REGNUM_GENERIC_FP, 8);
row.SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(LLDB_REGNUM_GENERIC_FP, 8);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, -8, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -4, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, -8, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -4, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindGeneric);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("hexagon default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -539,16 +539,16 @@ UnwindPlanSP ABISysV_loongarch::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = loongarch_dwarf::dwarf_gpr_sp;
uint32_t ra_reg_num = loongarch_dwarf::dwarf_gpr_ra;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Define CFA as the stack pointer
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
// Previous frame's pc is in ra
row->SetRegisterLocationToRegister(pc_reg_num, ra_reg_num, true);
row.SetRegisterLocationToRegister(pc_reg_num, ra_reg_num, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("loongarch function-entry unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -558,11 +558,10 @@ UnwindPlanSP ABISysV_loongarch::CreateDefaultUnwindPlan() {
uint32_t pc_reg_num = LLDB_REGNUM_GENERIC_PC;
uint32_t fp_reg_num = LLDB_REGNUM_GENERIC_FP;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Define the CFA as the current frame pointer value.
row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 0);
row->SetOffset(0);
row.GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 0);
int reg_size = 4;
if (m_is_la64)
@ -570,11 +569,11 @@ UnwindPlanSP ABISysV_loongarch::CreateDefaultUnwindPlan() {
// Assume the ra reg (return pc) and caller's frame pointer
// have been spilled to stack already.
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, reg_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, reg_size * -1, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, reg_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, reg_size * -1, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindGeneric);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("loongarch default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -309,13 +309,13 @@ UnwindPlanSP ABISysV_msp430::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = dwarf_sp;
uint32_t pc_reg_num = dwarf_pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 2);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -2, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
UnwindPlan::Row row;
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 2);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -2, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("msp430 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -326,14 +326,14 @@ UnwindPlanSP ABISysV_msp430::CreateDefaultUnwindPlan() {
uint32_t sp_reg_num = dwarf_sp;
uint32_t pc_reg_num = dwarf_pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 2);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -2, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row->SetRegisterLocationToUnspecified(fp_reg_num, true);
UnwindPlan::Row row;
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 2);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -2, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row.SetRegisterLocationToUnspecified(fp_reg_num, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("msp430 default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -956,16 +956,16 @@ ValueObjectSP ABISysV_mips::GetReturnValueObjectImpl(
}
UnwindPlanSP ABISysV_mips::CreateFunctionEntryUnwindPlan() {
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
// The previous PC is in the RA, all other registers are the same.
row->SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
row.SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("mips at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetReturnAddressRegister(dwarf_r31);
@ -973,15 +973,15 @@ UnwindPlanSP ABISysV_mips::CreateFunctionEntryUnwindPlan() {
}
UnwindPlanSP ABISysV_mips::CreateDefaultUnwindPlan() {
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
row->SetUnspecifiedRegistersAreUndefined(true);
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
row.SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
row->SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
row.SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("mips default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -1129,16 +1129,16 @@ ValueObjectSP ABISysV_mips64::GetReturnValueObjectImpl(
}
UnwindPlanSP ABISysV_mips64::CreateFunctionEntryUnwindPlan() {
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
// The previous PC is in the RA, all other registers are the same.
row->SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
row.SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("mips64 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetReturnAddressRegister(dwarf_r31);
@ -1146,15 +1146,15 @@ UnwindPlanSP ABISysV_mips64::CreateFunctionEntryUnwindPlan() {
}
UnwindPlanSP ABISysV_mips64::CreateDefaultUnwindPlan() {
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
row->SetUnspecifiedRegistersAreUndefined(true);
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
row.SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
row->SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
row.SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("mips64 default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -864,16 +864,16 @@ UnwindPlanSP ABISysV_ppc::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = dwarf_r1;
uint32_t pc_reg_num = dwarf_pc;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
// The previous PC is in the LR, all other registers are the same.
row->SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
row.SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("ppc at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -884,17 +884,17 @@ UnwindPlanSP ABISysV_ppc::CreateDefaultUnwindPlan() {
uint32_t sp_reg_num = dwarf_r1;
uint32_t pc_reg_num = dwarf_lr;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 4;
row->SetUnspecifiedRegistersAreUndefined(true);
row->GetCFAValue().SetIsRegisterDereferenced(sp_reg_num);
row.SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterDereferenced(sp_reg_num);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * 1, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * 1, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("ppc default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -973,16 +973,16 @@ UnwindPlanSP ABISysV_ppc64::CreateFunctionEntryUnwindPlan() {
pc_reg_num = ppc64_dwarf::dwarf_pc_ppc64;
}
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
// The previous PC is in the LR. All other registers are the same.
row->SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
row.SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("ppc64 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -1003,17 +1003,17 @@ UnwindPlanSP ABISysV_ppc64::CreateDefaultUnwindPlan() {
cr_reg_num = ppc64_dwarf::dwarf_cr_ppc64;
}
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 8;
row->SetUnspecifiedRegistersAreUndefined(true);
row->GetCFAValue().SetIsRegisterDereferenced(sp_reg_num);
row.SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterDereferenced(sp_reg_num);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * 2, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row->SetRegisterLocationToAtCFAPlusOffset(cr_reg_num, ptr_size, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * 2, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row.SetRegisterLocationToAtCFAPlusOffset(cr_reg_num, ptr_size, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("ppc64 default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -724,16 +724,16 @@ UnwindPlanSP ABISysV_riscv::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = riscv_dwarf::dwarf_gpr_sp;
uint32_t ra_reg_num = riscv_dwarf::dwarf_gpr_ra;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Define CFA as the stack pointer
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
// Previous frame's pc is in ra
row->SetRegisterLocationToRegister(pc_reg_num, ra_reg_num, true);
row.SetRegisterLocationToRegister(pc_reg_num, ra_reg_num, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("riscv function-entry unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -743,11 +743,10 @@ UnwindPlanSP ABISysV_riscv::CreateDefaultUnwindPlan() {
uint32_t pc_reg_num = LLDB_REGNUM_GENERIC_PC;
uint32_t fp_reg_num = LLDB_REGNUM_GENERIC_FP;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Define the CFA as the current frame pointer value.
row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 0);
row->SetOffset(0);
row.GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 0);
int reg_size = 4;
if (m_is_rv64)
@ -755,11 +754,11 @@ UnwindPlanSP ABISysV_riscv::CreateDefaultUnwindPlan() {
// Assume the ra reg (return pc) and caller's frame pointer
// have been spilled to stack already.
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, reg_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, reg_size * -1, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, reg_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, reg_size * -1, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindGeneric);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("riscv default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -619,17 +619,17 @@ ValueObjectSP ABISysV_s390x::GetReturnValueObjectImpl(
}
UnwindPlanSP ABISysV_s390x::CreateFunctionEntryUnwindPlan() {
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our Call Frame Address is the stack pointer value + 160
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_r15_s390x, 160);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_r15_s390x, 160);
// The previous PC is in r14
row->SetRegisterLocationToRegister(dwarf_pswa_s390x, dwarf_r14_s390x, true);
row.SetRegisterLocationToRegister(dwarf_pswa_s390x, dwarf_r14_s390x, true);
// All other registers are the same.
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("s390x at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;

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@ -362,13 +362,13 @@ UnwindPlanSP ABIMacOSX_i386::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = dwarf_esp;
uint32_t pc_reg_num = dwarf_eip;
UnwindPlan::RowSP row(new UnwindPlan::Row);
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 4);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -4, false);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
UnwindPlan::Row row;
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 4);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -4, false);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("i386 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -384,19 +384,18 @@ UnwindPlanSP ABIMacOSX_i386::CreateDefaultUnwindPlan() {
uint32_t sp_reg_num = dwarf_esp;
uint32_t pc_reg_num = dwarf_eip;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 4;
row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row->SetOffset(0);
row->SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row.SetUnspecifiedRegistersAreUndefined(true);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("i386 default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

View File

@ -628,13 +628,13 @@ UnwindPlanSP ABISysV_i386::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = dwarf_esp;
uint32_t pc_reg_num = dwarf_eip;
UnwindPlan::RowSP row(new UnwindPlan::Row);
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 4);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -4, false);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
UnwindPlan::Row row;
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 4);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -4, false);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("i386 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -650,19 +650,18 @@ UnwindPlanSP ABISysV_i386::CreateDefaultUnwindPlan() {
uint32_t sp_reg_num = dwarf_esp;
uint32_t pc_reg_num = dwarf_eip;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 4;
row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row->SetOffset(0);
row->SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
row.SetUnspecifiedRegistersAreUndefined(true);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("i386 default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

View File

@ -867,13 +867,13 @@ UnwindPlanSP ABISysV_x86_64::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = dwarf_rsp;
uint32_t pc_reg_num = dwarf_rip;
UnwindPlan::RowSP row(new UnwindPlan::Row);
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 8);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -8, false);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
UnwindPlan::Row row;
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 8);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -8, false);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("x86_64 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -889,19 +889,19 @@ UnwindPlanSP ABISysV_x86_64::CreateDefaultUnwindPlan() {
uint32_t sp_reg_num = dwarf_rsp;
uint32_t pc_reg_num = dwarf_rip;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 8;
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_rbp, 2 * ptr_size);
row->SetOffset(0);
row->SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_rbp, 2 * ptr_size);
row.SetOffset(0);
row.SetUnspecifiedRegistersAreUndefined(true);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("x86_64 default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

View File

@ -747,13 +747,13 @@ UnwindPlanSP ABIWindows_x86_64::CreateFunctionEntryUnwindPlan() {
uint32_t sp_reg_num = dwarf_rsp;
uint32_t pc_reg_num = dwarf_rip;
UnwindPlan::RowSP row(new UnwindPlan::Row);
row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 8);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -8, false);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
UnwindPlan::Row row;
row.GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 8);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -8, false);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("x86_64 at-func-entry default");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
return plan_sp;
@ -767,19 +767,19 @@ UnwindPlanSP ABIWindows_x86_64::CreateDefaultUnwindPlan() {
uint32_t sp_reg_num = dwarf_rsp;
uint32_t pc_reg_num = dwarf_rip;
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const int32_t ptr_size = 8;
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_rbp, 2 * ptr_size);
row->SetOffset(0);
row->SetUnspecifiedRegistersAreUndefined(true);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_rbp, 2 * ptr_size);
row.SetOffset(0);
row.SetUnspecifiedRegistersAreUndefined(true);
row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
row.SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
row.SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
row.SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
plan_sp->AppendRow(row);
plan_sp->AppendRow(std::move(row));
plan_sp->SetSourceName("x86_64 default unwind plan");
plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);

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@ -14458,12 +14458,12 @@ bool EmulateInstructionARM::CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) {
unwind_plan.Clear();
unwind_plan.SetRegisterKind(eRegisterKindDWARF);
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our previous Call Frame Address is the stack pointer
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_sp, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_sp, 0);
unwind_plan.AppendRow(row);
unwind_plan.AppendRow(std::move(row));
unwind_plan.SetSourceName("EmulateInstructionARM");
unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolYes);

View File

@ -440,14 +440,14 @@ bool EmulateInstructionARM64::CreateFunctionEntryUnwind(
unwind_plan.Clear();
unwind_plan.SetRegisterKind(eRegisterKindLLDB);
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our previous Call Frame Address is the stack pointer
row->GetCFAValue().SetIsRegisterPlusOffset(gpr_sp_arm64, 0);
row->SetRegisterLocationToSame(gpr_lr_arm64, /*must_replace=*/false);
row->SetRegisterLocationToSame(gpr_fp_arm64, /*must_replace=*/false);
row.GetCFAValue().SetIsRegisterPlusOffset(gpr_sp_arm64, 0);
row.SetRegisterLocationToSame(gpr_lr_arm64, /*must_replace=*/false);
row.SetRegisterLocationToSame(gpr_fp_arm64, /*must_replace=*/false);
unwind_plan.AppendRow(row);
unwind_plan.AppendRow(std::move(row));
unwind_plan.SetSourceName("EmulateInstructionARM64");
unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolYes);

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@ -1128,16 +1128,16 @@ bool EmulateInstructionMIPS::CreateFunctionEntryUnwind(
unwind_plan.Clear();
unwind_plan.SetRegisterKind(eRegisterKindDWARF);
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const bool can_replace = false;
// Our previous Call Frame Address is the stack pointer
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_sp_mips, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_sp_mips, 0);
// Our previous PC is in the RA
row->SetRegisterLocationToRegister(dwarf_pc_mips, dwarf_ra_mips, can_replace);
row.SetRegisterLocationToRegister(dwarf_pc_mips, dwarf_ra_mips, can_replace);
unwind_plan.AppendRow(row);
unwind_plan.AppendRow(std::move(row));
// All other registers are the same.
unwind_plan.SetSourceName("EmulateInstructionMIPS");

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@ -1017,17 +1017,17 @@ bool EmulateInstructionMIPS64::CreateFunctionEntryUnwind(
unwind_plan.Clear();
unwind_plan.SetRegisterKind(eRegisterKindDWARF);
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
const bool can_replace = false;
// Our previous Call Frame Address is the stack pointer
row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_sp_mips64, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(dwarf_sp_mips64, 0);
// Our previous PC is in the RA
row->SetRegisterLocationToRegister(dwarf_pc_mips64, dwarf_ra_mips64,
can_replace);
row.SetRegisterLocationToRegister(dwarf_pc_mips64, dwarf_ra_mips64,
can_replace);
unwind_plan.AppendRow(row);
unwind_plan.AppendRow(std::move(row));
// All other registers are the same.
unwind_plan.SetSourceName("EmulateInstructionMIPS64");

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@ -118,12 +118,12 @@ bool EmulateInstructionPPC64::CreateFunctionEntryUnwind(
unwind_plan.Clear();
unwind_plan.SetRegisterKind(eRegisterKindLLDB);
UnwindPlan::RowSP row(new UnwindPlan::Row);
UnwindPlan::Row row;
// Our previous Call Frame Address is the stack pointer
row->GetCFAValue().SetIsRegisterPlusOffset(gpr_r1_ppc64le, 0);
row.GetCFAValue().SetIsRegisterPlusOffset(gpr_r1_ppc64le, 0);
unwind_plan.AppendRow(row);
unwind_plan.AppendRow(std::move(row));
unwind_plan.SetSourceName("EmulateInstructionPPC64");
unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolYes);

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@ -389,27 +389,24 @@ bool UnwindPlan::Row::operator==(const UnwindPlan::Row &rhs) const {
m_register_locations == rhs.m_register_locations;
}
void UnwindPlan::AppendRow(const UnwindPlan::RowSP &row_sp) {
if (m_row_list.empty() ||
m_row_list.back()->GetOffset() != row_sp->GetOffset())
m_row_list.push_back(row_sp);
void UnwindPlan::AppendRow(Row row) {
if (m_row_list.empty() || m_row_list.back()->GetOffset() != row.GetOffset())
m_row_list.push_back(std::make_shared<Row>(std::move(row)));
else
m_row_list.back() = row_sp;
*m_row_list.back() = std::move(row);
}
void UnwindPlan::InsertRow(const UnwindPlan::RowSP &row_sp,
bool replace_existing) {
void UnwindPlan::InsertRow(Row row, bool replace_existing) {
collection::iterator it = m_row_list.begin();
while (it != m_row_list.end()) {
RowSP row = *it;
if (row->GetOffset() >= row_sp->GetOffset())
if ((*it)->GetOffset() >= row.GetOffset())
break;
it++;
}
if (it == m_row_list.end() || (*it)->GetOffset() != row_sp->GetOffset())
m_row_list.insert(it, row_sp);
if (it == m_row_list.end() || (*it)->GetOffset() != row.GetOffset())
m_row_list.insert(it, std::make_shared<Row>(std::move(row)));
else if (replace_existing)
*it = row_sp;
**it = std::move(row);
}
const UnwindPlan::Row *UnwindPlan::GetRowForFunctionOffset(int offset) const {