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[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
This PR replaces some instances of `br i1 undef` with function argument value in several tests under `llvm/test/CodeGen/` directory.
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@ -3,9 +3,9 @@
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; the sub_8bit_hi subregister with a class like GR16_ABCD that did.
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target triple = "x86_64-apple-macosx10.10.0"
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define void @test() #0 {
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define void @test(i1 %arg) #0 {
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entry:
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br i1 undef, label %loop, label %for.end597
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br i1 %arg, label %loop, label %for.end597
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loop:
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%0 = load i16, ptr null, align 4
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@ -6,12 +6,12 @@
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
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target triple = "i386-apple-darwin10.0"
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define void @foo() personality ptr @__gxx_personality_v0 {
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define void @foo(i1 %arg) personality ptr @__gxx_personality_v0 {
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invcont5:
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br label %bb15
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.noexc3: ; preds = %bb15
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br i1 undef, label %bb18.i5.i, label %bb15
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br i1 %arg, label %bb18.i5.i, label %bb15
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.noexc6.i.i: ; preds = %bb18.i5.i
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%tmp2021 = invoke float @cosf(float 0.000000e+00) readonly
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@ -12,10 +12,10 @@ target triple = "x86_64-unknown-linux-gnu"
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; CHECK-LABEL: @_Dmain
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; CHECK: load i8, ptr %tmp4
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; CHECK: ret
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define fastcc i32 @_Dmain(%"char[][]" %unnamed) {
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define fastcc i32 @_Dmain(%"char[][]" %unnamed, i1 %arg) {
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entry:
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%tmp = getelementptr [7 x i8], ptr @.str, i32 0, i32 0 ; <ptr> [#uses=1]
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br i1 undef, label %foreachbody, label %foreachend
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br i1 %arg, label %foreachbody, label %foreachend
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foreachbody: ; preds = %entry
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%tmp4 = getelementptr i8, ptr %tmp, i32 undef ; <ptr> [#uses=1]
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@ -3,7 +3,7 @@
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@.str96 = external constant [37 x i8], align 8 ; <ptr> [#uses=1]
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define void @foo() nounwind {
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define void @foo(i1 %arg) nounwind {
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bb:
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br label %ybb1
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@ -24,7 +24,7 @@ bb3: ; preds = %ybb2
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xbb4: ; preds = %xbb6
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store i32 0, ptr undef, align 8
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br i1 undef, label %xbb6, label %bb5
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br i1 %arg, label %xbb6, label %bb5
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bb5: ; preds = %xbb4
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call fastcc void @decl_mode_check_failed() nounwind
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@ -44,7 +44,7 @@ bb10: ; preds = %ybb8
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unreachable
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ybb12: ; preds = %ybb8
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br i1 undef, label %bb15, label %ybb13
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br i1 %arg, label %bb15, label %ybb13
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ybb13: ; preds = %ybb12
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%tmp14 = icmp sgt i32 undef, 0 ; <i1> [#uses=1]
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@ -10,15 +10,15 @@ target triple = "x86_64-apple-macosx10.8.0"
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; MachineTraceMetrics::Ensemble::addLiveIns crashes because the first operand
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; on an inline asm instruction is not a vreg def.
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; <rdar://problem/12472811>
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define void @f1() nounwind {
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define void @f1(i1 %arg) nounwind {
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entry:
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br i1 undef, label %if.then6.i, label %if.end.i
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br i1 %arg, label %if.then6.i, label %if.end.i
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if.then6.i:
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br label %if.end.i
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if.end.i:
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br i1 undef, label %if.end25.i, label %if.else17.i
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br i1 %arg, label %if.end25.i, label %if.else17.i
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if.else17.i:
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%shl24.i = shl i32 undef, undef
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@ -19,16 +19,16 @@ entry:
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; CHECK-DAG: movq ___stack_chk_guard@GOTPCREL(%rip), %[[GUARD:r.x]]
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; CHECK-DAG: movq {{[0-9]+}}(%rsp), %[[CANARY:r.x]]
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; CHECK: subq %[[CANARY]], %[[GUARD]]
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define void @bar() #1 {
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define void @bar(i1 %arg) #1 {
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entry:
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%vt = alloca [2 x double], align 16
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br i1 undef, label %cleanup.4091, label %for.cond.3850
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br i1 %arg, label %cleanup.4091, label %for.cond.3850
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unreachable:
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unreachable
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for.cond.3850:
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br i1 undef, label %land.rhs.3853, label %land.end.3857
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br i1 %arg, label %land.rhs.3853, label %land.end.3857
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land.rhs.3853:
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br label %land.end.3857
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@ -31,14 +31,14 @@ if.end: ; preds = %if.then, %cond.fals
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; PR10575
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; This produces a FP0 = IMPLICIT_DEF instruction.
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define void @__m_rankmerge_MOD_dindexmerge_() nounwind {
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define void @__m_rankmerge_MOD_dindexmerge_(i1 %arg) nounwind {
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entry:
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br label %"20"
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"20": ; preds = %"23", %entry
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%0 = phi double [ undef, %entry ], [ %0, %"23" ]
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%1 = phi double [ 0.000000e+00, %entry ], [ %2, %"23" ]
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br i1 undef, label %"21", label %"23"
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br i1 %arg, label %"21", label %"23"
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"21": ; preds = %"20"
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ret void
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@ -3,12 +3,12 @@
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
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target triple = "i386-pc-linux-gnu"
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define void @foo() nounwind {
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define void @foo(i1 %arg) nounwind {
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entry:
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%tmp6 = load x86_fp80, ptr undef ; <x86_fp80> [#uses=2]
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%tmp15 = load x86_fp80, ptr undef ; <x86_fp80> [#uses=2]
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%tmp24 = load x86_fp80, ptr undef ; <x86_fp80> [#uses=1]
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br i1 undef, label %return, label %bb.nph
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br i1 %arg, label %return, label %bb.nph
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bb.nph: ; preds = %entry
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%cmp139 = fcmp ogt x86_fp80 %tmp15, %tmp6 ; <i1> [#uses=1]
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@ -1,9 +1,9 @@
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# RUN: llc -mtriple=x86_64 -run-pass=implicit-null-checks %s -o - | FileCheck %s
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--- |
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define i32 @reg-rewrite(ptr %x) {
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define i32 @reg-rewrite(ptr %x, i1 %arg) {
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entry:
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br i1 undef, label %is_null, label %not_null, !make.implicit !0
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br i1 %arg, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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@ -2,12 +2,12 @@
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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define void @test0() nounwind {
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define void @test0(i1 %arg) nounwind {
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if.end90.i.i:
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br label %while.body.i.i221.i
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while.body.i.i221.i: ; preds = %while.cond.backedge.i.i.i, %if.end90.i.i
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br i1 undef, label %if.then.i.i224.i, label %while.cond.backedge.i.i.i
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br i1 %arg, label %if.then.i.i224.i, label %while.cond.backedge.i.i.i
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while.cond.backedge.i.i.i: ; preds = %for.end.i.i.i, %while.body.i.i221.i
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br label %while.body.i.i221.i
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@ -29,10 +29,10 @@ for.cond.i.i226.i: ; preds = %for.body.i.i.i, %if
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%0 = phi i64 [ %tmp154.i.i.i, %for.body.i.i.i ], [ 0, %if.then.i.i224.i ] ; <i64> [#uses=2]
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%tmp154.i.i.i = add i64 %0, 1 ; <i64> [#uses=2]
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%i.0.i.i.i = trunc i64 %0 to i32 ; <i32> [#uses=1]
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br i1 undef, label %land.rhs.i.i.i, label %for.end.i.i.i
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br i1 %arg, label %land.rhs.i.i.i, label %for.end.i.i.i
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land.rhs.i.i.i: ; preds = %for.cond.i.i226.i
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br i1 undef, label %for.body.i.i.i, label %for.end.i.i.i
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br i1 %arg, label %for.body.i.i.i, label %for.end.i.i.i
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for.body.i.i.i: ; preds = %land.rhs.i.i.i
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br label %for.cond.i.i226.i
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@ -45,7 +45,7 @@ for.end.i.i.i: ; preds = %land.rhs.i.i.i, %fo
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br label %while.cond.backedge.i.i.i
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}
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define void @test1() nounwind {
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define void @test1(i1 %arg) nounwind {
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entry:
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%t = shl i32 undef, undef ; <i32> [#uses=1]
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%t9 = sub nsw i32 0, %t ; <i32> [#uses=1]
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@ -59,7 +59,7 @@ outer: ; preds = %bb18, %bb
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inner: ; preds = %bb16, %bb11
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%t17 = phi i32 [ %i13, %outer ], [ undef, %inner ] ; <i32> [#uses=1]
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store i32 %t17, ptr undef
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br i1 undef, label %bb18, label %inner
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br i1 %arg, label %bb18, label %inner
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bb18: ; preds = %bb16
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%t19 = add i32 %i13, %t9 ; <i32> [#uses=1]
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@ -1,6 +1,6 @@
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; RUN: llc < %s -mtriple=i386-apple-darwin
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define fastcc void @foo(i32 %type) nounwind optsize {
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define fastcc void @foo(i32 %type, i1 %arg) nounwind optsize {
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entry:
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switch i32 %type, label %bb26 [
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i32 33634, label %bb11
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@ -15,19 +15,19 @@ bb26: ; preds = %entry
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bb27: ; preds = %bb11, %entry
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%srcpb.0 = phi i32 [ 1, %bb11 ], [ 0, %entry ]
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br i1 undef, label %bb348, label %bb30.lr.ph
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br i1 %arg, label %bb348, label %bb30.lr.ph
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bb30.lr.ph: ; preds = %bb27
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%.sum743 = shl i32 %srcpb.0, 1
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%0 = mul i32 %srcpb.0, -2
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%.sum745 = add i32 %.sum743, %0
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br i1 undef, label %bb70, label %bb71
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br i1 %arg, label %bb70, label %bb71
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bb70: ; preds = %bb30.lr.ph
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unreachable
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bb71: ; preds = %bb30.lr.ph
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br i1 undef, label %bb92, label %bb80
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br i1 %arg, label %bb92, label %bb80
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bb80: ; preds = %bb71
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unreachable
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@ -21,12 +21,12 @@ target triple = "i386-apple-darwin8"
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declare i32 @fprintf(ptr nocapture) nounwind
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define void @gcov_exit() nounwind {
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define void @gcov_exit(i1 %arg) nounwind {
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entry:
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br label %bb151
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bb151: ; preds = %bb59, %bb56, %bb14
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br i1 undef, label %bb56, label %bb59
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br i1 %arg, label %bb56, label %bb59
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bb56: ; preds = %bb151
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%t0 = call i32 (ptr) @fprintf(ptr getelementptr inbounds ([0 x %struct.FILE], ptr @__sF, i32 0, i32 2)) nounwind
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@ -9,7 +9,7 @@
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declare fastcc i32 @func(ptr, i32, i32) nounwind ssp
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define fastcc void @func2(ptr %arg, i32 %arg1) nounwind ssp {
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define fastcc void @func2(ptr %arg, i32 %arg1, i1 %arg2) nounwind ssp {
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bb:
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br label %.exit3
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@ -20,7 +20,7 @@ bb:
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]
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bb2: ; preds = %bb5, %bb3, %.exit3
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br i1 undef, label %bb3, label %bb5
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br i1 %arg2, label %bb3, label %bb5
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bb3: ; preds = %bb2
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switch i32 undef, label %infloop [
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@ -41,7 +41,7 @@ bb5: ; preds = %bb2
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.loopexit: ; preds = %bb5, %bb4, %bb3, %.exit3
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%.04 = phi i32 [ %tmp, %bb4 ], [ undef, %bb3 ], [ undef, %.exit3 ], [ undef, %bb5 ] ; <i32> [#uses=2]
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br i1 undef, label %bb8, label %bb6
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br i1 %arg2, label %bb8, label %bb6
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bb6: ; preds = %.loopexit
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%tmp7 = tail call fastcc i32 @func(ptr %arg, i32 %.04, i32 undef) nounwind ssp ; <i32> [#uses=0]
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@ -26,7 +26,7 @@ __ABContainsLabel.exit:
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ret i1 %cmp
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}
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define void @func_37() noreturn nounwind readonly {
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define void @func_37(i1 %arg) noreturn nounwind readonly {
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entry:
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br label %for.body
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@ -34,7 +34,7 @@ for.body: ; preds = %for.inc8, %entry
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%indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.inc8 ]
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%sub.i = add i64 undef, %indvar
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%cmp.i = icmp eq i64 %sub.i, -9223372036854775808
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br i1 undef, label %for.inc8, label %for.cond4
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br i1 %arg, label %for.inc8, label %for.cond4
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for.cond4: ; preds = %for.cond4, %for.body
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br label %for.cond4
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@ -7,9 +7,9 @@ target triple = "xcore-xmos-elf"
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%struct.object = type { ptr, ptr, ptr, %union.anon, %0, ptr }
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%union.anon = type { ptr }
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define ptr @search_object(ptr %ob, ptr %pc) {
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define ptr @search_object(ptr %ob, ptr %pc, i1 %arg) {
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entry:
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br i1 undef, label %bb3.i15.i.i, label %bb2
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br i1 %arg, label %bb3.i15.i.i, label %bb2
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bb3.i15.i.i: ; preds = %bb3.i15.i.i, %entry
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%indvar.i.i.i = phi i32 [ %indvar.next.i.i.i, %bb3.i15.i.i ], [ 0, %entry ] ; <i32> [#uses=2]
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