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[SandboxVec][BottomUpVec] Add -sbvec-stop-bndl flag for debugging (#129132)
This patch adds a helper flag for bisection debugging. This flag force-stops vectorization after this many bundles have been considered for vectorization. Using -sbvec-stop-bndl=0 will not vectorize the code at all.
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@ -98,6 +98,7 @@ enum class ResultReason {
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CantSchedule,
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Unimplemented,
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Infeasible,
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ForcePackForDebugging,
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};
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#ifndef NDEBUG
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@ -142,6 +143,8 @@ struct ToStr {
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return "Unimplemented";
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case ResultReason::Infeasible:
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return "Infeasible";
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case ResultReason::ForcePackForDebugging:
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return "ForcePackForDebugging";
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}
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llvm_unreachable("Unknown ResultReason enum");
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}
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@ -347,6 +350,10 @@ public:
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// TODO: Try to remove the SkipScheduling argument by refactoring the tests.
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const LegalityResult &canVectorize(ArrayRef<Value *> Bndl,
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bool SkipScheduling = false);
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/// \Returns a Pack with reason 'ForcePackForDebugging'.
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const LegalityResult &getForcedPackForDebugging() {
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return createLegalityResult<Pack>(ResultReason::ForcePackForDebugging);
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}
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void clear();
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};
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@ -81,6 +81,10 @@ class BottomUpVec final : public RegionPass {
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#endif // NDEBUG
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};
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ActionsVector Actions;
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/// Helper counter for debugging. It counts the bundles that we attempt to
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/// vectorize in vectorizeRec().
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unsigned DebugBndlCnt = 0;
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/// Recursively try to vectorize \p Bndl and its operands. This populates the
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/// `Actions` vector.
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Action *vectorizeRec(ArrayRef<Value *> Bndl, ArrayRef<Value *> UserBndl,
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@ -32,6 +32,12 @@ static cl::opt<unsigned long>
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cl::desc("Vectorize if the invocation count is < than this. 0 "
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"disables vectorization."));
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static constexpr const unsigned long StopBundleDisabled =
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std::numeric_limits<unsigned long>::max();
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static cl::opt<unsigned long>
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StopBundle("sbvec-stop-bndl", cl::init(StopBundleDisabled), cl::Hidden,
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cl::desc("Vectorize up to this many bundles."));
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namespace sandboxir {
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static SmallVector<Value *, 4> getOperand(ArrayRef<Value *> Bndl,
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@ -270,7 +276,10 @@ void BottomUpVec::collectPotentiallyDeadInstrs(ArrayRef<Value *> Bndl) {
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Action *BottomUpVec::vectorizeRec(ArrayRef<Value *> Bndl,
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ArrayRef<Value *> UserBndl, unsigned Depth) {
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const auto &LegalityRes = Legality->canVectorize(Bndl);
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bool StopForDebug =
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DebugBndlCnt++ >= StopBundle && StopBundle != StopBundleDisabled;
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const auto &LegalityRes = StopForDebug ? Legality->getForcedPackForDebugging()
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: Legality->canVectorize(Bndl);
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auto ActionPtr =
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std::make_unique<Action>(&LegalityRes, Bndl, UserBndl, Depth);
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SmallVector<Action *> Operands;
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@ -469,6 +478,7 @@ bool BottomUpVec::tryVectorize(ArrayRef<Value *> Bndl) {
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DeadInstrCandidates.clear();
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Legality->clear();
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Actions.clear();
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DebugBndlCnt = 0;
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vectorizeRec(Bndl, {}, /*Depth=*/0);
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emitVectors();
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tryEraseDeadInstrs();
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71
llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
Normal file
71
llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
Normal file
@ -0,0 +1,71 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes=sandbox-vectorizer -sbvec-vec-reg-bits=1024 -sbvec-allow-non-pow2 -sbvec-passes="seed-collection<tr-save,bottom-up-vec,tr-accept>" -sbvec-stop-bndl=0 %s -S | FileCheck %s --check-prefix=STOP0
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; RUN: opt -passes=sandbox-vectorizer -sbvec-vec-reg-bits=1024 -sbvec-allow-non-pow2 -sbvec-passes="seed-collection<tr-save,bottom-up-vec,tr-accept>" -sbvec-stop-bndl=1 %s -S | FileCheck %s --check-prefix=STOP1
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; RUN: opt -passes=sandbox-vectorizer -sbvec-vec-reg-bits=1024 -sbvec-allow-non-pow2 -sbvec-passes="seed-collection<tr-save,bottom-up-vec,tr-accept>" -sbvec-stop-bndl=2 %s -S | FileCheck %s --check-prefix=STOP2
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; RUN: opt -passes=sandbox-vectorizer -sbvec-vec-reg-bits=1024 -sbvec-allow-non-pow2 -sbvec-passes="seed-collection<tr-save,bottom-up-vec,tr-accept>" -sbvec-stop-bndl=3 %s -S | FileCheck %s --check-prefix=STOP3
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; RUN: opt -passes=sandbox-vectorizer -sbvec-vec-reg-bits=1024 -sbvec-allow-non-pow2 -sbvec-passes="seed-collection<tr-save,bottom-up-vec,tr-accept>" %s -S | FileCheck %s --check-prefix=NOSTOP
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define void @stop_bndl(ptr %ptr) {
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; STOP0-LABEL: define void @stop_bndl(
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; STOP0-SAME: ptr [[PTR:%.*]]) {
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; STOP0-NEXT: [[PTR0:%.*]] = getelementptr float, ptr [[PTR]], i32 0
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; STOP0-NEXT: [[PTR1:%.*]] = getelementptr float, ptr [[PTR]], i32 1
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; STOP0-NEXT: [[LD0:%.*]] = load float, ptr [[PTR0]], align 4
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; STOP0-NEXT: [[LD1:%.*]] = load float, ptr [[PTR1]], align 4
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; STOP0-NEXT: [[ADD0:%.*]] = fadd float [[LD0]], 0.000000e+00
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; STOP0-NEXT: [[ADD1:%.*]] = fadd float [[LD1]], 0.000000e+00
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; STOP0-NEXT: store float [[ADD0]], ptr [[PTR0]], align 4
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; STOP0-NEXT: store float [[ADD1]], ptr [[PTR1]], align 4
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; STOP0-NEXT: ret void
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;
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; STOP1-LABEL: define void @stop_bndl(
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; STOP1-SAME: ptr [[PTR:%.*]]) {
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; STOP1-NEXT: [[PTR0:%.*]] = getelementptr float, ptr [[PTR]], i32 0
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; STOP1-NEXT: [[PTR1:%.*]] = getelementptr float, ptr [[PTR]], i32 1
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; STOP1-NEXT: [[LD0:%.*]] = load float, ptr [[PTR0]], align 4
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; STOP1-NEXT: [[LD1:%.*]] = load float, ptr [[PTR1]], align 4
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; STOP1-NEXT: [[ADD0:%.*]] = fadd float [[LD0]], 0.000000e+00
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; STOP1-NEXT: [[ADD1:%.*]] = fadd float [[LD1]], 0.000000e+00
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; STOP1-NEXT: [[PACK:%.*]] = insertelement <2 x float> poison, float [[ADD0]], i32 0
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; STOP1-NEXT: [[PACK1:%.*]] = insertelement <2 x float> [[PACK]], float [[ADD1]], i32 1
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; STOP1-NEXT: store <2 x float> [[PACK1]], ptr [[PTR0]], align 4
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; STOP1-NEXT: ret void
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;
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; STOP2-LABEL: define void @stop_bndl(
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; STOP2-SAME: ptr [[PTR:%.*]]) {
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; STOP2-NEXT: [[PTR0:%.*]] = getelementptr float, ptr [[PTR]], i32 0
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; STOP2-NEXT: [[PTR1:%.*]] = getelementptr float, ptr [[PTR]], i32 1
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; STOP2-NEXT: [[LD0:%.*]] = load float, ptr [[PTR0]], align 4
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; STOP2-NEXT: [[LD1:%.*]] = load float, ptr [[PTR1]], align 4
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; STOP2-NEXT: [[PACK:%.*]] = insertelement <2 x float> poison, float [[LD0]], i32 0
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; STOP2-NEXT: [[PACK1:%.*]] = insertelement <2 x float> [[PACK]], float [[LD1]], i32 1
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; STOP2-NEXT: [[VEC:%.*]] = fadd <2 x float> [[PACK1]], zeroinitializer
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; STOP2-NEXT: store <2 x float> [[VEC]], ptr [[PTR0]], align 4
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; STOP2-NEXT: ret void
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;
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; STOP3-LABEL: define void @stop_bndl(
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; STOP3-SAME: ptr [[PTR:%.*]]) {
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; STOP3-NEXT: [[PTR0:%.*]] = getelementptr float, ptr [[PTR]], i32 0
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; STOP3-NEXT: [[VECL:%.*]] = load <2 x float>, ptr [[PTR0]], align 4
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; STOP3-NEXT: [[VEC:%.*]] = fadd <2 x float> [[VECL]], zeroinitializer
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; STOP3-NEXT: store <2 x float> [[VEC]], ptr [[PTR0]], align 4
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; STOP3-NEXT: ret void
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;
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; NOSTOP-LABEL: define void @stop_bndl(
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; NOSTOP-SAME: ptr [[PTR:%.*]]) {
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; NOSTOP-NEXT: [[PTR0:%.*]] = getelementptr float, ptr [[PTR]], i32 0
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; NOSTOP-NEXT: [[VECL:%.*]] = load <2 x float>, ptr [[PTR0]], align 4
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; NOSTOP-NEXT: [[VEC:%.*]] = fadd <2 x float> [[VECL]], zeroinitializer
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; NOSTOP-NEXT: store <2 x float> [[VEC]], ptr [[PTR0]], align 4
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; NOSTOP-NEXT: ret void
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;
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%ptr0 = getelementptr float, ptr %ptr, i32 0
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%ptr1 = getelementptr float, ptr %ptr, i32 1
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%ld0 = load float, ptr %ptr0
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%ld1 = load float, ptr %ptr1
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%add0 = fadd float %ld0, 0.0
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%add1 = fadd float %ld1, 0.0
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store float %add0, ptr %ptr0
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store float %add1, ptr %ptr1
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ret void
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}
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