From e8d44841c5d5f1e7ca2013ab2ae23bb4cec45d1e Mon Sep 17 00:00:00 2001 From: KAWASHIMA Takahiro Date: Tue, 14 Feb 2023 19:09:23 +0900 Subject: [PATCH] [docs] Update the ACLE URL --- clang/docs/LanguageExtensions.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/clang/docs/LanguageExtensions.rst b/clang/docs/LanguageExtensions.rst index 99f8cd59abec..faebc024df11 100644 --- a/clang/docs/LanguageExtensions.rst +++ b/clang/docs/LanguageExtensions.rst @@ -808,7 +808,7 @@ includes all 64-bit and all recent 32-bit processors. ``__fp16`` is a storage and interchange format only. This means that values of ``__fp16`` are immediately promoted to (at least) ``float`` when used in arithmetic operations, so that e.g. the result of adding two ``__fp16`` values has type ``float``. -The behavior of ``__fp16`` is specified by the ARM C Language Extensions (`ACLE `_). +The behavior of ``__fp16`` is specified by the Arm C Language Extensions (`ACLE `_). Clang uses the ``binary16`` format from IEEE 754-2008 for ``__fp16``, not the ARM alternative format. @@ -3791,8 +3791,8 @@ ARM/AArch64 Language Extensions Memory Barrier Intrinsics ^^^^^^^^^^^^^^^^^^^^^^^^^ Clang implements the ``__dmb``, ``__dsb`` and ``__isb`` intrinsics as defined -in the `ARM C Language Extensions Release 2.0 -`_. +in the `Arm C Language Extensions +`_. Note that these intrinsics are implemented as motion barriers that block reordering of memory accesses and side effect instructions. Other instructions like simple arithmetic may be reordered around the intrinsic. If you expect to