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Created using spr 1.3.5-bogner
This commit is contained in:
Fangrui Song 2025-04-06 00:29:31 -07:00
commit f0da67f782
38 changed files with 111 additions and 120 deletions
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4
llvm/include/llvm/MC/MCExpr.h
View File

@ -256,8 +256,8 @@ public:
const MCSymbol &getSymbol() const { return *Symbol; }
// Some targets encode the relocation specifier within SymA using
// MCSymbolRefExpr::SubclassData and access it via getAccessVariant(), though
// this method is now deprecated.
// MCSymbolRefExpr::SubclassData, which is copied to MCValue::Specifier,
// though this method is now deprecated.
VariantKind getKind() const {
return (VariantKind)(getSubclassData() & VariantKindMask);
}

18
llvm/include/llvm/MC/MCValue.h
View File

@ -32,12 +32,16 @@ class MCValue {
int64_t Cst = 0;
uint32_t Specifier = 0;
void print(raw_ostream &OS) const;
/// Print the value to stderr.
void dump() const;
public:
friend class MCAssembler;
friend class MCExpr;
MCValue() = default;
int64_t getConstant() const { return Cst; }
uint32_t getRefKind() const { return Specifier; }
uint32_t getSpecifier() const { return Specifier; }
void setSpecifier(uint32_t S) { Specifier = S; }
@ -47,18 +51,6 @@ public:
/// Is this an absolute (as opposed to relocatable) value.
bool isAbsolute() const { return !SymA && !SymB; }
/// Print the value to the stream \p OS.
void print(raw_ostream &OS) const;
/// Print the value to stderr.
void dump() const;
// Get the relocation specifier from SymA. This is a workaround for targets
// that do not use MCValue::Specifier.
uint16_t getSymSpecifier() const { return Specifier; }
// Get the relocation specifier from SymA, or 0 when SymA is null.
uint16_t getAccessVariant() const { return Specifier; }
static MCValue get(const MCSymbol *SymA, const MCSymbol *SymB = nullptr,
int64_t Val = 0, uint32_t Specifier = 0) {
MCValue R;

4
llvm/lib/MC/MCAssembler.cpp
View File

@ -122,11 +122,11 @@ bool MCAssembler::isThumbFunc(const MCSymbol *Symbol) const {
if (!Expr->evaluateAsRelocatable(V, nullptr))
return false;
if (V.getSubSym() || V.getRefKind() != MCSymbolRefExpr::VK_None)
if (V.getSubSym() || V.getSpecifier() != MCSymbolRefExpr::VK_None)
return false;
auto *Sym = V.getAddSym();
if (!Sym || V.getSymSpecifier())
if (!Sym || V.getSpecifier())
return false;
if (!isThumbFunc(Sym))

4
llvm/lib/MC/MCExpr.cpp
View File

@ -291,7 +291,7 @@ bool MCExpr::evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm,
// Value with RefKind (e.g. %hi(0xdeadbeef) in MIPS) is not considered
// absolute (the value is unknown at parse time), even if it might be resolved
// by evaluateFixup.
return IsRelocatable && Value.isAbsolute() && Value.getRefKind() == 0;
return IsRelocatable && Value.isAbsolute() && Value.getSpecifier() == 0;
}
/// Helper method for \see EvaluateSymbolAdd().
@ -533,7 +533,7 @@ bool MCExpr::evaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm,
// If the reference has a variant kind, we can only handle expressions
// which evaluate exactly to a single unadorned symbol. Attach the
// original VariantKind to SymA of the result.
if (Res.getRefKind() != MCSymbolRefExpr::VK_None ||
if (Res.getSpecifier() != MCSymbolRefExpr::VK_None ||
!Res.getAddSym() || Res.getSubSym() || Res.getConstant())
return false;
Res.Specifier = Kind;

4
llvm/lib/MC/MCValue.cpp
View File

@ -24,8 +24,8 @@ void MCValue::print(raw_ostream &OS) const {
// FIXME: prints as a number, which isn't ideal. But the meaning will be
// target-specific anyway.
if (getRefKind())
OS << ':' << getRefKind() << ':';
if (getSpecifier())
OS << ':' << getSpecifier() << ':';
SymA->print(OS, nullptr);

2
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
View File

@ -8224,7 +8224,7 @@ bool AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
return false;
if (Res.getAddSym())
DarwinSpec = AArch64MCExpr::Specifier(Res.getSymSpecifier());
DarwinSpec = AArch64MCExpr::Specifier(Res.getSpecifier());
Addend = Res.getConstant();
// It's some symbol reference + a constant addend, but really

6
llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
View File

@ -222,7 +222,7 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target,
return Value >> 4;
case AArch64::fixup_aarch64_movw: {
AArch64MCExpr::Specifier RefKind =
static_cast<AArch64MCExpr::Specifier>(Target.getRefKind());
static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
if (AArch64MCExpr::getSymbolLoc(RefKind) != AArch64MCExpr::VK_ABS &&
AArch64MCExpr::getSymbolLoc(RefKind) != AArch64MCExpr::VK_SABS) {
if (!RefKind) {
@ -422,7 +422,7 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
bool IsResolved,
const MCSubtargetInfo *STI) const {
if (Fixup.getTargetKind() == FK_Data_8 && TheTriple.isOSBinFormatELF()) {
auto RefKind = static_cast<AArch64MCExpr::Specifier>(Target.getRefKind());
auto RefKind = static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
AArch64MCExpr::Specifier SymLoc = AArch64MCExpr::getSymbolLoc(RefKind);
if (SymLoc == AArch64AuthMCExpr::VK_AUTH ||
SymLoc == AArch64AuthMCExpr::VK_AUTHADDR) {
@ -480,7 +480,7 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
// FIXME: getFixupKindInfo() and getFixupKindNumBytes() could be fixed to
// handle this more cleanly. This may affect the output of -show-mc-encoding.
AArch64MCExpr::Specifier RefKind =
static_cast<AArch64MCExpr::Specifier>(Target.getRefKind());
static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
if (AArch64MCExpr::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS ||
(!RefKind && Fixup.getTargetKind() == AArch64::fixup_aarch64_movw)) {
// If the immediate is negative, generate MOVN else MOVZ.

10
llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
View File

@ -112,7 +112,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
AArch64MCExpr::Specifier RefKind =
static_cast<AArch64MCExpr::Specifier>(Target.getRefKind());
static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
AArch64MCExpr::Specifier SymLoc = AArch64MCExpr::getSymbolLoc(RefKind);
bool IsNC = AArch64MCExpr::isNotChecked(RefKind);
@ -137,7 +137,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
case FK_Data_2:
return R_CLS(PREL16);
case FK_Data_4: {
return AArch64MCExpr::Specifier(Target.getAccessVariant()) ==
return AArch64MCExpr::Specifier(Target.getSpecifier()) ==
AArch64MCExpr::VK_PLT
? R_CLS(PLT32)
: R_CLS(PREL32);
@ -249,7 +249,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
case FK_Data_2:
return R_CLS(ABS16);
case FK_Data_4:
return (!IsILP32 && AArch64MCExpr::Specifier(Target.getAccessVariant()) ==
return (!IsILP32 && AArch64MCExpr::Specifier(Target.getSpecifier()) ==
AArch64MCExpr::VK_GOTPCREL)
? ELF::R_AARCH64_GOTPCREL32
: R_CLS(ABS32);
@ -543,10 +543,10 @@ bool AArch64ELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
if (Val.getAddSym() && cast<MCSymbolELF>(Val.getAddSym())->isMemtag())
return true;
if ((Val.getRefKind() & AArch64MCExpr::VK_GOT) == AArch64MCExpr::VK_GOT)
if ((Val.getSpecifier() & AArch64MCExpr::VK_GOT) == AArch64MCExpr::VK_GOT)
return true;
return is_contained({AArch64MCExpr::VK_GOTPCREL, AArch64MCExpr::VK_PLT},
AArch64MCExpr::Specifier(Val.getAccessVariant()));
AArch64MCExpr::Specifier(Val.getSpecifier()));
}
std::unique_ptr<MCObjectTargetWriter>

10
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
View File

@ -192,7 +192,7 @@ void AArch64MachObjectWriter::recordRelocation(
}
if (!getAArch64FixupKindMachOInfo(
Fixup, Type, AArch64MCExpr::Specifier(Target.getSymSpecifier()),
Fixup, Type, AArch64MCExpr::Specifier(Target.getSpecifier()),
Log2Size, Asm)) {
Asm.getContext().reportError(Fixup.getLoc(), "unknown AArch64 fixup kind!");
return;
@ -221,7 +221,7 @@ void AArch64MachObjectWriter::recordRelocation(
// Check for "_foo@got - .", which comes through here as:
// Ltmp0:
// ... _foo@got - Ltmp0
if (Target.getSymSpecifier() == AArch64MCExpr::M_GOT &&
if (Target.getSpecifier() == AArch64MCExpr::M_GOT &&
Asm.getSymbolOffset(*B) ==
Asm.getFragmentOffset(*Fragment) + Fixup.getOffset()) {
// SymB is the PC, so use a PC-rel pointer-to-GOT relocation.
@ -232,7 +232,7 @@ void AArch64MachObjectWriter::recordRelocation(
MRE.r_word1 = (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
Writer->addRelocation(A_Base, Fragment->getParent(), MRE);
return;
} else if (Target.getSymSpecifier() != AArch64MCExpr::None) {
} else if (Target.getSpecifier() != AArch64MCExpr::None) {
// Otherwise, neither symbol can be modified.
Asm.getContext().reportError(Fixup.getLoc(),
"unsupported relocation of modified symbol");
@ -391,8 +391,8 @@ void AArch64MachObjectWriter::recordRelocation(
Value = 0;
}
if (Target.getRefKind() == AArch64MCExpr::VK_AUTH ||
Target.getRefKind() == AArch64MCExpr::VK_AUTHADDR) {
if (Target.getSpecifier() == AArch64MCExpr::VK_AUTH ||
Target.getSpecifier() == AArch64MCExpr::VK_AUTHADDR) {
auto *Expr = cast<AArch64AuthMCExpr>(Fixup.getValue());
assert(Type == MachO::ARM64_RELOC_UNSIGNED);

5
llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
View File

@ -61,8 +61,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType(
FixupKind = FK_PCRel_4;
}
auto Modifier =
Target.isAbsolute() ? AArch64MCExpr::None : Target.getSymSpecifier();
auto Spec = Target.getSpecifier();
const MCExpr *Expr = Fixup.getValue();
if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
@ -98,7 +97,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType(
return COFF::IMAGE_REL_ARM64_REL32;
case FK_Data_4:
switch (Modifier) {
switch (Spec) {
default:
return COFF::IMAGE_REL_ARM64_ADDR32;
case MCSymbolRefExpr::VK_COFF_IMGREL32:

2
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
View File

@ -46,7 +46,7 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_AMDGPU_ABS32_LO;
}
switch (AMDGPUMCExpr::Specifier(Target.getAccessVariant())) {
switch (AMDGPUMCExpr::Specifier(Target.getSpecifier())) {
default:
break;
case AMDGPUMCExpr::S_GOTPCREL:

2
llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
View File

@ -82,7 +82,7 @@ unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
unsigned Kind = Fixup.getTargetKind();
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
uint8_t Specifier = Target.getAccessVariant();
uint8_t Specifier = Target.getSpecifier();
auto CheckFDPIC = [&](uint32_t Type) {
if (getOSABI() != ELF::ELFOSABI_ARM_FDPIC)
Ctx.reportError(Fixup.getLoc(),

2
llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
View File

@ -44,7 +44,7 @@ unsigned ARMWinCOFFObjectWriter::getRelocType(MCContext &Ctx,
const MCFixup &Fixup,
bool IsCrossSection,
const MCAsmBackend &MAB) const {
auto Spec = Target.getAddSym() ? Target.getSymSpecifier() : 0;
auto Spec = Target.getSpecifier();
unsigned FixupKind = Fixup.getKind();
if (IsCrossSection) {
if (FixupKind != FK_Data_4) {

2
llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
View File

@ -40,7 +40,7 @@ unsigned AVRELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
const unsigned Kind = Fixup.getTargetKind();
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
auto Modifier = AVRMCExpr::Specifier(Target.getAccessVariant());
auto Modifier = AVRMCExpr::Specifier(Target.getSpecifier());
switch ((unsigned)Fixup.getKind()) {
case FK_Data_1:
switch (Modifier) {

2
llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
View File

@ -81,7 +81,7 @@ bool AVRMCExpr::evaluateAsRelocatableImpl(MCValue &Result,
return false;
auto Spec = AVRMCExpr::VK_None;
if (Value.getSymSpecifier() != MCSymbolRefExpr::VK_None)
if (Value.getSpecifier() != MCSymbolRefExpr::VK_None)
return false;
assert(!Value.getSubSym());
if (specifier == VK_PM)

6
llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFObjectWriter.cpp
View File

@ -42,9 +42,9 @@ unsigned CSKYELFObjectWriter::getRelocType(MCContext &Ctx,
const MCExpr *Expr = Fixup.getValue();
// Determine the type of the relocation
unsigned Kind = Fixup.getTargetKind();
uint8_t Modifier = Target.getAccessVariant();
uint8_t Modifier = Target.getSpecifier();
switch (Target.getRefKind()) {
switch (Target.getSpecifier()) {
case CSKYMCExpr::VK_TLSIE:
case CSKYMCExpr::VK_TLSLE:
case CSKYMCExpr::VK_TLSGD:
@ -170,7 +170,7 @@ unsigned CSKYELFObjectWriter::getRelocType(MCContext &Ctx,
bool CSKYELFObjectWriter::needsRelocateWithSymbol(const MCValue &V,
const MCSymbol &,
unsigned Type) const {
switch (V.getRefKind()) {
switch (V.getSpecifier()) {
case CSKYMCExpr::VK_PLT:
case CSKYMCExpr::VK_GOT:
return true;

2
llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
View File

@ -1249,7 +1249,7 @@ bool HexagonAsmParser::parseInstruction(OperandVector &Operands) {
MCValue Value;
if (Expr->evaluateAsRelocatable(Value, nullptr)) {
if (!Value.isAbsolute()) {
switch (HexagonMCExpr::VariantKind(Value.getAccessVariant())) {
switch (HexagonMCExpr::VariantKind(Value.getSpecifier())) {
case HexagonMCExpr::VK_TPREL:
case HexagonMCExpr::VK_DTPREL:
// Don't lazy extend these expression variants

2
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
View File

@ -42,7 +42,7 @@ unsigned HexagonELFObjectWriter::getRelocType(MCContext &Ctx,
MCValue const &Target,
MCFixup const &Fixup,
bool IsPCRel) const {
auto Variant = HexagonMCExpr::VariantKind(Target.getAccessVariant());
auto Variant = HexagonMCExpr::VariantKind(Target.getSpecifier());
switch (Variant) {
case HexagonMCExpr::VK_GD_GOT:
case HexagonMCExpr::VK_LD_GOT:

2
llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
View File

@ -707,7 +707,7 @@ bool LoongArchAsmParser::classifySymbolRef(const MCExpr *Expr,
MCValue Res;
if (Expr->evaluateAsRelocatable(Res, nullptr))
return Res.getRefKind() == LoongArchMCExpr::VK_None;
return Res.getSpecifier() == LoongArchMCExpr::VK_None;
return false;
}

2
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
View File

@ -452,7 +452,7 @@ bool LoongArchAsmBackend::handleAddSubRelocations(const MCAssembler &Asm,
const MCFixup &Fixup,
const MCValue &Target,
uint64_t &FixedValue) const {
assert(Target.getRefKind() == 0 &&
assert(Target.getSpecifier() == 0 &&
"relocatable SymA-SymB cannot have relocation specifier");
std::pair<MCFixupKind, MCFixupKind> FK;
uint64_t FixedValueA, FixedValueB;

2
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
View File

@ -50,7 +50,7 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel) const {
switch (Target.getRefKind()) {
switch (Target.getSpecifier()) {
case LoongArchMCExpr::VK_TLS_LE_HI20:
case LoongArchMCExpr::VK_TLS_IE_PC_HI20:
case LoongArchMCExpr::VK_TLS_IE_HI20:

2
llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
View File

@ -65,7 +65,7 @@ unsigned M68kELFObjectWriter::getRelocType(MCContext &Ctx,
const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel) const {
auto Specifier = M68kMCExpr::Specifier(Target.getAccessVariant());
auto Specifier = M68kMCExpr::Specifier(Target.getSpecifier());
unsigned Kind = Fixup.getKind();
M68kRelType Type = getType(Kind, Specifier, IsPCRel);
switch (Specifier) {

2
llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
View File

@ -162,7 +162,7 @@ unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
switch (Target.getRefKind()) {
switch (Target.getSpecifier()) {
case MipsMCExpr::MEK_DTPREL:
case MipsMCExpr::MEK_DTPREL_HI:
case MipsMCExpr::MEK_DTPREL_LO:

68
llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
View File

@ -38,25 +38,15 @@ PPCELFObjectWriter::PPCELFObjectWriter(bool Is64Bit, uint8_t OSABI)
Is64Bit ? ELF::EM_PPC64 : ELF::EM_PPC,
/*HasRelocationAddend*/ true) {}
static PPCMCExpr::Specifier getAccessVariant(const MCValue &Target,
const MCFixup &Fixup) {
const MCExpr *Expr = Fixup.getValue();
if (Expr->getKind() != MCExpr::Target)
return PPCMCExpr::Specifier(Target.getAccessVariant());
return cast<PPCMCExpr>(Expr)->getSpecifier();
}
unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel) const {
MCFixupKind Kind = Fixup.getKind();
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
auto RefKind = static_cast<PPCMCExpr::Specifier>(Target.getRefKind());
auto Modifier = getAccessVariant(Target, Fixup);
switch (PPCMCExpr::Specifier(Modifier)) {
SMLoc Loc = Fixup.getValue()->getLoc();
auto Spec = static_cast<PPCMCExpr::Specifier>(Target.getSpecifier());
switch (Spec) {
case PPCMCExpr::VK_DTPMOD:
case PPCMCExpr::VK_DTPREL:
case PPCMCExpr::VK_DTPREL_HA:
@ -108,7 +98,7 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
}
// determine the type of the relocation
unsigned Type;
unsigned Type = 0;
if (IsPCRel) {
switch (Fixup.getTargetKind()) {
default:
@ -116,8 +106,10 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
case PPC::fixup_ppc_br24:
case PPC::fixup_ppc_br24abs:
case PPC::fixup_ppc_br24_notoc:
switch (Modifier) {
default: llvm_unreachable("Unsupported Modifier");
switch (Spec) {
default:
Ctx.reportError(Loc, "unsupported relocation type");
break;
case PPCMCExpr::VK_None:
Type = ELF::R_PPC_REL24;
break;
@ -137,9 +129,9 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
Type = ELF::R_PPC_REL14;
break;
case PPC::fixup_ppc_half16:
switch (RefKind) {
switch (Spec) {
default:
Ctx.reportError(Fixup.getLoc(), "invalid VariantKind");
Ctx.reportError(Loc, "unsupported relocation type");
return ELF::R_PPC_NONE;
case PPCMCExpr::VK_None:
return ELF::R_PPC_REL16;
@ -153,13 +145,13 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
break;
case PPC::fixup_ppc_half16ds:
case PPC::fixup_ppc_half16dq:
Target.print(errs());
errs() << '\n';
report_fatal_error("Invalid PC-relative half16ds relocation");
Ctx.reportError(Loc, "unsupported relocation type");
break;
case PPC::fixup_ppc_pcrel34:
switch (Modifier) {
switch (Spec) {
default:
llvm_unreachable("Unsupported Modifier for fixup_ppc_pcrel34");
Ctx.reportError(Loc, "unsupported relocation type");
break;
case PPCMCExpr::VK_PCREL:
Type = ELF::R_PPC64_PCREL34;
break;
@ -196,9 +188,10 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
Type = ELF::R_PPC_ADDR14; // XXX: or BRNTAKEN?_
break;
case PPC::fixup_ppc_half16:
switch (Modifier) {
switch (Spec) {
default:
llvm_unreachable("Unsupported specifier");
Ctx.reportError(Loc, "unsupported relocation type");
break;
case PPCMCExpr::VK_LO:
return ELF::R_PPC_ADDR16_LO;
case PPCMCExpr::VK_HI:
@ -371,10 +364,10 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
break;
case PPC::fixup_ppc_half16ds:
case PPC::fixup_ppc_half16dq:
switch (Modifier) {
switch (Spec) {
default:
Ctx.reportError(Fixup.getLoc(), "invalid VariantKind");
return ELF::R_PPC64_NONE;
Ctx.reportError(Loc, "unsupported relocation type");
break;
case PPCMCExpr::VK_LO:
return ELF::R_PPC64_ADDR16_LO_DS;
case PPCMCExpr::VK_None:
@ -419,8 +412,10 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
}
break;
case PPC::fixup_ppc_nofixup:
switch (Modifier) {
default: llvm_unreachable("Unsupported Modifier");
switch (Spec) {
default:
Ctx.reportError(Loc, "unsupported relocation type");
break;
case PPCMCExpr::VK_TLSGD:
if (is64Bit())
Type = ELF::R_PPC64_TLSGD;
@ -445,9 +440,10 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
}
break;
case PPC::fixup_ppc_imm34:
switch (Modifier) {
switch (Spec) {
default:
report_fatal_error("Unsupported Modifier for fixup_ppc_imm34.");
Ctx.reportError(Loc, "unsupported relocation type");
break;
case PPCMCExpr::VK_DTPREL:
Type = ELF::R_PPC64_DTPREL34;
break;
@ -457,8 +453,10 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
}
break;
case FK_Data_8:
switch (Modifier) {
default: llvm_unreachable("Unsupported Modifier");
switch (Spec) {
default:
Ctx.reportError(Loc, "unsupported relocation type");
break;
case PPCMCExpr::VK_TOCBASE:
Type = ELF::R_PPC64_TOC;
break;
@ -477,7 +475,7 @@ unsigned PPCELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
}
break;
case FK_Data_4:
switch (Modifier) {
switch (Spec) {
case PPCMCExpr::VK_DTPREL:
Type = ELF::R_PPC_DTPREL32;
break;

3
llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
View File

@ -40,8 +40,7 @@ llvm::createPPCXCOFFObjectWriter(bool Is64Bit) {
std::pair<uint8_t, uint8_t> PPCXCOFFObjectWriter::getRelocTypeAndSignSize(
const MCValue &Target, const MCFixup &Fixup, bool IsPCRel) const {
const auto Specifier =
Target.isAbsolute() ? PPCMCExpr::VK_None : Target.getSymSpecifier();
const auto Specifier = Target.getSpecifier();
// People from AIX OS team says AIX link editor does not care about
// the sign bit in the relocation entry "most" of the time.
// The system assembler seems to set the sign bit on relocation entry

4
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
View File

@ -2798,14 +2798,14 @@ bool RISCVAsmParser::classifySymbolRef(const MCExpr *Expr,
MCValue Res;
if (Expr->evaluateAsRelocatable(Res, nullptr))
return Res.getRefKind() == RISCVMCExpr::VK_None;
return Res.getSpecifier() == RISCVMCExpr::VK_None;
return false;
}
bool RISCVAsmParser::isSymbolDiff(const MCExpr *Expr) {
MCValue Res;
if (Expr->evaluateAsRelocatable(Res, nullptr)) {
return Res.getRefKind() == RISCVMCExpr::VK_None && Res.getAddSym() &&
return Res.getSpecifier() == RISCVMCExpr::VK_None && Res.getAddSym() &&
Res.getSubSym();
}
return false;

2
llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
View File

@ -628,7 +628,7 @@ bool RISCVAsmBackend::handleAddSubRelocations(const MCAssembler &Asm,
const MCFixup &Fixup,
const MCValue &Target,
uint64_t &FixedValue) const {
assert(Target.getRefKind() == 0 &&
assert(Target.getSpecifier() == 0 &&
"relocatable SymA-SymB cannot have relocation specifier");
uint64_t FixedValueA, FixedValueB;
unsigned TA = 0, TB = 0;

2
llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
View File

@ -56,7 +56,7 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
auto Spec = RISCVMCExpr::Specifier(Target.getRefKind());
auto Spec = RISCVMCExpr::Specifier(Target.getSpecifier());
switch (Spec) {
case RISCVMCExpr::VK_TPREL_HI:
case RISCVMCExpr::VK_TLS_GOT_HI:

2
llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
View File

@ -46,7 +46,7 @@ unsigned SparcELFObjectWriter::getRelocType(MCContext &Ctx,
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
switch (Target.getRefKind()) {
switch (Target.getSpecifier()) {
case SparcMCExpr::VK_TLS_GD_HI22:
case SparcMCExpr::VK_TLS_GD_LO10:
case SparcMCExpr::VK_TLS_GD_ADD:

4
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
View File

@ -158,7 +158,7 @@ unsigned SystemZELFObjectWriter::getRelocType(MCContext &Ctx,
unsigned Kind = Fixup.getKind();
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
auto Specifier = SystemZMCExpr::Specifier(Target.getAccessVariant());
auto Specifier = SystemZMCExpr::Specifier(Target.getSpecifier());
switch (Specifier) {
case SystemZMCExpr::VK_INDNTPOFF:
case SystemZMCExpr::VK_NTPOFF:
@ -220,7 +220,7 @@ unsigned SystemZELFObjectWriter::getRelocType(MCContext &Ctx,
bool SystemZELFObjectWriter::needsRelocateWithSymbol(const MCValue &V,
const MCSymbol &Sym,
unsigned Type) const {
switch (V.getSymSpecifier()) {
switch (V.getSpecifier()) {
case SystemZMCExpr::VK_GOT:
case SystemZMCExpr::VK_PLT:
return true;

2
llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
View File

@ -40,7 +40,7 @@ protected:
unsigned VEELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel) const {
switch (Target.getRefKind()) {
switch (Target.getSpecifier()) {
case VEMCExpr::VK_TLS_GD_HI32:
case VEMCExpr::VK_TLS_GD_LO32:
case VEMCExpr::VK_TPOFF_HI32:

2
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
View File

@ -744,7 +744,7 @@ bool X86AsmBackend::fixupNeedsRelaxationAdvanced(const MCAssembler &Asm,
if (Fixup.getKind() == FK_Data_1) {
MCValue Target;
if (Fixup.getValue()->evaluateAsRelocatable(Target, &Asm) &&
Target.getAddSym() && Target.getSymSpecifier() == X86MCExpr::VK_ABS8)
Target.getAddSym() && Target.getSpecifier() == X86MCExpr::VK_ABS8)
return false;
}
return true;

4
llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
View File

@ -340,7 +340,7 @@ unsigned X86ELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
MCFixupKind Kind = Fixup.getKind();
if (Kind >= FirstLiteralRelocationKind)
return Kind - FirstLiteralRelocationKind;
auto Specifier = X86MCExpr::Specifier(Target.getAccessVariant());
auto Specifier = X86MCExpr::Specifier(Target.getSpecifier());
switch (Specifier) {
case X86MCExpr::VK_GOTTPOFF:
case X86MCExpr::VK_INDNTPOFF:
@ -391,7 +391,7 @@ unsigned X86ELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
bool X86ELFObjectWriter::needsRelocateWithSymbol(const MCValue &V,
const MCSymbol &Sym,
unsigned Type) const {
switch (V.getSymSpecifier()) {
switch (V.getSpecifier()) {
case X86MCExpr::VK_GOT:
case X86MCExpr::VK_PLT:
case X86MCExpr::VK_GOTPCREL:

8
llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
View File

@ -151,7 +151,7 @@ void X86MachObjectWriter::RecordX86_64Relocation(
const MCSymbol *B_Base = Writer->getAtom(*B);
// Neither symbol can be modified.
if (Target.getSymSpecifier()) {
if (Target.getSpecifier()) {
Asm.getContext().reportError(Fixup.getLoc(),
"unsupported relocation of modified symbol");
return;
@ -266,7 +266,7 @@ void X86MachObjectWriter::RecordX86_64Relocation(
return;
}
auto Specifier = Target.getSymSpecifier();
auto Specifier = Target.getSpecifier();
if (IsPCRel) {
if (IsRIPRel) {
if (Specifier == X86MCExpr::VK_GOTPCREL) {
@ -461,7 +461,7 @@ void X86MachObjectWriter::recordTLVPRelocation(MachObjectWriter *Writer,
MCValue Target,
uint64_t &FixedValue) {
const MCSymbol *SymA = Target.getAddSym();
assert(Target.getSymSpecifier() == X86MCExpr::VK_TLVP && !is64Bit() &&
assert(Target.getSpecifier() == X86MCExpr::VK_TLVP && !is64Bit() &&
"Should only be called with a 32-bit TLVP relocation!");
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
@ -503,7 +503,7 @@ void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
const MCSymbol *A = Target.getAddSym();
// If this is a 32-bit TLVP reloc it's handled a bit differently.
if (A && Target.getSymSpecifier() == X86MCExpr::VK_TLVP) {
if (A && Target.getSpecifier() == X86MCExpr::VK_TLVP) {
recordTLVPRelocation(Writer, Asm, Fragment, Fixup, Target, FixedValue);
return;
}

2
llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
View File

@ -59,7 +59,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(MCContext &Ctx,
}
}
auto Spec = Target.getAddSym() ? Target.getSymSpecifier() : 0;
auto Spec = Target.getSpecifier();
if (Is64Bit) {
switch (FixupKind) {
case FK_PCRel_4:

7
llvm/test/MC/PowerPC/ppc64-errors-emit-obj.s
View File

@ -1,7 +0,0 @@
# RUN: not --crash llvm-mc -triple powerpc64-- --filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s
# RUN: not --crash llvm-mc -triple powerpc64le-- --filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s
# CHECK: Unsupported Modifier for fixup_ppc_imm34.
paddi 3, 13, symbol@toc, 0

7
llvm/test/MC/PowerPC/pr24686.s
View File

@ -1,7 +0,0 @@
# RUN: not --crash llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj %s \
# RUN: 2>&1 | FileCheck %s
_stext:
ld %r5, p_end - _stext(%r5)
# CHECK: LLVM ERROR: Invalid PC-relative half16ds relocation

17
llvm/test/MC/PowerPC/relocation-specifier-err.s Normal file
View File

@ -0,0 +1,17 @@
# RUN: not llvm-mc -triple powerpc64 --filetype=obj %s -o %t 2>&1 | FileCheck %s
# RUN: not llvm-mc -triple powerpc64le --filetype=obj %s -o %t 2>&1 | FileCheck %s
# CHECK: [[#@LINE+1]]:4: error: unsupported relocation type
bl foo@toc
# CHECK: [[#@LINE+1]]:12: error: unsupported relocation type
addi 3, 3, foo@plt
# CHECK: [[#@LINE+1]]:14: error: unsupported relocation type
paddi 3, 13, foo@toc, 0
# CHECK: [[#@LINE+1]]:15: error: unsupported relocation type
ld %r5, p_end - .(%r5)
# CHECK: [[#@LINE+1]]:7: error: unsupported relocation type
.quad foo@toc