From f33e3d422d8adf7591d510aa299c884abfc8ffb0 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Mon, 20 Jan 2025 16:29:23 +0000 Subject: [PATCH] [AMDGPU] Fix DAG types for V_MAD_I64_I32 and V_MAD_U64_U32. NFC. (#123629) These instructions return a 64-bit result and a 1-bit carry, unlike smul_lohi and umul_lohi which return a pair of 32-bit results. This does not appear to make any difference in practice because the DAG types are not used for anything before these nodes are converted to MachineInstrs. --- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp index 9fa9cccd3e3e..6d5c3b5e0742 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp @@ -1045,7 +1045,8 @@ void AMDGPUDAGToDAGISel::SelectMUL_LOHI(SDNode *N) { SDValue Zero = CurDAG->getTargetConstant(0, SL, MVT::i64); SDValue Clamp = CurDAG->getTargetConstant(0, SL, MVT::i1); SDValue Ops[] = {N->getOperand(0), N->getOperand(1), Zero, Clamp}; - SDNode *Mad = CurDAG->getMachineNode(Opc, SL, N->getVTList(), Ops); + SDNode *Mad = CurDAG->getMachineNode( + Opc, SL, CurDAG->getVTList(MVT::i64, MVT::i1), Ops); if (!SDValue(N, 0).use_empty()) { SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32); SDNode *Lo = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, SL,