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72 Commits

Author SHA1 Message Date
Lauro Ramos Venancio
0eb70ebbe5 bugfix: SP wasn't updated for varargs when frame pointer was eliminated. 
llvm-svn: 34537
 2007-02-23 21:53:48 +00:00
Evan Cheng
15af662314 Add option to turn on register scavenger; By default, spills kills the register being stored. 
llvm-svn: 34514
 2007-02-23 01:09:11 +00:00
Jim Laskey
3796abea0f Support to provide exception and selector registers. 
llvm-svn: 34482
 2007-02-21 22:54:50 +00:00
Evan Cheng
f7ed82da10 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
llvm-svn: 34428
 2007-02-19 21:49:54 +00:00
Reid Spencer
da81bf4d3e For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
 2007-02-19 03:20:00 +00:00
Evan Cheng
9865be6d40 Added getReservedRegs(). 
llvm-svn: 34376
 2007-02-17 11:06:00 +00:00
Evan Cheng
2ff4c973b1 isLowRegister() expects input is a physical register. 
llvm-svn: 34013
 2007-02-07 21:44:33 +00:00
Evan Cheng
cca9b1d768 Rename. 
llvm-svn: 34011
 2007-02-07 21:24:09 +00:00
Evan Cheng
ec4c67f0a7 If sp offset will be materialized in a register. Clear the offset field of str / ldr. 
llvm-svn: 34010
 2007-02-07 21:19:58 +00:00
Evan Cheng
62aef236de Get rid of references to iostream. 
llvm-svn: 34009
 2007-02-07 21:18:32 +00:00
Evan Cheng
78c5a9422d In thumb mode, R3 is reserved, but it can be live in to the function. If 
that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!

llvm-svn: 33999
 2007-02-07 09:17:36 +00:00
Evan Cheng
b5519b5361 - If fp (r7) is used to reference stack objects, use [r, r] address mode. 
- If there is a dynamic alloca, in the epilogue, restore the value of sp
  using r7 - offset.
- Other bug fixes.

llvm-svn: 33997
 2007-02-07 08:37:31 +00:00
Evan Cheng
12cf8ddaea eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's. 
llvm-svn: 33975
 2007-02-07 02:44:23 +00:00
Evan Cheng
ec13f826a2 Spill / restore should avoid modifying the condition register. 
llvm-svn: 33971
 2007-02-07 00:06:56 +00:00
Evan Cheng
ea3308aef0 foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers. 
llvm-svn: 33958
 2007-02-06 06:13:29 +00:00
Evan Cheng
2fc792f86b eliminateFrameIndex() bug when frame pointer is used as base register. 
llvm-svn: 33945
 2007-02-06 00:23:31 +00:00
Lauro Ramos Venancio
b739f7d337 bugfix: SP isn't resetted when function has FP and there is no spills. 
llvm-svn: 33800
 2007-02-02 23:08:40 +00:00
Evan Cheng
f089c99f1d Another thumb large stack offset codegen bug. 
llvm-svn: 33795
 2007-02-02 21:08:39 +00:00
Evan Cheng
fda6550545 Ugh. Only meant to do this in thumb mode. 
llvm-svn: 33780
 2007-02-02 08:58:48 +00:00
Evan Cheng
e724492566 Also set alignment of stack-based structs to 4 in thumb mode. 
llvm-svn: 33741
 2007-02-01 02:18:36 +00:00
Evan Cheng
e7e966de5e Special epilogue for vararg functions. We cannot do a pop to pc because 
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
        pop {r4, r5, r6, r7}
        pop {r3}
        add sp, #3 * 4
        bx r3

llvm-svn: 33739
 2007-02-01 01:49:46 +00:00
Evan Cheng
b0ff625a31 Don't want to add FramePtr to callee save spill list twice. 
llvm-svn: 33727
 2007-01-31 23:17:29 +00:00
Evan Cheng
6f1c20a8e6 Darwin ABI requires FP to point to stack slot of prev FP. 
llvm-svn: 33724
 2007-01-31 22:25:33 +00:00
Evan Cheng
ffe1d9f7fa Update comment. 
llvm-svn: 33721
 2007-01-31 22:06:44 +00:00
Lauro Ramos Venancio
7ae4f5599e ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used. 
llvm-svn: 33703
 2007-01-31 13:12:46 +00:00
Evan Cheng
dd7a688bb8 During PEI, if the immediate value of sp + offset is too large (i.e. something 
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.

llvm-svn: 33667
 2007-01-30 23:01:46 +00:00
Evan Cheng
e43ca022bf In thumb mode, round up stack frame size to multiple of 4 since add/sub 
sp, imm instructions implicitly multiply the offset by 4.

llvm-svn: 33653
 2007-01-30 02:57:02 +00:00
Evan Cheng
c419d983d6 Thumb eliminateFrameIndex fixes. 
llvm-svn: 33652
 2007-01-30 02:36:01 +00:00
Evan Cheng
7fa6964dc2 - In thumb mode, if size of MachineFunction is >= 2048, force LR to be 
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
  in thumb mode so it can be clobbered if it is properly spilled / restored
  in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
  spill by:
  push lr -> delete
  pop pc -> bx lr

llvm-svn: 33650
 2007-01-30 01:18:38 +00:00
Evan Cheng
43e8518d8b Remember if LR register has been spilled in this function. 
llvm-svn: 33632
 2007-01-29 22:22:24 +00:00
Evan Cheng
add7f164a1 Represent tADDspi and tSUBspi as two-address instructions. 
llvm-svn: 33551
 2007-01-26 21:33:19 +00:00
Evan Cheng
fa824b9f73 I am an idiot. 
llvm-svn: 33509
 2007-01-25 23:18:16 +00:00
Evan Cheng
6730e12ae4 PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. 
llvm-svn: 33460
 2007-01-23 09:38:11 +00:00
Evan Cheng
16e58be1bc hasFP() is now a virtual method of MRegisterInfo. 
llvm-svn: 33455
 2007-01-23 00:57:47 +00:00
Evan Cheng
e3d8e42e27 Round up stack to multiple of alignment only if it's a leaf function without alloca. 
llvm-svn: 33401
 2007-01-20 10:22:33 +00:00
Evan Cheng
a9af4be5ac Prologue and epilogue bugs for non-Darwin targets. 
llvm-svn: 33390
 2007-01-20 03:24:07 +00:00
Evan Cheng
aa24f08926 Clean up ARM PEI code. 
llvm-svn: 33389
 2007-01-20 02:09:25 +00:00
Evan Cheng
bf216c364f isDarwin -> isTargetDarwin 
llvm-svn: 33366
 2007-01-19 19:28:01 +00:00
Evan Cheng
10043e215b ARM backend contribution from Apple. 
llvm-svn: 33353
 2007-01-19 07:51:42 +00:00
Lauro Ramos Venancio
901d9e65f6 Don't add or sub zero to sp. 
llvm-svn: 33142
 2007-01-12 20:52:27 +00:00
Lauro Ramos Venancio
c4235e5521 Build constants using instructions mov/orr or mvn/eor. 
llvm-svn: 33141
 2007-01-12 20:35:49 +00:00
Evan Cheng
74b46e8c05 Fix naming inconsistency. 
llvm-svn: 32823
 2007-01-02 21:33:40 +00:00
Rafael Espindola
3ab9256d19 macros -> Inline functions 
Lauros's patch

llvm-svn: 32656
 2006-12-18 11:07:09 +00:00
Rafael Espindola
09e2921d9a Avoid creating invalid sub/add instructions on the prolog/epilog 
patch by Lauro

llvm-svn: 32577
 2006-12-14 13:31:27 +00:00
Bill Wendling
9bfb1e1f29 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Evan Cheng
20350c4025 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.

llvm-svn: 31947
 2006-11-27 23:37:22 +00:00
Rafael Espindola
5f7ab1b964 implement load effective address similar to the alpha backend 
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
 2006-11-09 13:58:55 +00:00
Rafael Espindola
708cb60588 initial implementation of addressing mode 2 
TODO: fix lea_addri

llvm-svn: 31552
 2006-11-08 17:07:32 +00:00
Rafael Espindola
4e825336a0 add support for calling functions when the caller has variable sized objects 
llvm-svn: 31312
 2006-10-31 13:03:26 +00:00
Rafael Espindola
a23166d6a4 initial support for frame pointers 
llvm-svn: 31197
 2006-10-26 13:31:26 +00:00