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274 Commits

Author SHA1 Message Date
Dan Gohman
9da02f5ee2 Remove isReg, isImm, and isMBB, and change all their users to use 
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
 2007-09-14 20:33:02 +00:00
David Greene
a6d5d2a6a0 Add instruction dump output. This helps find bugs. 
llvm-svn: 41744
 2007-09-06 16:36:39 +00:00
Evan Cheng
958cf3d43e If the source of a move is in spill slot, the reload may be folded to essentially a load from stack slot. It's ok to mark the stack slot value as available for reuse. But it should not be clobbered since the destination of the move is live. 
llvm-svn: 41109
 2007-08-15 20:20:34 +00:00
Evan Cheng
3f22fffe94 - If a def is dead, do not spill it. 
- If the defs of a spilled rematerializable MI are dead after the spill store is deleted, delete
  the def MI as well.

llvm-svn: 41086
 2007-08-14 23:25:37 +00:00
Evan Cheng
6cb9fd7be5 If a MI's def is remat as well as spilled, and the store is later deemed dead, mark the def operand as isDead. 
llvm-svn: 41083
 2007-08-14 20:23:13 +00:00
Evan Cheng
234386509b If a spilled value is being reused and the use is a kill, that means there are 
no more uses within the MBB and the spilled value isn't live out of the MBB.
Then it's safe to delete the spill store.

llvm-svn: 41069
 2007-08-14 09:11:18 +00:00
Evan Cheng
78a8806f4f If a rematerializable def is not deleted, i.e. it is also spilled, check if the 
spilled value is available for reuse.

llvm-svn: 41067
 2007-08-14 05:42:54 +00:00
Evan Cheng
33820da1da Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized. 
llvm-svn: 41060
 2007-08-13 23:45:17 +00:00
Evan Cheng
6b6d1f685f Missed a couple of places where new instructions are added due to spill / restore. 
llvm-svn: 39748
 2007-07-11 19:17:18 +00:00
Evan Cheng
74a541024f No longer need to track last def / use. 
llvm-svn: 38534
 2007-07-11 08:47:44 +00:00
Evan Cheng
bec7a20c5e Fix for PR1545: Revamp code that update kill information due to register reuse. 
llvm-svn: 38525
 2007-07-11 05:28:39 +00:00
Dan Gohman
9e82064924 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
 2007-06-19 01:48:05 +00:00
Dan Gohman
4a4a8eb00e Add a target hook to allow loads from constant pools to be rematerialized, and an 
implementation for x86.

llvm-svn: 37576
 2007-06-14 20:50:44 +00:00
Evan Cheng
910c80851e Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. 
llvm-svn: 36483
 2007-04-26 19:00:32 +00:00
Evan Cheng
0ba174534c Match MachineFunction::UsedPhysRegs changes. 
llvm-svn: 36452
 2007-04-25 22:13:27 +00:00
Evan Cheng
8be98c1572 Re-materialize all loads from fixed stack slots. 
llvm-svn: 35660
 2007-04-04 07:40:01 +00:00
Evan Cheng
9a2a7b174a Don't add the same MI to register reuse "last def/use" twice if it reads the 
register more than once.

llvm-svn: 35513
 2007-03-30 20:21:35 +00:00
Evan Cheng
fdbdf43632 Don't call getOperandConstraint() if operand index is greater than 
TID->numOperands.

llvm-svn: 35375
 2007-03-27 00:48:28 +00:00
Evan Cheng
4a09b1b5be Fix for PR1266. Don't mark a two address operand IsKill. 
llvm-svn: 35365
 2007-03-26 22:40:42 +00:00
Evan Cheng
0e3278e505 First cut trivial re-materialization support. 
llvm-svn: 35208
 2007-03-20 08:13:50 +00:00
Evan Cheng
d74cb0e194 Only propagate IsKill if the last use is a kill. 
llvm-svn: 34878
 2007-03-03 06:32:37 +00:00
Evan Cheng
6605c5dbee - Keep track all def and uses of stack slot available in register. 
- Available value use may be deleted (e.g. noop move).

llvm-svn: 34841
 2007-03-02 08:52:00 +00:00
Evan Cheng
08f2f0d145 Invalidate last use of a reused register if the use is a deleted noop copy. 
llvm-svn: 34839
 2007-03-02 05:41:42 +00:00
Evan Cheng
d6450ba1dc A restore is promoted to copy (or deleted entirely), remove the kill from the last use of the targetted register. 
llvm-svn: 34773
 2007-03-01 02:27:30 +00:00
Evan Cheng
38fd9b074f A couple of more places where a register liveness has been extended and its last kill should be updated accordingly. 
llvm-svn: 34597
 2007-02-25 09:51:27 +00:00
Evan Cheng
520b20d3b7 Reuse extends the liveness of a register. Transfer the kill to the operand that reuse it. 
llvm-svn: 34536
 2007-02-23 21:47:50 +00:00
Evan Cheng
f7e320c9e0 A spill kills the register being stored. But it is later being reused by spiller, its live range has to be extended. 
llvm-svn: 34517
 2007-02-23 01:13:26 +00:00
Evan Cheng
de037a821a Use BitVector instead. No functionality change. 
llvm-svn: 34460
 2007-02-21 02:22:03 +00:00
Evan Cheng
61cd0914ed Dead code. 
llvm-svn: 34435
 2007-02-20 01:29:10 +00:00
Evan Cheng
6ad6fdb70b Fixed a long standing spiller bug that's exposed by Thumb: 
The code sequence before the spiller is something like:
                 = tMOVrr
        %reg1117 = tMOVrr
        %reg1078 = tLSLri %reg1117, 2

The it starts spilling:
        %r0 = tRestore <fi#5>, 0
        %r1 = tRestore <fi#7>, 0
        %r1 = tMOVrr %r1<kill>
        tSpill %r1, <fi#5>, 0
        %reg1078 = tLSLri %reg1117, 2

It restores the value while processing the first tMOVrr. At this point, the
spiller remembers fi#5 is available in %r0. Next it processes the second move.
It restores the source before the move and spills the result afterwards. The
move becomes a noop and is deleted. However, a spill has been inserted and that
should invalidate reuse of %r0 for fi#5 and add reuse of %r1 for fi#5.
Therefore, %reg1117 (which is also assigned fi#5) should get %r1, not %r0.

llvm-svn: 34039
 2007-02-08 06:04:54 +00:00
Chris Lattner
199818475b Switch this to use SmallSet to avoid mallocs in the common case. 
llvm-svn: 33457
 2007-01-23 00:59:48 +00:00
Evan Cheng
fc74e2de26 GetRegForReload() now keeps track which registers have been considered and rejected during its quest to find a suitable reload register. This avoids an infinite loop in case like this: 
t1 := op t2, t3
  t2 <- assigned r0 for use by the reload but ended up reuse r1
  t3 <- assigned r1 for use by the reload but ended up reuse r0
  t1 <- desires r1
        sees r1 is taken by t2, tries t2's reload register r0
        sees r0 is taken by t3, tries t3's reload register r1
        sees r1 is taken by t2, tries t2's reload register r0 ...

llvm-svn: 33382
 2007-01-19 22:40:14 +00:00
Chris Lattner
aee775a6b7 Eliminate static ctors from Statistics 
llvm-svn: 32698
 2006-12-19 22:41:21 +00:00
Bill Wendling
a77f14265b Added an automatic cast to "std::ostream*" etc. from OStream. We then can 
rework the hacks that had us passing OStream in. We pass in std::ostream*
instead, check for null, and then dispatch to the correct print() method.

llvm-svn: 32636
 2006-12-17 05:15:13 +00:00
Evan Cheng
54c4ab8524 Minor clean up. 
llvm-svn: 32593
 2006-12-15 06:41:01 +00:00
Evan Cheng
4c306ae0c2 Fix a long-standing spiller bug: 
If a spillslot value is available in a register, and there is a noop copy that
targets that register, the spiller correctly decide not to invalidate the
spillslot register.

However, even though the noop copy does not clobbers the value. It does start a
new intersecting live range. That means the spillslot register is available for
use but should not be reused for a two-address instruction modref operand which
would clobber the new live range.

When we remove the noop copy, update the available information by clearing the
canClobber bit.

llvm-svn: 32576
 2006-12-14 07:54:05 +00:00
Evan Cheng
78cb08d082 Move findTiedToSrcOperand to TargetInstrDescriptor. 
llvm-svn: 32366
 2006-12-08 18:45:48 +00:00
Evan Cheng
bb4e6d4d12 Proper fix for PR1037: to determine is a VR is a modref, check 1) whether it is 
tied to another oeprand, 2) whether is is being tied to by another operand. So
the destination operand of a two-address MI can be correctly identified.

llvm-svn: 32354
 2006-12-08 08:02:34 +00:00
Reid Spencer
e44aa812b4 Revision 1.83 causes PR1037. 
Reverted.

llvm-svn: 32305
 2006-12-07 16:21:19 +00:00
Bill Wendling
f3baad3ee1 Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, are 
now cerr, cout, and NullStream resp.

llvm-svn: 32298
 2006-12-07 01:30:32 +00:00
Evan Cheng
e312c152d2 MI keeps a ptr of TargetInstrDescriptor, use it. 
llvm-svn: 32296
 2006-12-07 01:21:59 +00:00
Evan Cheng
7074cbd449 getOperandConstraint returns -1 if the operand does have the specific constraint. This bug was causing excessive spills. 
llvm-svn: 32295
 2006-12-07 00:46:04 +00:00
Chris Lattner
700b873130 Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.

llvm-svn: 32279
 2006-12-06 17:46:33 +00:00
Evan Cheng
67fc141db5 Match TargetInstrInfo changes. 
llvm-svn: 32098
 2006-12-01 21:52:58 +00:00
Bill Wendling
9d46fcd59c More removal of std::cerr and DEBUG, replacing with DOUT instead. 
llvm-svn: 31806
 2006-11-17 02:09:07 +00:00
Evan Cheng
51733ed4a3 Fixed some spiller bugs exposed by the recent two-address code changes. Now 
there may be other def(s) apart from the use&def two-address operand. We need
to check if the register reuse for a use&def operand may conflicts with another
def. Provide a mean to recover from the conflict if it is detected when the
defs are processed later.

llvm-svn: 31439
 2006-11-04 00:21:55 +00:00
Evan Cheng
93cdd149f7 Rename 
llvm-svn: 31364
 2006-11-01 23:18:32 +00:00
Evan Cheng
d8697deca3 Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together. 
llvm-svn: 31363
 2006-11-01 23:06:55 +00:00
Chris Lattner
c040e53372 restore my previous patch, now that the X86 backend bug has been fixed: 
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20061009/038518.html

llvm-svn: 30906
 2006-10-12 17:45:38 +00:00
Evan Cheng
c935741b1d Backing out Chris' last commit. It's breaking llvm-gcc bootstrapping. 
It's turning:
        movl -24(%ebp), %esp
        subl $16, %esp
        movl -24(%ebp), %ecx
into
        movl -24(%ebp), %esp
        subl $16, %esp
        movl %esp, (%esp)

llvm-svn: 30902
 2006-10-12 08:00:47 +00:00