18 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
0577f4b178 [Hexagon] Add HVX and control register names to Hexagon target 2021-06-14 17:14:37 -05:00
Sid Manning
c539be1dcb [Hexagon] Add support for named registers cs0 and cs1
Allow inline assembly code to referece cs0 and cs1.
2021-03-18 09:53:22 -05:00
Krzysztof Parzyszek
bc097f645e [Hexagon] Add clang builtin definitions for Hexagon V68 2021-02-04 09:54:52 -06:00
Krzysztof Parzyszek
7406eb4f6a [Hexagon] Avoid creating an empty target feature
If the CPU string is empty, the target feature map may end up having
an empty string inserted to it. The symptom of the problem is a warning
message:
  '+' is not a recognized feature for this target (ignoring feature)
Also, the target-features attribute in the module will have an empty
string in it.
2020-08-10 10:37:24 -05:00
Sid Manning
d37cbda5f9 [Hexagon] Define __ELF__ by default.
Differential Revision: https://reviews.llvm.org/D74972
2020-02-21 16:10:31 -06:00
Krzysztof Parzyszek
305bf5b21d [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
Krzysztof Parzyszek
c12a5917d2 [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
Krzysztof Parzyszek
6f3effbbf0 [Hexagon] Update autogenerated intrinsic info in clang
In addition to that, use target features to validate intrinsic
availability on a given target.
2020-01-16 14:20:12 -06:00
Krzysztof Parzyszek
99f51960fd [Hexagon] Handle remaining registers in getRegisterByName()
This fixes https://llvm.org/PR43829.
2019-10-29 08:56:01 -05:00
Chandler Carruth
2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Krzysztof Parzyszek
85393b28f9 [Hexagon] Add support for Hexagon V66
llvm-svn: 348415
2018-12-05 21:38:35 +00:00
Krzysztof Parzyszek
57e6706e56 [Hexagon] Remove support for V4
llvm-svn: 344786
2018-10-19 15:36:45 +00:00
Krzysztof Parzyszek
762dee516c [Hexagon] Diagnose intrinsics not supported by selected CPU/HVX
llvm-svn: 336933
2018-07-12 18:54:04 +00:00
Krzysztof Parzyszek
3163610010 [Hexagon] Remove -mhvx-double and the corresponding subtarget feature
Specifying the HVX vector length should be done via the -mhvx-length
option.

llvm-svn: 329077
2018-04-03 15:59:10 +00:00
Erich Keane
e44bdb3f70 Add Rest of Targets Support to ValidCPUList (enabling march notes)
A followup to: https://reviews.llvm.org/D42978

Most of the rest of the Targets were pretty rote, so this
patch knocks them all out at once. 

Differential Revision: https://reviews.llvm.org/D43057

llvm-svn: 324676
2018-02-08 23:16:55 +00:00
Krzysztof Parzyszek
cc5cd2c013 [Hexagon] Add front-end support for Hexagon V65
llvm-svn: 320579
2017-12-13 13:48:07 +00:00
Sumanth Gundapaneni
57098f5ac3 [Hexagon] Handling of new HVX flags and target-features
This patch has the following changes
A new flag "-mhvx-length={64B|128B}" is introduced to specify the length of the vector.
Previously we have used "-mhvx-double" for 128 Bytes. This adds the target-feature "+hvx-length{64|128}b"

The "-mhvx" flag must be provided on command line to enable HVX for Hexagon. If no -mhvx-length flag
is specified, a default length is picked from the arch mentioned in this priority order from either -mhvx=vxx
or -mcpu. For v60 and v62 the default length is 64 Byte. For unknown versions, the length is 128 Byte. The 
-mhvx flag adds the target-feature "+hvxv{hvx_version}"

The 64 Byte mode is soon going to be deprecated. A warning is emitted if 64 Byte is enabled. A warning is
still emitted for the default 64 Byte as well. This warning can be suppressed with a -Wno flag.

The "-mhvx-double" and "-mno-hvx-double" flags are deprecated. A warning is emitted if the driver sees
them on commandline. "-mhvx-double" is an alias to "-mhvx-length=128B"

The compilation will error out if -mhvx-length is specified with out an -mhvx/-mhvx= flag

The macro HVX_LENGTH is defined and is set to the length of the vector. 
Eg: #define HVX_LENGTH 64

The macro HVX_ARCH is defined and is set to the version of the HVX. 
Eg: #define HVX_ARCH 62

Differential Revision: https://reviews.llvm.org/D38852

llvm-svn: 316102
2017-10-18 18:10:13 +00:00
Erich Keane
ebba592682 Break up Targets.cpp into a header/impl pair per target type[NFCI]
Targets.cpp is getting unwieldy, and even minor changes cause the entire thing 
to cause recompilation for everyone. This patch bites the bullet and breaks 
it up into a number of files.

I tended to keep function definitions in the class declaration unless it 
caused additional includes to be necessary. In those cases, I pulled it 
over into the .cpp file. Content is copy/paste for the most part, 
besides includes/format/etc.


Differential Revision: https://reviews.llvm.org/D35701

llvm-svn: 308791
2017-07-21 22:37:03 +00:00