533914 Commits

Author SHA1 Message Date
Fangrui Song
f2ff298867 [MC] Remove deprecated createAsmStreamer/createMCObjectStreamer with 3 trailing bool
They were deprecated around 867faeec054abb4c035673189c1169fef45f54c8
(June 2024)
2025-04-10 09:31:13 -07:00
alex-t
0563569978
[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (#134153)
PHI operands and results must belong to the same register class.
If a PHI node produces an SGPR, but one of its operands is a VGPR, we
insert a VGPR-to-SGPR copy in the operand’s source block. The PHI
operand is then updated to use the destination register of the inserted
copy.

These inserted copies are processed immediately when they are created.
Therefore, we should avoid reprocessing them when handling their parent
block later.

---------

Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
2025-04-10 18:30:52 +02:00
Simon Pilgrim
3c6c5c764a Fix MSVC "not all control paths return a value" warning. NFCI. 2025-04-10 17:29:37 +01:00
Simon Tatham
edf21314c9
[AArch64][v8.5A] Omit BTI for non-addr-taken static fns in ELF (#135043)
This follows up commit 7af2b51e761f499, which removed the BTI at the
start of functions with internal linkage (provided they weren't
indirectly called inside the translation unit) for Linux targets.

Now we leave out the BTI for any ELF target, including bare-metal,
because the AAELF64 document in the Arm ABI has been updated to make the
same guarantee as SYSVABI64: if the linker wants to insert an indirect
branch at link time (e.g. as part of a long branch thunk) it's
responsible for making a BTI-equipped landing pad.

That was too difficult to test in the existing codegen test
`patchable-function-entry-bti.ll`, because so much of LLVM's detailed
asm output changes for non-ELF targets. So I've simplified that back to
how it was before 7af2b51e761f499 (except that now it expects no BTI in
the disputed function), and made a new test checking specifically the
difference in BTI between the formats.
2025-04-10 17:08:45 +01:00
Alexey Bataev
aaaa2a325b
[SLP]Support vectorization of previously vectorized scalars in split nodes
Patch removes the restriction for the revectorization of the previously
vectorized scalars in split nodes, and moves the cost profitability
check to avoid regressions.

Reviewers: hiraditya, RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/134286
2025-04-10 12:06:38 -04:00
Mark de Wever
01a2922f0d
[libc++][doc] Removes LLVM 19 Release Notes. (#134894)
There will be no more LLVM-19 releases so we will not backport patches
for this release. This makes these Release Notes obsolete.
2025-04-10 18:04:49 +02:00
Thurston Dang
83f831d46f Fix-forward -Wcovered-switch-default error in #134429
Remove the default case to avoid buildbot error (https://lab.llvm.org/buildbot/#/builders/66/builds/12382/steps/8/logs/stdio):
```
/home/b/sanitizer-x86_64-linux/build/llvm-project/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp:85:3: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
   85 |   default:
      |   ^
```

(also https://llvm.org/docs/CodingStandards.html#don-t-use-default-labels-in-fully-covered-switches-over-enumerations)
2025-04-10 15:56:33 +00:00
Alexey Bataev
4ea57b3481 [SLP]Fix detection of matching splat vector
Need to check, that the mask of the potentially matching splat node is
not less defined than the requested mask to avoid poison propagation and
incorrect code.

Fixes #135113
2025-04-10 08:30:43 -07:00
Alan Li
959b8aaeac
[MLIR][NFC] Expose computeProduct function. (#135192)
Make it non-static, as its functionality is quite generic.
2025-04-10 08:29:32 -07:00
zhijian lin
378ac572ac
Reland "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the poison value in the IR." (#135056)
A new ISD::POISON SDNode is introduced to represent the poison value in
the IR, replacing the previous use of ISD::UNDEF
2025-04-10 11:29:14 -04:00
Thomas BIZET
3097ab0fe8
[ARM][MC] Add support for Armv8.1-M Mainline to '.arch' asm directive (#135184)
Armv8.1-M Mainline architecture is supported by Clang's driver & LLVM's
ARM backend, but MC would report an 'Unknown Arch: armv8.1-m.main' error
when processing '.arch armv8.1-m.main' assembler directives.
2025-04-10 16:27:29 +01:00
Alexey Bataev
396e2ef3b7 [SLP][NFC]Add a test with incorrect identity match for less-defined splat 2025-04-10 08:20:28 -07:00
Jerry-Ge
b17bd73e62
[mlir][tosa] Add more negative tests for rank0 tensors, negate, and sub (#135061)
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
2025-04-10 08:13:36 -07:00
Jerry-Ge
2bbe8e825e
[mlir][tosa] Add more level_check tests for tensor_dim and tensor_size (#135062)
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
2025-04-10 08:13:24 -07:00
Paul Walker
8820f4e52b [LLVM][CodeGen][AArch64] Regenerate CHECK lines for arm64-vsetcc_fp.ll and fp16-v4-instructions.ll. 2025-04-10 15:10:56 +00:00
Han-Kuan Chen
a693f23ef2
[SLP][REVEC] Fix CompressVectorize does not expand mask when REVEC is enabled. (#135174) 2025-04-10 23:07:45 +08:00
Sirui Mu
85614e160b
[CIR] Upstream initial function call support (#134673)
This patch upstreams initial support for making function calls in CIR.
Function arguments and return values are not included to keep the patch
small for review.

Related to #132487
2025-04-10 22:41:00 +08:00
Richard Howell
4b267bb7c2
[lld] load rpaths from tbd files (#134925)
TBD files can contain rpaths, add support for setting them in DylibFile
during construction.
2025-04-10 07:34:20 -07:00
David Stuttard
15428e0d78
[AMDGPU] Add support for point sample accel out of order returns (#127991)
Add target feature for point sample acceleration and enable it for
relevant
targets.

Also add support to insert waitcnts where required when point sample
accel may
have occurred. This has implications for out of order returns, which is
why
extra waitcnts are required.

Add a VMEM_NOSAMPLER bit in the register masks to determine when
waitcnt is required.
2025-04-10 15:33:48 +01:00
calebwat
f989db5745
[NFC] Use cast instead of dyn_cast for Src and Dst vec types in VecCombine folding (#134432)
SrcVecTy and DstVecTy are used without a null check, and originate from
a dyn_cast. This patch adjusts this to use a fixed cast, since it is not
checked for null before use otherwise, but is semantically guaranteed
from previous checks.
2025-04-10 15:21:37 +01:00
u4f3
5978bb2936
[DeadArgElim] fix verifier failure when changing musttail's function signature (#127366)
This commit is for #107569 and #126817.

Stop changing musttail's caller and callee's function signature when
calling convention is not swifttailcc nor tailcc. Verifier makes sure
musttail's caller and callee shares exactly the same signature, see
commit 9ff2eb1 and #54964.

Otherwise just make sure the return type is the same and then process
musttail like usual calls.

close #107569, #126817
2025-04-10 07:08:09 -07:00
Mirko Brkušanin
b0428870da
[AMDGPU] Rename TH_STORE_RT_WB to TH_STORE_WB (#135171)
So it matches the documentation

Fixes: SWDEV-526726
2025-04-10 16:01:55 +02:00
Steven Perron
4244a91be2
[SPIRV][NFC] Refactor pointer creation in GlobalRegistery (#134429)
This PR adds new interfaces to create pointer type, and adds
some requirements to the old interfaces. This is the first step in
https://github.com/llvm/llvm-project/issues/134119.
2025-04-10 09:25:33 -04:00
Mariya Podchishchaeva
2b3aa56fd7
[MS][clang] Error about ambiguous operator delete[] only when required (#135041)
And issue was reported in

https://github.com/llvm/llvm-project/pull/133950#issuecomment-2787510484
. Since we don't always emit vector deleting dtors, only error out about
ambiguous operator delete[] when it will be required for vector deleting
dtor emission.
2025-04-10 15:02:21 +02:00
sstwcw
f7617f7f90
[clang-format] Recognize TableGen paste operator on separate line (#133722)
Formatting this piece of code made the program crash.

```
class TypedVecListRegOperand<RegisterClass Reg, int lanes, string eltsize>
    : RegisterOperand<Reg, "printTypedVectorList<" # lanes # ", '"
                                                   # eltsize # "'>">;
```

The line starting with the `#` was treated as a separate preprocessor
directive line. Then the code dereferenced a null pointer when it tried
to continue parsing the first line that did not end in a semicolon.

Now the 2 problems are fixed.
2025-04-10 12:52:02 +00:00
sstwcw
ed85822027
[clang-format] Handle C++ keywords in other languages better (#132941)
There is some code to make sure that C++ keywords that are identifiers
in the other languages are not treated as keywords.  Right now, the kind
is set to identifier, and the identifier info is cleared.  The latter is
probably so that the code for identifying C++ structures does not
recognize those structures by mistake when formatting a language that
does not have those structures.  But we did not find an instance where
the language can have the sequence of tokens, the code tries to parse
the structure as if it is C++ using the identifier info instead of the
token kind, but without checking for the language setting.  However,
there are places where the code checks whether the identifier info field
is null or not.  They are places where an identifier and a keyword are
treated the same way.  For example, the name of a function in
JavaScript.  This patch removes the lines that clear the identifier
info.  This way, a C++ keyword gets treated in the same way as an
identifier in those places.

JavaScript

New

```JavaScript
async function
union(
    myparamnameiswaytooloooong) {
}
```

Old

```JavaScript
async function
    union(
        myparamnameiswaytooloooong) {
}
```

Java

New

```Java
enum union { ABC, CDE }
```

Old

```Java
enum
union { ABC, CDE }
```

This reverts commit 97dcbdef6089175c45e14fcbcf5c88b10233a79a.
2025-04-10 12:51:10 +00:00
Aaron Ballman
5a1b4ec6f4 Fix broken bots
https://lab.llvm.org/buildbot/#/builders/190/builds/18038

This adds a triple and regenerates the test results.
2025-04-10 08:36:13 -04:00
Simon Pilgrim
9ff27d5fc2 [X86] add additional avgfloor 'add(shift(x,1),shift(y,1),and(x,y,1))' patterns
Add mixture of pattern combos to match against the SDPatternMatch::m_Reassociatable* matchers
2025-04-10 13:32:54 +01:00
Aaron Ballman
6defc8ee66 Initialize member variable; NFC
This was found via a Coverity static analysis pass. There's no
indication this was being used incorrectly in practice, but there are
public interfaces which require `BR` to be non-null and valid, and `BR`
was not being initialized by the constructor.

This adds an in-class initializer for `BR` and some asserts, to be safe.
2025-04-10 08:28:52 -04:00
Aaron Ballman
5c8ba28c75
[C11] Implement WG14 N1285 (temporary lifetimes) (#133472)
This feature largely models the same behavior as in C++11. It is
technically a breaking change between C99 and C11, so the paper is not
being backported to older language modes.

One difference between C++ and C is that things which are rvalues in C
are often lvalues in C++ (such as the result of a ternary operator or a
comma operator).

Fixes #96486
2025-04-10 08:12:14 -04:00
Aaron Ballman
71f629fc2a
Initialize member variable; NFC (#135167)
This was found via a Coverity static analysis pass. There's no
indication this was being used incorrectly in practice, but there are
public interfaces which require `BR` to be non-null and valid, and `BR`
was not being initialized by the constructor.

This adds an in-class initializer for `BR` and some asserts, to be safe.
2025-04-10 08:10:16 -04:00
PeterChou1
6d98d45c9c
reland [clang-doc][NFC] refactor out file helpers (#135164)
Split from https://github.com/llvm/llvm-project/pull/133161

refactor the code to extract file helpers used in HTML generators for
use in other generators for clang-doc

This patch fixes the error where compiling with
-DLLVM_LINK_LLVM_DYLIB=ON broke the buildbot
2025-04-10 07:58:29 -04:00
Nico Weber
dcb2ae126d [gn] port e10f67a8270c774 2025-04-10 07:50:13 -04:00
Benjamin Maxwell
c7745b0bab
[AArch64][test] Regenerate arm64-st1.ll using update_llc_test_checks.py (NFC) (#134919)
This is a fairly large test file which can be annoying to manually
update. Using --filter-out gets pretty close to the original checks.
2025-04-10 12:48:42 +01:00
Han-Kuan Chen
d02a704ec9
[SLP][REVEC] Make getExtractWithExtendCost support FixedVectorType as Dst. (#134822) 2025-04-10 18:54:45 +08:00
Simon Pilgrim
64b5e8f2b7 [X86] masked_gather_scatter.ll - clean up check prefixes
Share X86/X64 common prefixes as much as possible to reduce duplication
2025-04-10 11:34:11 +01:00
Nikita Popov
20507a9e95
[Verifier][CGP] Allow integer argument to dbg_declare (#134803)
Relaxes the newly added verifier rule to also allow an integer argument
to dbg_declare, which is interpreted as a pointer. Adjust CGP to deal with
it gracefully.

Fixes https://github.com/llvm/llvm-project/issues/134523.
Alternative to https://github.com/llvm/llvm-project/pull/134601.
2025-04-10 12:29:56 +02:00
Dominik Adamski
716b02d8c5
[LLVM][MemCpyOpt] Unify alias tags if we optimize allocas (#129537)
Optimization of alloca instructions may lead to invalid alias tags.
Incorrect alias tags can result in incorrect optimization outcomes for
Fortran source code compiled by Flang with flags: `-O3 -mmlir
-local-alloc-tbaa -flto`.

This commit removes alias tags when memcpy optimization replaces two
arrays with one array, thus ensuring correct compilation of Fortran
source code using flags: `-O3 -mmlir -local-alloc-tbaa -flto`.

This commit is also a proposal to fix the reported issue:
https://github.com/llvm/llvm-project/issues/133984

---------

Co-authored-by: Shilei Tian <i@tianshilei.me>
2025-04-10 12:23:53 +02:00
Michael Kruse
2fe123a119 Revert "Remember LLVM_ENABLE_LIBCXX setting in installed configuration (#134990)"
This reverts commit 785e7f06ddb1ba36aa679d23436726dcf61f8afb.

It did not solve the problem with flang-aarch64-libcxx and caused
another failure with openmp-offload-amdgpu-runtime-2.
2025-04-10 11:57:06 +02:00
Jay Foad
e3350a6263
[AMDGPU] InstCombine llvm.amdgcn.ds.bpermute with uniform arguments (#130133)
Reland #129895 with a fix to avoid trying to combine bpermute of
bitcast.
2025-04-10 10:36:38 +01:00
Pavel Labath
cdb9c6190f
[lldb] Support negative function offsets in UnwindPlans (#134662)
These are needed for functions whose entry point is not their lowest
address.
2025-04-10 11:31:44 +02:00
Philip Reames
d34437e9e1
[RISCV] Recognize a zipeven/zipodd requiring larger SEW (#134923)
This is a follow up to f8ee58a3c, and improves code generation for the
XRivosVizip extension.

If we have a slide pair which could be a zipeven or zipodd if the
shuffle was widened, widen the shuffle and then mask the zipeven or
zipodd.

This is basically working around an order of matching issue; we match
the slide pair variants before trying widening. I considered whether we
should just widen slide pairs without any consideration of the zip
idioms, but the resulting codegen changes look mostly like churn, and
have no clear evidence of profitability.
2025-04-10 02:29:04 -07:00
David Spickett
d9cfd90524 [ci] Improve wording in CI test reports
We weren't saying where to click, make it clear you click on a
test name.
2025-04-10 09:20:13 +00:00
Michael Kruse
785e7f06dd
Remember LLVM_ENABLE_LIBCXX setting in installed configuration (#134990)
The buidbot
[flang-aarch64-libcxx](https://lab.llvm.org/buildbot/#/builders/89) is
currently failing with an ABI issue. The suspected reason is that
LLVMSupport.a is built using libc++, but the unittests are using the
default C++ standard library, libstdc++ in this case. This predefined
`llvm_gtest` target uses the LLVMSupport from `find_package(LLVM)`,
which finds the libc++-built LLVMSupport.

To fix, store the `LLVM_ENABLE_LIBCXX` setting in the LLVMConfig.cmake
such that everything that links to LLVM libraries use the same standard
library. In this case discussed in
https://github.com/llvm/llvm-zorg/pull/387 it was the flang-rt
unittests, but other runtimes with GTest unittests should have the same
issue (e.g. offload), and any external project that uses
`find_package(LLVM)`.
2025-04-10 11:18:51 +02:00
Abhishek Kaushik
5543d9ded7
[RegAlloc][NFC] Use std::move to avoid copy (#134533) 2025-04-10 14:45:02 +05:30
Fraser Cormack
7d32d72f10 [libclc][NFC] Remove blank line at end of file 2025-04-10 10:02:51 +01:00
Romaric Jodin
135a7874dc
libclc: clspv: fma: remove fp16 implementation (#135002)
clspv is already handling generation of fp16. This implementation is
preventing clspv from making the best choice to use an emulation on top
of fp32-fma, or the native fp16-fma, depending on the command-line
arguments.
2025-04-10 10:01:57 +01:00
Nathan Gauër
a625bc60e2
[HLSL][SPIR-V] Add hlsl_private address space for SPIR-V (#133464)
This is an alternative to
https://github.com/llvm/llvm-project/pull/122103

In SPIR-V, private global variables have the Private storage class. This
PR adds a new address space which allows frontend to emit variable with
this storage class when targeting this backend.

This is covered in this proposal: llvm/wg-hlsl@4c9e11a

This PR will cause addrspacecast to show up in several cases, like class
member functions or assignment. Those will have to be handled in the
backend later on, particularly to fixup pointer storage classes in some
functions.

Before this change, global variable were emitted with the 'Function'
storage class, which was wrong.
2025-04-10 10:55:10 +02:00
Jay Foad
344a491dad
[CodeGen] Simplify expandRoundInexactToOdd (#134988)
FP_ROUND and FP_EXTEND the input value before FABSing it. This avoids
some bit twiddling to copy the sign bit from the input to the result. It
does introduce one extra FABS, but that is folded into another
instruction for free on AMDGPU, which is the only target currently
affected by this change.
2025-04-10 09:45:38 +01:00
Michael Buch
f030f6f3c5
[lldb][FormatEntity][NFCI] Refactor FunctionNameWithArgs into helper functions and use LLVM style (#135031)
I've always found this hard to read. Some upcoming changes make similar
computations, so I thought it's a good time to factor out this logic
into re-usable helpers and clean it up using LLVM's preferred
early-return style.
2025-04-10 09:39:58 +01:00