158 Commits

Author SHA1 Message Date
Alex Lorenz
8f6f4285f3 MIR Serialization: Serialize the register mask machine operands.
This commit implements serialization of the register mask machine
operands. This commit serializes only the call preserved register
masks that are defined by a target, it doesn't serialize arbitrary
register masks.

This commit also extends the TargetRegisterInfo class and TableGen so that
the users of TRI can get the list of all the call preserved register masks and
their names.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10673

llvm-svn: 240966
2015-06-29 16:57:06 +00:00
Alex Lorenz
5d6108e4ed MIR Serialization: Serialize global address machine operands.
This commit serializes the global address machine operands.
This commit doesn't serialize the operand's offset and target
flags, it serializes only the global value reference.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10671

llvm-svn: 240851
2015-06-26 22:56:48 +00:00
Alex Lorenz
33f0aef32f MIR Serialization: Serialize machine basic block operands.
This commit serializes machine basic block operands. The
machine basic block operands use the following syntax:

  %bb.<id>[.<name>]

This commit also modifies the YAML representation for the
machine basic blocks - a new, required field 'id' is added
to the MBB YAML mapping.

The id is used to resolve the MBB references to the
actual MBBs. And while the name of the MBB can be
included in a MBB reference, this name isn't used to
resolve MBB references - as it's possible that multiple
MBBs will reference the same BB and thus they will have the
same name. If the name is specified, the parser will verify
that it is equal to the name of the MBB with the specified id.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10608

llvm-svn: 240792
2015-06-26 16:46:11 +00:00
Alex Lorenz
12b554e6a7 MIR Serialization: Serialize the null register operands.
This commit serializes the null register machine operands.
It uses the '_' keyword to represent them, but the parser
also allows the '%noreg' named register syntax.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10580

llvm-svn: 240558
2015-06-24 17:34:58 +00:00
Alex Lorenz
240fc1e0aa MIR Serialization: Serialize immediate machine operands.
Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10573

llvm-svn: 240481
2015-06-23 23:42:28 +00:00
Alex Lorenz
f3db51de5e MIR Serialization: Serialize physical register machine operands.
This commit introduces functionality that's used to serialize machine operands.
Only the physical register operands are serialized by this commit.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10525

llvm-svn: 240425
2015-06-23 16:35:26 +00:00
Alex Lorenz
91370c5d62 MIR Serialization: Introduce a lexer for machine instructions.
This commit adds a function that tokenizes the string containing
the machine instruction. This commit also adds a struct called 
'MIToken' which is used to represent the lexer's tokens.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D10521

llvm-svn: 240323
2015-06-22 20:37:46 +00:00
Alex Lorenz
8e0a1b4857 MIR Serialization: Serialize machine instruction names.
This commit implements initial machine instruction serialization. It
serializes machine instruction names. The instructions are represented
using a YAML sequence of string literals and are a part of machine
basic block YAML mapping.

This commit introduces a class called 'MIParser' which will be used to
parse the machine instructions and operands.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10481

llvm-svn: 240295
2015-06-22 17:02:30 +00:00