547 Commits

Author SHA1 Message Date
Evan Cheng
1120279ae6 Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax

llvm-svn: 51026
2008-05-13 08:35:03 +00:00
Dan Gohman
d78c400b5b Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017
2008-05-13 00:00:25 +00:00
Nate Begeman
cfcb56091b Add support for vicmp/vfcmp codegen, more legalize support coming.
This is necessary to unbreak the build.

llvm-svn: 50988
2008-05-12 19:40:03 +00:00
Dan Gohman
5a3eecdfd8 Fix a bug in the ComputeMaskedBits logic for multiply.
llvm-svn: 50793
2008-05-07 00:35:55 +00:00
Dan Gohman
cf0e3acf16 Correct the value of LowBits in srem and urem handling in
ComputeMaskedBits.

llvm-svn: 50692
2008-05-06 00:51:48 +00:00
Mon P Wang
3e58393c3d Added addition atomic instrinsics and, or, xor, min, and max.
llvm-svn: 50663
2008-05-05 19:05:59 +00:00
Dan Gohman
1962c2be6a Fix a mistake in the computation of leading zeros for udiv.
llvm-svn: 50591
2008-05-02 21:30:02 +00:00
Dan Gohman
2f83b47863 Fix a typo in a comment.
llvm-svn: 50562
2008-05-02 00:05:03 +00:00
Dan Gohman
da44054867 Fix the SVOffset values for loads and stores produced by
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.

llvm-svn: 50359
2008-04-28 17:15:20 +00:00
Dan Gohman
72ec3f4562 Teach InstCombine's ComputeMaskedBits what SelectionDAG's
ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach
SelectionDAG's ComputeMaskedBits what InstCombine's knows
about SRem. And teach them both some things about high bits
in Mul, UDiv, URem, and Sub. This allows instcombine and
dagcombine to eliminate sign-extension operations in
several new cases.

llvm-svn: 50358
2008-04-28 17:02:21 +00:00
Dale Johannesen
aac27592f0 Check we aren't trying to convert PPC long double.
This fixes the testsuite failure on ppcf128-4.ll.

llvm-svn: 49994
2008-04-20 18:23:46 +00:00
Dan Gohman
75c895dbc4 Remove the implicit conversion from SDOperandPtr to SDOperand*; this
may fix a build error on Visual Studio.

llvm-svn: 49876
2008-04-17 23:02:12 +00:00
Roman Levenstein
a3ee1a38a3 Ongoing work on improving the instruction selection infrastructure:
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.

Patch is approved by Dan Gohman.

llvm-svn: 49795
2008-04-16 16:15:27 +00:00
Dan Gohman
5b61a288a7 Avoid creating MERGE_VALUES nodes for single values.
llvm-svn: 49676
2008-04-14 18:43:25 +00:00
Dan Gohman
2505d86783 Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.

llvm-svn: 49666
2008-04-14 17:55:48 +00:00
Dan Gohman
544ab2c50b Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.

llvm-svn: 49572
2008-04-12 04:36:06 +00:00
Gabor Greif
c422383e08 detabify
llvm-svn: 49524
2008-04-11 09:34:57 +00:00
Dan Gohman
3bc3ddd638 Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.

llvm-svn: 49348
2008-04-07 19:35:22 +00:00
Roman Levenstein
51f532f92d Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.

llvm-svn: 49330
2008-04-07 10:06:32 +00:00
Evan Cheng
025cea1126 Backing out 48222 temporarily.
llvm-svn: 49124
2008-04-03 03:13:16 +00:00
Duncan Sands
35c7cdac07 Rename getAnyLoad to getLoad is suggested by Evan.
llvm-svn: 48914
2008-03-28 09:45:24 +00:00
Duncan Sands
f740509e58 Implement LegalizeTypes support for softfloat LOAD.
In order to handle indexed nodes I had to introduce
a new constructor, and since I was there I factorized
the code in the various load constructors.

llvm-svn: 48894
2008-03-27 20:23:40 +00:00
Roman Levenstein
358e04a185 Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.

The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.

On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better. 

llvm-svn: 48822
2008-03-26 12:39:26 +00:00
Evan Cheng
df1690dc7c Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
llvm-svn: 48792
2008-03-25 20:08:07 +00:00
Dan Gohman
d8ea040c31 APIntify SelectionDAG's EXTRACT_ELEMENT code.
llvm-svn: 48726
2008-03-24 16:38:05 +00:00
Anton Korobeynikov
2fa75184f3 Another comments fixing
llvm-svn: 48683
2008-03-22 07:53:40 +00:00
Evan Cheng
31604a62f6 Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
llvm-svn: 48673
2008-03-22 01:55:50 +00:00
Duncan Sands
d97eea372a Introduce a new node for holding call argument
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.

llvm-svn: 48640
2008-03-21 09:14:45 +00:00
Dan Gohman
b72127ac4c More APInt-ification.
llvm-svn: 48344
2008-03-13 22:13:53 +00:00
Duncan Sands
87de65fc29 Don't try to extract an i32 from an f64. This
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure.  In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers.  Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.

llvm-svn: 48294
2008-03-12 20:30:08 +00:00
Anton Korobeynikov
e8fa50f63a Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
llvm-svn: 48257
2008-03-11 22:38:53 +00:00
Chris Lattner
5c7bda440f compile: double test() {}
into:

_test:
	fldz
	ret

instead of:

_test:
	subl	$12, %esp
	#IMPLICIT_DEF %xmm0
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$12, %esp
	ret

llvm-svn: 48213
2008-03-11 06:21:08 +00:00
Chris Lattner
a1f25b0020 Teach SD some vector identities, allowing us to compile vec_set-9 into:
_test3:
	movd	%rdi, %xmm1
	#IMPLICIT_DEF %xmm0
	punpcklqdq	%xmm1, %xmm0
	ret

instead of:

_test3:
	#IMPLICIT_DEF %rax
	movd	%rax, %xmm0
	movd	%rdi, %xmm1
	punpcklqdq	%xmm1, %xmm0
	ret

This is still not ideal.  There is no reason to two xmm regs.

llvm-svn: 48058
2008-03-08 23:43:36 +00:00
Evan Cheng
95cf661534 Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
llvm-svn: 48042
2008-03-08 00:58:38 +00:00
Evan Cheng
34173f0a43 80 col violation.
llvm-svn: 47998
2008-03-06 17:42:34 +00:00
Evan Cheng
a3cb090446 Constant fold SIGN_EXTEND_INREG with ashr not lshr.
llvm-svn: 47992
2008-03-06 08:20:51 +00:00
Chris Lattner
78e9cab229 Generalize FP constant shrinking optimization to apply to any vt
except ppc long double.  This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.

llvm-svn: 47938
2008-03-05 06:48:13 +00:00
Evan Cheng
567d2e5b57 Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me.
llvm-svn: 47872
2008-03-04 00:41:45 +00:00
Dan Gohman
10f34077f1 More APInt-ification.
llvm-svn: 47868
2008-03-03 23:35:36 +00:00
Dan Gohman
bd2fa566e4 More APInt-ification.
llvm-svn: 47746
2008-02-29 01:47:35 +00:00
Dan Gohman
f19609abe8 Convert the last remaining users of the non-APInt form of
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.

llvm-svn: 47654
2008-02-27 01:23:58 +00:00
Bill Wendling
d7a258d325 Rename PrintableName to Name.
llvm-svn: 47629
2008-02-26 21:47:57 +00:00
Bill Wendling
c24ea4fb41 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!

llvm-svn: 47625
2008-02-26 21:11:01 +00:00
Dan Gohman
9db0aa86d9 Avoid aborting on invalid shift counts.
llvm-svn: 47612
2008-02-26 18:50:50 +00:00
Dan Gohman
1f372edd97 Convert MaskedValueIsZero and all its users to use APInt. Also add
a SignBitIsZero function to simplify a common use case.

llvm-svn: 47561
2008-02-25 21:11:39 +00:00
Andrew Lenharth
7254826c40 Better names as per Evan's request
llvm-svn: 47435
2008-02-21 16:11:38 +00:00
Andrew Lenharth
95528943e9 Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet
llvm-svn: 47430
2008-02-21 06:45:13 +00:00
Duncan Sands
e7b462b329 LegalizeTypes support for scalarizing a vector store
and splitting extract_subvector.  This fixes nine
"make check" testcases, for example
2008-02-04-ExtractSubvector.ll and (partially)
CodeGen/Generic/vector.ll.

llvm-svn: 47384
2008-02-20 17:38:09 +00:00
Dan Gohman
b717fdaa7b Use APInt::intersects.
llvm-svn: 47380
2008-02-20 16:30:17 +00:00
Anton Korobeynikov
035eaacd1f Update gcc 4.3 warnings fix patch with recent head changes
llvm-svn: 47368
2008-02-20 11:10:28 +00:00