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584 Commits

Author SHA1 Message Date
Eli Bendersky
4f6791cafb The PNaCl target no longer permits __attribute__((regparm)). 
Remove the custom lowering code dealing with it, disallow it in PNaclTargetInfo
and adjust tests accordingly.

llvm-svn: 179059
 2013-04-08 21:31:01 +00:00
Tim Northover
b85654d3cd AArch64: bring predefines in line with most recent ACLE document 
The prefixes and names used are now identical to 32-bit ARM, which is also
expected to remain unchanged.

If we made this change after a release, we'd probably have to support both
variants for a while, but I think since AArch64 exists only on trunk now, it's
acceptable to simply swap them now.

llvm-svn: 178870
 2013-04-05 14:08:55 +00:00
Michael J. Spencer
a0d5eb3a27 Add support for __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8} on x86. 
This fixes std::thread with libstdc++.

llvm-svn: 178816
 2013-04-04 23:53:43 +00:00
Tom Stellard
7856993228 R600: Add missing Southern Islands GPU to setCPU() function 
llvm-svn: 178498
 2013-04-01 20:56:49 +00:00
Justin Holewinski
91203e8468 Remove old NVPTX cpus and add new NVPTX cpus 
llvm-svn: 178419
 2013-03-30 14:38:26 +00:00
Hal Finkel
7d4585973a Add support for gcc-compatible -mfprnd -mno-fprnd PPC options 
gcc provides -mfprnd and -mno-fprnd for controlling the fprnd target
feature; support these options as well.

llvm-svn: 178414
 2013-03-30 13:47:44 +00:00
Michael Liao
ffaae3511a Add RDSEED intrinsic support defined in AVX2 extension 
llvm-svn: 178331
 2013-03-29 05:17:55 +00:00
Hal Finkel
1fe8b3dd4b Add support for gcc-compatible -mpopcntd -mno-popcntd PPC options 
gcc provides -mpopcntd and -mno-popcntd for controlling the popcntd target
feature; support these options as well.

llvm-svn: 178235
 2013-03-28 13:51:36 +00:00
Hal Finkel
279ca4d608 Add support for gcc-compatible -mmfcrf -mno-mfcrf PPC options 
gcc provides -mmfcrf and -mno-mfcrf for controlling what we call
the mfocrf target feature. Also, PPC is now making use of the
static function AddTargetFeature used by the Mips Driver code.

llvm-svn: 178227
 2013-03-28 08:38:53 +00:00
Michael Liao
74f4eaf4dc Add PRFCHW intrinsic support 
- Add head 'prfchwintrin.h' to define '_m_prefetchw' which is mapped to
  LLVM/clang prefetch builtin
- Add option '-mprfchw' to enable PRFCHW feature and pre-define '__PRFCHW__'
  macro

llvm-svn: 178041
 2013-03-26 17:52:08 +00:00
Matthew Curtis
7808cf1a39 Remove driver support for Hexagon V2 and V3 
Driver will now error when trying to compile for V2 or V3.

Removal of V2 and V3 support will allow us to simplify the hexagon
back-end.

llvm-svn: 176859
 2013-03-12 11:52:09 +00:00
Guy Benyei
5ea30273a1 Add 'e' to the SPIR data layout - SPIR is little endian for now. 
Add 32/64 bit specific target defines for SPIR.

llvm-svn: 176629
 2013-03-07 13:06:10 +00:00
Jack Carter
beaccddcba Mips specific inline assembler constraint 'R' 
'R' An address that can be sued in a non-macro load or store.

Including missing positive test case and fixed typo for r176453.

Thanks to Richard Smith for catching this!

Jack

llvm-svn: 176506
 2013-03-05 19:10:54 +00:00
Bob Wilson
f643afcd31 Tidy up lists of Cortex-A series processors, adding entries for A7. 
Also fix a missing entry for cortex-r5 in one copy of getLLVMArchSuffixForARM.

llvm-svn: 176457
 2013-03-04 22:37:46 +00:00
Jack Carter
427b404d0a Mips specific inline assembler constraint 'R' 
'R' An address that can be sued in a non-macro load or store.
This patch includes a positive test case.

llvm-svn: 176453
 2013-03-04 21:36:11 +00:00
Tom Stellard
c74b1e054c R600: Use the GPU type to determine the correct DataLayout v2 
v2:
  - Add R600_DOUBLE_OPS for RV670
  - s/CPU/GPU/

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
llvm-svn: 176440
 2013-03-04 17:40:53 +00:00
Simon Atanasyan
0da400cf92 [Mips] Add two new aliases for MIPS ABI names 32 (means o32 abi) and 64 
(means n64 abi) to improve compatibility with GNU tools.
Patch by Jia Liu <proljc@gmail.com>.

llvm-svn: 176187
 2013-02-27 14:55:49 +00:00
Logan Chien
5a5a96bfdc Implement __builtin_eh_return_data_regno() for ARM and MIPS. 
llvm-svn: 175954
 2013-02-23 04:24:36 +00:00
Peter Collingbourne
47f9f2d1e6 Revert r175912, "Add support for coldcc to clang" at John's request. 
llvm-svn: 175936
 2013-02-23 00:06:18 +00:00
Peter Collingbourne
f32b3f2c55 Add support for coldcc to clang 
llvm-svn: 175912
 2013-02-22 19:24:35 +00:00
Jordan Rose
011bda8031 Revert "intmax_t is long long on Darwin, not long." 
'long' and 'long long' are different for the purposes of mangling.
This caused <rdar://problem/13254874>.

This reverts commit c2f994d31ec85e9af811af38eb1b28709aef0b2c.

llvm-svn: 175681
 2013-02-20 22:28:41 +00:00
Jordan Rose
e2b34142c3 intmax_t is long long on Darwin, not long. 
<rdar://problem/11540697>

llvm-svn: 175588
 2013-02-20 01:56:21 +00:00
Tim Northover
847d2d4549 AArch64: add atomic support parameters to TargetInfo 
This allows Clang to detect and deal wih __atomic_* operations properly on
AArch64. Previously we produced an error when encountering them at high
optimisation levels.

llvm-svn: 175438
 2013-02-18 12:11:32 +00:00
Bill Schmidt
38378a06dd Add some missing PPC cpus 
llvm-svn: 174215
 2013-02-01 20:23:10 +00:00
Hal Finkel
b58ce85ecc Add -mqpx and -mno-qpx feature flags to toggle use of the PPC QPX vector instruction set 
I've renamed the altivec test to ppc-features (because now there is more than one feature to test).

llvm-svn: 174204
 2013-02-01 18:44:19 +00:00
Hal Finkel
df1e4bfcb2 Add PPC A2Q core and BG/Q preprocessor definitions 
The a2q core is the variant of the a2 core used on the BG/Q supercomputers.

llvm-svn: 174151
 2013-02-01 05:53:33 +00:00
Bill Schmidt
2fe4c67374 Enable -fno-altivec, -mno-altivec for PowerPC. 
Introduces these negation forms explicitly and uses them to control a new
"altivec" target feature for PowerPC.  This allows avoiding generating
Altivec instructions on processors that support Altivec.

The new test case verifies that the Altivec "lvx" instruction is not
used when -fno-altivec is present on the command line.

llvm-svn: 174140
 2013-02-01 02:14:03 +00:00
Tim Northover
9bb857a4f1 Add support for AArch64 target. 
In cooperation with the LLVM patch, this should implement all scalar front-end
parts of the C and C++ ABIs for AArch64.

This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.

Further reviews would be gratefully received.

llvm-svn: 174055
 2013-01-31 12:13:10 +00:00
John McCall
359b885e12 First pass at abstracting out a class for the target C++ ABI. 
llvm-svn: 173514
 2013-01-25 22:30:49 +00:00
Adhemerval Zanella
5d874aeea9 PowerPC: fix __builtin_eh_return_data_regno return 
llvm-svn: 173188
 2013-01-22 20:02:45 +00:00
Akira Hatanaka
b2206e71e1 [mips] Enable inlining of atomic ops on mips32 and mips64. 
llvm-svn: 172855
 2013-01-18 21:58:11 +00:00
Will Dietz
f54319c891 [ubsan] Add support for -fsanitize-blacklist 
llvm-svn: 172808
 2013-01-18 11:30:38 +00:00
Dmitri Gribenko
f857950d39 Remove useless 'llvm::' qualifier from names like StringRef and others that are 
brought into 'clang' namespace by clang/Basic/LLVM.h

llvm-svn: 172323
 2013-01-12 19:30:44 +00:00
Guy Benyei
03e61960c8 Enable intel_ocl_bicc for x86_64 target only. Remove fix from 171969 that enabled this extension for multiple targets. 
llvm-svn: 172052
 2013-01-10 10:41:05 +00:00
Akira Hatanaka
009173f613 [mips] Fix data layout string. Add 64 to the list of native integer widths 
and add stack alignment information.

llvm-svn: 171588
 2013-01-05 02:04:34 +00:00
Anshuman Dasgupta
89730ce9ee Correct Hexagon DataLayout string. Fixes bug 14744. 
Patch by Krzysztof Parzyszek!

llvm-svn: 171415
 2013-01-02 21:25:57 +00:00
Chandler Carruth
ffd5551bc7 Rewrite #includes for llvm/Foo.h to llvm/IR/Foo.h as appropriate to 
reflect the migration in r171366.

Re-sort the #include lines to reflect the new paths.

llvm-svn: 171369
 2013-01-02 11:45:17 +00:00
Richard Smith
2bf7fdb723 s/CPlusPlus0x/CPlusPlus11/g 
llvm-svn: 171367
 2013-01-02 11:42:31 +00:00
Guy Benyei
f0a014bbb7 Add intel_ocl_bicc calling convention as a function attribute to clang. The calling convention is already implemented in LLVM. 
llvm-svn: 171056
 2012-12-25 08:53:55 +00:00
Quentin Colombet
f5a37a3b71 Add ARM cortex-r5 subtarget as available mcpu 
llvm-svn: 170909
 2012-12-21 17:57:47 +00:00
NAKAMURA Takumi
02f4395df6 Targets.cpp: [cygwin] Add the predefined macro "_X86_", according to newer version of cygwin/w32api. 
llvm-svn: 170188
 2012-12-14 10:17:26 +00:00
Guy Benyei
41aa1a4b92 Remove little endian specification from SPIR data layout - SPIR doesn't define endiannes in the data layout. 
llvm-svn: 170125
 2012-12-13 13:22:48 +00:00
Rafael Espindola
0f207edaa5 Initial support for FreeBSD on ARM. 
Patch by Andrew Turner.

llvm-svn: 170096
 2012-12-13 04:17:14 +00:00
Guy Benyei
b798fc9849 Add SPIR32/SPIR64 targets to Clang 
llvm-svn: 169917
 2012-12-11 21:38:14 +00:00
Aaron Ballman
02df2e0872 Virtual method overrides can no longer have mismatched calling conventions. This fixes PR14339. 
llvm-svn: 169705
 2012-12-09 17:45:41 +00:00
David Chisnall
a87d85994b long double should be 64 bits on FreeBSD/MIPS64. It possibly should be on 
Linux too, as I think we inherited it from there.  The ABI spec says 128-bit,
although I think SGI's compiler on IRIX may be the only thing ever to support
this.

llvm-svn: 169674
 2012-12-08 09:06:08 +00:00
Eli Bendersky
d7c9203938 Adapt to LLVM commit 169291 which streamlines the usage of NaCl/NativeClient 
in the triple.

llvm-svn: 169292
 2012-12-04 18:38:10 +00:00
Bill Wendling
0517508c00 Don't emit a warning with an input/output parameter. We assume the user knows what they're doing here. 
llvm-svn: 169059
 2012-11-30 23:46:56 +00:00
Bill Wendling
3c6591d6ea Don't warn if the input size is less than the register size. Also don't warn if 
the output size is greater than the register size. No truncation occurs with
those. Reword warning to make it clearer what's the problem is.

llvm-svn: 169054
 2012-11-30 23:18:12 +00:00
Quentin Colombet
2e9952ef60 Add ARM cortex-a5 subtarget 
llvm-svn: 168958
 2012-11-29 23:15:27 +00:00