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417 Commits

Author SHA1 Message Date
Owen Anderson
029182f3a3 Change the heuristics used in the coalescer, register allocator, and within 
live intervals itself to use an instruction count approximation that is 
not affected by inserting empty indices.

llvm-svn: 53937
 2008-07-22 22:46:49 +00:00
Evan Cheng
a7a20c4946 Fix a memory leak in LiveIntervalAnalysis. 
llvm-svn: 53779
 2008-07-19 00:37:25 +00:00
Dan Gohman
0ece943845 Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks. 
Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.

llvm-svn: 53746
 2008-07-17 23:49:46 +00:00
Evan Cheng
2b3c52d5c4 Typos. 
llvm-svn: 53504
 2008-07-12 02:22:07 +00:00
Evan Cheng
e0a352e8e7 Fix PR2536: a nasty spiller bug. If a two-address instruction uses a register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g. 
8   %reg1024<def> = IMPLICIT_DEF
12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2

The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap.

llvm-svn: 53503
 2008-07-12 01:56:02 +00:00
Evan Cheng
e9ba28dd68 - Change the horrible N^2 isRegReDefinedByTwoAddr. Now callers must supply the operand index of def machineoperand and at most one full scan of non-implicit operands is needed. 
- Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel.

llvm-svn: 53394
 2008-07-10 07:35:43 +00:00
Dan Gohman
3b46030375 Pool-allocation for MachineInstrs, MachineBasicBlocks, and 
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
 2008-07-07 23:14:23 +00:00
Evan Cheng
7d98a48f15 - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. 
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.

llvm-svn: 53097
 2008-07-03 09:09:37 +00:00
Owen Anderson
b55675e1db Remember which MachineOperand we were processing, so we don't have to scan the list to find it again later. 
This speeds up live intervals from 0.37s to 0.30s on instcombine.

llvm-svn: 52745
 2008-06-25 23:39:39 +00:00
Evan Cheng
f593a65497 Undo spill weight tweak. Need to investigate the performance regressions. 
llvm-svn: 52572
 2008-06-21 06:45:54 +00:00
Owen Anderson
3c4ccc830e Revert my last patch, which was causing regression test failures. 
llvm-svn: 52485
 2008-06-19 05:29:34 +00:00
Evan Cheng
55bc848640 Minor spiller tweak to unfavor reload into load/store instructions. 
llvm-svn: 52477
 2008-06-19 01:16:17 +00:00
Owen Anderson
80ef880b98 Insert empty slots into the instruction numbering in live intervals, so that we can more easily 
add new instructions.

llvm-svn: 52475
 2008-06-19 00:10:49 +00:00
Evan Cheng
f873ed1b10 Live-through live interval is [mbb start, mbb end+1]. 
llvm-svn: 52431
 2008-06-17 20:13:36 +00:00
Owen Anderson
476e91ab75 Remove special case handling of empty MBBs now that we assign indices to them. 
llvm-svn: 52345
 2008-06-16 19:32:40 +00:00
Owen Anderson
773b2d3ac3 Re-enable empty block indexing by default, since it doesn't seem to have any 
impact on code quality or compile time.

llvm-svn: 52329
 2008-06-16 16:58:24 +00:00
Owen Anderson
e546c55e59 Make indexing empty basic blocks an option for the moment. 
llvm-svn: 52306
 2008-06-16 07:10:49 +00:00
Owen Anderson
d813091cde Assign indices to empty basic blocks. This will be necessary for StrongPHIElimination in the near future. 
llvm-svn: 52300
 2008-06-16 06:18:41 +00:00
Evan Cheng
6d7a144453 Refine stack slot interval weight computation. 
llvm-svn: 52040
 2008-06-06 07:54:39 +00:00
Owen Anderson
35e2dfe1cf Add a helper for constructing new live ranges that ended from an instruction to the end of its MBB. 
llvm-svn: 52012
 2008-06-05 17:15:43 +00:00
Evan Cheng
12a0222a01 Add a stack slot coloring pass. Not yet enabled. 
llvm-svn: 51934
 2008-06-04 09:18:41 +00:00
Owen Anderson
0908deccc2 Correctly handle removed instructions at the beginning of MBBs when renumbering. 
llvm-svn: 51876
 2008-06-02 17:36:36 +00:00
Owen Anderson
82fc4cdafb Make the renumbering correct in the face of deleted instructions that have been removed from the LiveIntervals maps. 
llvm-svn: 51714
 2008-05-29 23:01:22 +00:00
Bill Wendling
bf5b228c32 Remove <iostream>. 
llvm-svn: 51704
 2008-05-29 21:29:39 +00:00
Owen Anderson
d95dcd12c9 Revert part of my last patch that I didn't intend to commit yet. 
llvm-svn: 51694
 2008-05-29 18:35:21 +00:00
Owen Anderson
0178e95791 Renumbering needs to account for instruction slot offsets when performing lookups in the index maps. 
llvm-svn: 51691
 2008-05-29 18:15:49 +00:00
Owen Anderson
779b4180dc Remap VNInfo data as well when doing renumbering. 
llvm-svn: 51658
 2008-05-28 22:40:08 +00:00
Owen Anderson
4f8e1ad32a Factor the numbering computation into a separate method, and add the slightest attempt at some renumbering logic, which is currently unused. 
llvm-svn: 51652
 2008-05-28 20:54:50 +00:00
Evan Cheng
7c0db62a5e Revert 51440 as it breaks a bunch of PIC tests. 
llvm-svn: 51513
 2008-05-23 23:00:04 +00:00
David Greene
830487035e When rewriting defs and uses after spilling, don't set the weight of a 
live interval to infinity if the instruction being rewritten is an
original remat def instruction.  We were only checking against the clone
of the remat def which doesn't actually appear in the IR at all.

llvm-svn: 51440
 2008-05-22 21:16:33 +00:00
Evan Cheng
c8b028daa4 Don't spill dead def. 
llvm-svn: 51305
 2008-05-20 08:10:37 +00:00
Dan Gohman
d78c400b5b Clean up the use of static and anonymous namespaces. This turned up 
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017
 2008-05-13 00:00:25 +00:00
Dan Gohman
6a2da37c0e Make several variable declarations static. 
llvm-svn: 50696
 2008-05-06 01:53:16 +00:00
Evan Cheng
8dc8a8d8af Empty basic block should have an empty range. 
llvm-svn: 49800
 2008-04-16 18:01:08 +00:00
Evan Cheng
499ffa9055 Use of implicit_def is not part of live interval. Create empty intervals for the uses when the live interval is being spilled. 
llvm-svn: 49542
 2008-04-11 17:53:36 +00:00
Evan Cheng
c8eeb752a3 - More aggressively coalescing away copies whose source is defined by an implicit_def. 
- Added insert_subreg coalescing support.

llvm-svn: 49448
 2008-04-09 20:57:25 +00:00
Evan Cheng
20aed56504 - Treat a live range defined by an implicit_def as a zero-sized one. 
- Eliminate an implicit_def when it's being spilled.

llvm-svn: 49166
 2008-04-03 16:39:43 +00:00
Evan Cheng
985a0b51d7 Re-materialization is for uses only. 
llvm-svn: 49053
 2008-04-01 21:37:32 +00:00
Evan Cheng
e4f77c69ac It's not safe to fold a load from GV stub or constantpool into a two-address use. 
llvm-svn: 49002
 2008-03-31 23:19:51 +00:00
Evan Cheng
73d7c3bfba The support for remat of instructions with a register operand is hackish, to say the least. Since the register operand guaranteed to be PIC base and that it is already live at all uses, we are making sure it will not be spilled after its uses are rematerialized for both performance and correctness reasons. 
llvm-svn: 48976
 2008-03-31 07:53:30 +00:00
Evan Cheng
ec7533b620 Remove isImplicitDef TargetInstrDesc flag. 
llvm-svn: 48381
 2008-03-15 00:19:36 +00:00
Evan Cheng
a3891365b5 Transfer physical register spill info when load / store folding happens. 
llvm-svn: 48246
 2008-03-11 21:34:46 +00:00
Evan Cheng
e88a625ecd When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. 
llvm-svn: 48218
 2008-03-11 07:19:34 +00:00
Evan Cheng
6325446666 Refactor code. Remove duplicated functions that basically do the same thing as 
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.

llvm-svn: 47927
 2008-03-05 00:59:57 +00:00
Evan Cheng
6d56368caf Spiller now remove unused spill slots. 
llvm-svn: 47657
 2008-02-27 03:04:06 +00:00
Bill Wendling
d7a258d325 Rename PrintableName to Name. 
llvm-svn: 47629
 2008-02-26 21:47:57 +00:00
Bill Wendling
c24ea4fb41 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Evan Cheng
548677022c All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen. 
llvm-svn: 47557
 2008-02-25 19:24:01 +00:00
Evan Cheng
589a9fb6dc Correctly determine whether a argument load can be folded into its uses. 
llvm-svn: 47545
 2008-02-25 08:50:41 +00:00
Evan Cheng
504c645b3e Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. 
llvm-svn: 47529
 2008-02-23 03:38:34 +00:00