531239 Commits

Author SHA1 Message Date
David Tellenbach
94426df66a
[compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425)
ld64 issues a warning about section alignment which was counted as an
unexpected exported symbol and the test failed.

Fixed by disabling all linker warnings using -Wl,-w.
2025-03-17 17:23:58 -07:00
Valentin Clement (バレンタイン クレメン)
e5ec7bb21b
[flang][cuda] Set correct offsets for multiple variables in dynamic shared memory (#131674) 2025-03-17 17:13:06 -07:00
Cyndy Ishida
ad8f0e2760
[clang][DepScan] Pass references to ModuleDeps instead of ModuleID in lookupModuleOutput callbacks, NFCI (#131688)
This allows clients to reference more read-only attributes, like IsInStableDirectories.
2025-03-17 16:30:09 -07:00
Alex Voicu
c1fabd681f
[llvm][AMDGPU] Enable FWD_PROGRESS bit for GFX10+ (#128367)
From GFX10 onwards it is possible to employ benevolent scheduling of
waves. This patch unconditionally enables, for the `amdhsa` OS, the bit
which controls that capability, as it is beneficial for algorithms that
rely on more complex concurrent coordination and it is generally
performance neutral otherwise.
2025-03-17 23:17:46 +00:00
Paul Kirth
541b8f2e14
[clang][driver] Use rva22u64_v as the default march for Fuchsia targets (#131183)
Fuchsia supports RVA22 + Vector as outlined in https://fuchsia.dev/fuchsia-src/contribute/governance/rfcs/0234_riscv_abi_rva22+v?hl=en
2025-03-17 16:03:55 -07:00
Cyndy Ishida
584f8cc305
[clang][DependencyScanning] Track modules that resolve from "stable" locations (#130634)
That patch tracks whether all the file & module dependencies of a module
resolve to a stable location. This information will later be queried by
build systems for determining where to store the accompanying pcms.
2025-03-17 15:33:23 -07:00
Min-Yih Hsu
5bf3f08cc9
[RISCV] Update some of the RVV memory ops in SiFive P400 & P600 sched models (#129575)
This patch updates the latencies as well as occupancies of unit stride,
strided, and indexed load/store instructions in SiFive P400 & P600
scheduling models.
2025-03-17 15:29:36 -07:00
Andy Kaylor
5f866666a6
[CIR] Upstream initial support for unary op (#131369)
This adds support for the cir.unary plus, minus, inc, dec, and not operations for integer, floating point, and boolean types.
2025-03-17 15:27:37 -07:00
Pedro Lobo
1b31646757
[DFSan] Change placeholders from undef to poison (#131534)
Use `poison` to create dummy phi nodes instead of `undef`.
2025-03-17 22:16:47 +00:00
Pedro Lobo
ccf2109471
[Metadata] Change placeholder from undef to poison (#131469)
Replace `undef` constant metadata uses with `poison`.
2025-03-17 22:16:18 +00:00
Louis Dionne
5b9006550d [libc++][NFC] Fix incorrect main() signatures 2025-03-17 18:02:40 -04:00
Johannes de Fine Licht
c3f750250a
[MLIR][LLVM] Handle floats in Mem2Reg of memset intrinsics (#131621)
This was lacking a bitcast from the shifted integer type into a float.
Other non-struct types than integers and floats will still not be
Mem2Reg'ed.

Also adds special handling for constants to be emitted as a constant
directly rather than relying on followup canonicalization patterns
(`memset` of zero is a case that can appear in the wild).
2025-03-17 22:31:28 +01:00
Dave Lee
6d2b8285b3
[lldb] Support ordered patterns in lldbtest.expect (#131475)
Change `lldbtest.expect` to require the regexes in `patterns` be found in order – when the
`ordered` parameter is true. This matches the behavior of `substrs`.

The `ordered` parameter is true by default, so this change also fixes tests by either
tweaking the patterns to work in order, or by setting `ordered=False`.

I have often wanted to test with `patterns` and also verify the order. This change
allows that.
2025-03-17 14:30:39 -07:00
Florian Hahn
166937b49d
[LV] Cleanup after expanding SCEV predicate to constant.
In some cases, SCEV isn't able to prove that no wrap checks are needed,
while constant folding in SCEVExpander can. In those cases, we may leave
around IR for computing the trip count, which is unused at this point
but may be re-used later, triggering an assertion when trying to clean
up SCEVExp after vectorization.

Directly run the cleaner after expanding to a constant predicate to
prevent any generated code from being re-used.

Fixes https://github.com/llvm/llvm-project/issues/131281.
2025-03-17 21:26:51 +00:00
Tim Gymnich
887cf1f8ce
[AMDGPU][GlobalISel] Enable vector reductions (#131413)
- Enable llvm vector reductions for AMDGPU.

fixes https://github.com/llvm/llvm-project/issues/114816
2025-03-17 14:25:30 -07:00
Viktoria Maximova
128f381650
[SPIR-V] Add OpConstantCompositeContinuedINTEL instruction (#129086)
Specification:

https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_long_composites.html
2025-03-17 22:23:58 +01:00
Valentin Clement (バレンタイン クレメン)
74d4fc0a3e
[flang][cuda][NFC] Use ssa value for offset in shared memory op (#131661)
Switch from attribute to a value as we need to support dynamic offset
when multiple variables are used with dynamic shared memory.
2025-03-17 14:23:34 -07:00
Alex MacLean
0191307bb2
[IR] Allow alignstack attribute on return values (#130439)
The PTX target allows an alignment to be specified on both return values
and parameters to allow for more efficient vectorized stores. Currently
we represent these parameter alignments via the "alignstack" attribute,
but must fall back to metadata for the return value. This PR allows
"alignstack" on return values as well.
2025-03-17 14:22:08 -07:00
Jeffrey Byrnes
4336e5edbc
[SLP] Sort PHIs by ExtractElements when relevant (#131229)
Considering the PHIs in order of element extracted can lead to better shuffles.
2025-03-17 14:19:46 -07:00
Zequan Wu
6dbe82f061
[NFC][DebugInfo] Wrap DILineInfo return type with std::optional to handle missing debug info. (#129792)
Currently, `DIContext::getLineInfoForAddress` and
`DIContext::getLineInfoForDataAddress` returns empty DILineInfo when the
debug info is missing for the given address. This is not differentiable
with the case when debug info is found for the given address but the
debug info is default value (filename:linenum is <invalid>:0).

This change wraps the return types of `DIContext::getLineInfoForAddress`
and `DIContext::getLineInfoForDataAddress` with `std::optional`.
2025-03-17 17:01:06 -04:00
erichkeane
2e6402ca2c [NFC] Add explicit initializer to PGOCtxProfReader's RootEntryCount
I found that on Clang versions before 11 we suppress the defaulted
constructor because RootEntryCount would not be initialized. This patch
adds an explicit initializer which should suppress this error.
2025-03-17 13:21:59 -07:00
Kazu Hirata
4ce1d1f1d9
[ADT] Add DenseSet::insert_range (#131567)
This pach adds DenseSet::insert_range, named after
std::map::insert_range from C++23.  The intent is to allow a heavy
operation as the argument like:

  Set.insert_range(Map[Key]);

Without insert_range, we would have to do:

  Set.insert(Map[Key].begin(), Map[Key].end());

or:

  auto &M = Map[Key];
  Set.insert(M.begin(), M.end());

Neither is elegant.
2025-03-17 13:19:12 -07:00
Kaitlin Peng
e3ef5f2928
[HLSL] Add bounds checks for the HLSL fmod vector arguments and return types (#131035)
Fixes #131024.
- Fixes template for scalar and vector `fmod` intrinsic overloads
- Fixes `fmod` Sema test
2025-03-17 13:05:26 -07:00
Jan Voung
6f659b0060
[clang][dataflow] For bugprone-unchecked-optional-access report range (#131055)
Report the range in diagnostics, in addition to the location
in case the range helps disambiguate a little in chained `->`
expressions.
```
b->a->f->x = 1;
^~~~~~~
```
instead of just:
```
b->a->f->x = 1;
^
```
As a followup we should probably also report the location/range
of an `->` if that operator is used. Like:
```
b->a->f->x = 1;
       ^~
```
2025-03-17 16:04:15 -04:00
Craig Topper
d2e1e30348
[RISCV] Rename some DecoderNamespaces and cleanup debug messages. NFC (#131409)
Rename RISCV32GPRPair and RISCV32Only_ to RV32Only. This gives a more
natural home for the P extension RV32 conflicts.

While I was there I made some improvements to the debug messages.
2025-03-17 12:49:08 -07:00
Craig Topper
9eb6b37e39 [RISCV] Put CV_ELW back in XCV DecoderNamespace.
I messed this up in #130800.
2025-03-17 12:47:39 -07:00
Simon Pilgrim
bbaf743c46 [X86] Cleanup test coverage for #109272
We need to add commutated variants (to match the original bug report), some of which are still failing....
2025-03-17 19:15:37 +00:00
Simon Pilgrim
20cdffbd27 [X86] combineConcatVectorOps - extend VPERMILPD handling to support 512-bit types 2025-03-17 19:15:37 +00:00
Louis Dionne
24e88b0e6b
[libc++] Add remaining benchmarks from [alg.modifying.operations] (#127354)
This patch adds benchmarks for all the remaining algorithms in
[alg.modifying.operations] that we didn't already have a benchmark for.
2025-03-17 15:11:13 -04:00
cor3ntin
911b200ce3
[Clang] Constant Expressions inside of GCC' asm strings (#131003)
Implements GCC's constexpr string ASM extension
https://gcc.gnu.org/onlinedocs/gcc/Asm-constexprs.html
2025-03-17 20:10:46 +01:00
LLVM GN Syncbot
2443fe537f [gn build] Port af5abd9a682d 2025-03-17 18:49:27 +00:00
Sarah Spall
af5abd9a68
[HLSL] add extra scalar vector overloads for clamp (#129939)
Add additional vector scalar overloads for clamp using templates
Add Tests
fixup tests which have changed.
Closes #128230
2025-03-17 11:48:52 -07:00
Alexey Samsonov
279e82fca7
Revert f9146ccbe940d8b8eb15e7686a511a28eb0abc6b (#131656)
This reverts commit f9146ccbe940d8b8eb15e7686a511a28eb0abc6b
([libc][bazel] explicitly use system-provided errno in Bazel builds.
(#130663))

This change causes problems in Bazel builds where system errno is set to
non-zero before the tests even begin to run - see PR #131650 for the
disucssion on how to address this.
2025-03-17 11:35:42 -07:00
darkbuck
f6a7306bea
[clang][CIR] Add missing dependency on MLIR headers (#131057) 2025-03-17 11:17:10 -07:00
Alexey Bataev
ead9d6a56d [SLP]Check VectorizableTree is not empty before accessing elements
Need to check VectorizableTree is not empty before accessing elements.

Fixes #131635
2025-03-17 11:04:38 -07:00
Timm Baeder
cfa07ccdfc
[clang][bytecode] Fix builtin_memchr with non-0 start index (#131633) 2025-03-17 19:02:55 +01:00
Timm Baeder
ca1bde0b91
[clang][bytecode] Check dtor instance pointers for active-ness (#128732)
And diagnose if we're trying to destroy an inactive member of a union.
2025-03-17 19:01:35 +01:00
Louis Dionne
c53caae1d0 [libc++][NFC] Remove dead link in comment 2025-03-17 13:39:58 -04:00
Paul Kirth
0460418420
[clang][driver][NFC] Remove else after return (#131182) 2025-03-17 10:33:19 -07:00
LLVM GN Syncbot
681b24132c [gn build] Port fbb8929c9d15 2025-03-17 17:14:11 +00:00
John Harrison
fbb8929c9d
[lldb-dap] Updating RequestHandler to encode/decode arguments and response. (#130090)
This is a work in progress refactor to add explicit types instead of
generic 'llvm::json::Value' types to the DAP protocol.

This updates RequestHandler to have take the type of the arguments and
response body for serialization for requests.

The 'source' and 'disconnect' request is updated to show how the new
flow
works and includes serialization handling for optional arguments and
'void'
responses.

This is built on top of #130026

---------

Co-authored-by: Adrian Vogelsgesang <adrian.vogelsgesang@tum.de>
2025-03-17 10:13:11 -07:00
Prashanth
47f7daab06
[libc][docs] Add glob implementation status doc and include in CMakeLists (#126923)
These changes tracks `glob.h` for the implementation status of functions
and macros, with respect to the issue ( #122006 ) .

cc @nickdesaulniers
2025-03-17 13:05:50 -04:00
Helena Kotas
b3c5031b07
[HLSL] Remove HLSLResource attribute (#130342)
Fixes #104862
2025-03-17 10:00:07 -07:00
Simon Pilgrim
9a92fe0f8d [X86] Add additional test coverage for #109272 2025-03-17 16:58:43 +00:00
Simon Pilgrim
561f1d0b7c [X86] add test coverage for concatenation to 512-bit VPERMILPD nodes 2025-03-17 16:58:43 +00:00
Christian Ulmann
800593a014
[MLIR][LLVM] Avoid duplicated module flags in the export (#131627)
This commit resolves an issue in the LLVMIR export that caused the
duplication of the "Debug Info Version" module flag, when it was already
in MLIR.
2025-03-17 17:43:15 +01:00
Luke Lau
67f1c033b8
[VPlan] Remove createReduction. NFCI (#131336)
This is split off from #131300.

A VPReductionRecipe will never have a AnyOf or FindLastIV recurrence, so
when it calls createReduction it always calls createSimpleReduction.

If we replace the call then it leaves createReduction with one user in
VPInstruction::ComputeReductionResult, which we can inline and then
remove.
2025-03-18 00:18:15 +08:00
Vineet Kumar
54cb4059da
[X86][ISel][FMA] Get a handle on operand nodes when negating FMA (#130176)
When negating an FMA opcode, a new node created for a negated FMA
operand may be deleted while recursively negating another FMA operand.
This causes the following assertion to fail:
```
llc: /root/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7686: llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags): Assertion `N1.getOpcode() != ISD::DELETED_NODE && N2.getOpcode() != ISD::DELETED_NODE && N3.getOpcode() != ISD::DELETED_NODE && "Operand is DELETED_NODE!"' failed.
```
This patch adds a temporary handle on the new negated nodes to prevent
them from being deleted.
For eg. see https://godbolt.org/z/Tq4PvnKM4 .

Co-authored-by: Vineet Kumar <vineetk@hpe.com>
2025-03-17 16:07:33 +00:00
Craig Topper
b00ad36632
[RISCV] Use hasFeature instead of checkFeature in llvm-exegesis. NFC (#131401)
Until recently checkFeature was quite slow. #130936

I was curious where we use checkFeature and noticed these. I thought we
could use hasFeature instead of going through strings.
2025-03-17 09:05:09 -07:00
Luke Lau
eef5ea0c42
[VPlan] Account for dead FOR splice simplification in cost model (#131486)
Fixes #131359

After #129645, a first-order recurrence will no longer have it's splice
costed if the VPInstruction::FirstOrderRecurrenceSplice has no users and
is dead.

The legacy cost model didn't account for this, so this accounts for it
in planContainsAdditionalSimplifications to avoid the "VPlan cost model
and legacy cost model disagreed" assertion.
2025-03-18 00:00:54 +08:00