532017 Commits

Author SHA1 Message Date
Peng Liu
649cbcc376
[libc++] Remove unnecessary division and modulo operations in bitset (#121312)
The PR removes the unnecessary division and modulo operations in the
one-word specialization `__bitset<1, _Size>`. The reason is that for the
one-word specialization, we have `__pos < __bits_per_word` (as
`__bitset<1, _Size>` is an implementation detail only used by the public
`bitset`). So `__pos / __bits_per_word == 0` and `__pos / __pos %
__bits_per_word == __pos`.
2025-03-26 12:02:03 -04:00
Fangrui Song
ac8e18cdce
[AArch64] Rename VariantKind to Specifier
Follow the naming of most other backends.

> "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
> "Relocation specifier" is clear, aligns with Arm and IBM AIX's documentation, and fits the assembler's role seamlessly.

In addition, rename `AArch64MCExpr::Kind` and `getKind`, which confusingly shadow the base class `Kind` and `getKind`.

DarwinRefKind, which still uses MCSymbolRefExpr::VariantKind, is not renamed.

Pull Request: https://github.com/llvm/llvm-project/pull/132595
2025-03-26 09:01:20 -07:00
AnastasiyaChernikova
6ecc67fb32
[Exegesis] CPU selection, when native arch and target mismatch (#131014) 2025-03-26 19:00:06 +03:00
Philip Reames
236f938ef6 [CodeGen] Provide a target independent default for optimizeLoadInst [NFC]
This just moves the x86 implementation into generic code since it appears
to be suitable for any target.  The heart of this transform is inside
foldMemoryOperand so other targets won't actually kick in until they
implement said API.  This just removes one piece to implement in the
process of enabling foldMemoryOperand.
2025-03-26 08:52:40 -07:00
Michael Liao
52f941adbc [mlir][tosa] Fix '-Wreturn-type'. NFC 2025-03-26 11:43:24 -04:00
Karlo Basioli
3f82c3d5a8
Revert "[MLIR][NVGPU] Use gpu.dynamic_shared_memory in tests" (#133103)
Reverts llvm/llvm-project#133051 due to failing integration tests
2025-03-26 15:39:14 +00:00
Sjoerd Meijer
c0cce43739
[AArch64] Add FEAT_FPAC to Neoverse V2 (#133054)
This feature is implemented in the Neoverse V2 core, but wasn't specified
in the CPU definition.
2025-03-26 15:21:21 +00:00
Philip Reames
af663155e6 [RISCV] Reduce control flow complexity in foldMemoryOperandImpl [nfc]
Use a helper function so we can use early return.
2025-03-26 08:08:17 -07:00
Abhinav Kumar
99e8321953
[clang][analyzer] Ignore unnamed bitfields in UninitializedObjectChecker (#132427)
Fixes #132001 

Co-authored-by: YLChenZ <chentongyongcz@gmail.com>
2025-03-26 16:07:51 +01:00
David Spickett
1f291acc97
Revert "[ExecutionEngine] Avoid repeated hash lookups (NFC)" (#133101)
Reverts llvm/llvm-project#132587

Due to causing test failures on several of Linaro's buildbots. Several
MLIR test failures and at least one test timing out.

I doubt it's the patch itself, but instead an issue it has uncovered.
Revert while we dig into that.
2025-03-26 15:06:13 +00:00
flovent
b55dd8f607
[clang][analyzer] Correctly handle structured bindings captured by lambda (#132579)
this PR fixes #91835.

For `DeclRefExpr` in lambda's function body, it will references to
original variable declaration in AST rather than `FieldDecl` for lambda
class, so it's needed to find the corresponding `FieldDecl` and bind
`DeclRefExpr`'s value to it.

This is already implemented for variables that are not in a structured
binding structure, so I extracted that part of the code so that it can
be used in the structured binding case.
2025-03-26 16:03:43 +01:00
YunQiang Su
6dd14c881c
MIPS: Implements MipsTTIImpl::isLSRCostLess using Insns as first (#133068)
So that LoopStrengthReduce can work for MIPS.
The code is copied from RISC-V.

---------

Co-authored-by: qethu <190734095+qethu@users.noreply.github.com>
2025-03-26 23:01:26 +08:00
Sarah Spall
c3e08c8f07
[HLSL] Add new double overloads for math builtins (#132979)
Add double overloads which cast the double to a float and call the float
builtin.
Makes these double overloads conditional on hlsl version 202x or
earlier.
Add tests
Closes #128228
2025-03-26 07:54:13 -07:00
Kazu Hirata
1cc07a0865
[mlir] Use *Set::insert_range (NFC) (#133043)
We can use *Set::insert_range to collapse:

  for (auto Elem : Range)
    Set.insert(E);

down to:

  Set.insert_range(Range);

In some cases, we can further fold that into the set declaration.
2025-03-26 07:47:02 -07:00
Kazu Hirata
40d251db4a
[llvm] Use *Set::insert_range (NFC) (#133041)
We can use *Set::insert_range to collapse:

  for (auto Elem : Range)
    Set.insert(E);

down to:

  Set.insert_range(Range);

In some cases, we can further fold that into the set declaration.
2025-03-26 07:46:24 -07:00
Kazu Hirata
e78eef2b6b
[X86] Use hasSingleElement (NFC) (#133040) 2025-03-26 07:45:48 -07:00
Jonathan Thackray
a1a74c9e80
[NFC][clang] Remove superfluous header files after refactor in #132252 (#132495)
Remove superfluous header files after refactor in #132252
2025-03-26 14:45:00 +00:00
Joseph Huber
e376f3129a [libc] Make RPC allocation size query constexpr
Summary:
Let this be used for a static array.
2025-03-26 09:21:43 -05:00
Ben Shi
1db206d1c8
[AVR] Fix a bug in selection of ANY_EXTEND (#132398)
This is a walk around solution of
https://github.com/llvm/llvm-project/issues/132203
2025-03-26 15:15:40 +01:00
Patryk Wychowaniec
858f9053c5
[AVR][NFC] Simplify branch relaxation tests (#131871)
Let's use the `.space` directive to simplify AVR's branch relaxation
tests, as noticed by @MaskRay at
https://github.com/llvm/llvm-project/pull/118015#issuecomment-2728254164.

Having `.space 4100` instead of `.space 4096` is little bit awkward, but
I'd rather avoid changing two things at once (i.e. current assertions
are fine).
2025-03-26 15:14:14 +01:00
Akshat Oke
719b029c16
[AMDGPU][NPM] Port SILateBranchLowering to NPM (#130063) 2025-03-26 19:28:19 +05:30
Joseph Huber
75f810e025
[Offload] Guard HSA implicit arguments if they aren't created (#133073)
Summary:
We conditionally allocate the implicit arguments, so they possibly are
null. The flang compiler seems to hit this case, even though it
shouldn't when it's supposed to conform to the HSA code object. For now
guard this to fix the regression and cover a case in the future where
someone rolls a fully custom implementatation.

Fixes: https://github.com/llvm/llvm-project/issues/132982
2025-03-26 08:54:33 -05:00
CarolineConcatto
1b07e865a1
[AArch64][SME][NFC]Remove wrong st1b file added to test (#132969)
By mistake the file stb1 was added. This file is not running in the
tests I believe because it has not extension.
It has the same content as st1b.s
2025-03-26 13:41:42 +00:00
Guray Ozen
15f5a7a3ec
[MLIR][NVGPU] Use gpu.dynamic_shared_memory in tests (#133051)
The `memref.subview` ops in the test case were incorrect: they extracted
out-of-bounds.
2025-03-26 14:32:04 +01:00
dianqk
66f158d918
[TailDuplicator] Determine if computed gotos using blockaddress (#132536)
Using `blockaddress` should be more reliable than determining if an
operand comes from a jump table index.

Alternative: Add the `MachineInstr::MIFlag::ComputedGoto` flag when
lowering `indirectbr`. But I don't think this approach is suitable to
backport.
2025-03-26 21:27:43 +08:00
JaydeepChauhan14
4775e6d909
[X86][GlobalISel] Added support for G_FSQRT (#132356) 2025-03-26 13:52:17 +01:00
Hans Wennborg
23882f09e4 Fix test/Transforms/Coroutines/coro-materialize.ll
It was using the wrong @llvm.coro.suspend() value in %resume1.

This was found while investigating #130326
2025-03-26 13:38:28 +01:00
Dmitry Vasilyev
59c5d53199
[LLDB][NFC] Replace DWARFUnit with DWARFExpression::Delegate in DWARFExpressionList too (#133049)
This is an update for #131645.
2025-03-26 16:28:39 +04:00
David Sherwood
1c9fe8c8af
[LV] Optimise users of induction variables in early exit blocks (#130766)
This is the second of two PRs that attempts to improve the IR
generated in the exit blocks of vectorised loops with uncountable
early exits. It follows on from PR #128880. In this PR I am
improving the generated code for users of induction variables in
early exit blocks.

This required using a newly add VPInstruction called
FirstActiveLane, which calculates the index of the first active
predicate in the mask operand.

I have added a new function optimizeEarlyExitInductionUser that
is called from optimizeInductionExitUsers when handling users in
early exit blocks.
2025-03-26 12:09:59 +00:00
Walter Lee
fed4727187
Mark maybe_unused variable (#133069)
... to avoid -Wunused-variable warnings/errors when assertions are off.
2025-03-26 11:51:09 +00:00
Michael Kruse
e5129b7e20
[Flang] Implicitly add clang if flang enabled (#123964)
Clang is required to compile Flang. Instead of erroring-out if Clang is
enabled, for convinience implicitly add it to `LLVM_ENABLE_PROJECTS`,
consistent with how the MLIR dependency is handled.

This is motivatated by the discussion on whether flang-rt shoud be enabled implicitly 
(https://discourse.llvm.org/t/buildbot-changes-with-llvm-enable-runtimes-flang-rt/83571/2).
Since the answer was yet, clang would have been the only exception of not being
enabled implicitly. Fixed with this commit.
2025-03-26 12:45:52 +01:00
Timm Baeder
cb7b10c66e
[clang][bytecode] Fail on mutable reads from revisited variables (#133064)
When revisiting a variable, we do that by simply calling visitDecl() for
it, which means it will end up with the same EvalID as the rest of the
evaluation - but this way we end up allowing reads from mutable
variables. Disallow that.
2025-03-26 12:29:31 +01:00
Timm Baeder
6ff3906936
[clang][bytecode] Print more info in Block::dump() (#133062) 2025-03-26 12:25:14 +01:00
Simon Pilgrim
38ad0df38c
[X86] combineEXTRACT_SUBVECTOR - extract from a larger subvector insertion (#132950)
Fold EXTRACT_SUBVECTOR(INSERT_SUBVECTOR(SRC,SUB,C1),C2) ->
INSERT_SUBVECTOR(EXTRACT_SUBVECTOR(SRC,C2),SUB,C1-C2)

This extends the existing fold which required the extract/insert
subvector indices to match - now it will always extract as long as the
original inserted subvector is entirely contained within the extraction.

Helps avoid unnecessary use of 512-bit vectors, and improves the chance
of concatenation folds.
2025-03-26 11:12:54 +00:00
Ash Dobrescu
a308d421aa
Remove -no-pie case from indirect-goto-relocs.test (#133067)
This test was added in PR:
https://github.com/llvm/llvm-project/pull/120267. The -no-pie case in
the above mentioned test needs to be removed as subsequent changes have
caused it to fail.
2025-03-26 11:11:55 +00:00
Florian Hahn
420c056f85
[VPlan] Add ComputeFindLastIVResult opcode (NFC). (#132689)
This moves the logic for computing the FindLastIV reduction result to
its own opcode. A follow-up patch will update the new opcode to also
take the start value, to fix
https://github.com/llvm/llvm-project/issues/126836.

PR: https://github.com/llvm/llvm-project/pull/132689
2025-03-26 10:49:09 +00:00
Alex Voicu
1a7402d3d8
[NFC][Driver][HIP] Fix mixing amdgcnspirv and gfxXXX via --offload-arch (#133024)
Due to `amdgcnspirv` piggybacking on the HIPAMDToolchain, it loses its
immediately apparent SPIR-Vness, which makes the Driver want to go all
the way to Assembly emmission. This was problematic as we were trying to
`llvm-link` SPIR-V, before trying to translate it. This patch ensures
that we do the right thing and stop at bitcode emission if we are mixing
`amdgcnspirv` and concrete targets.
2025-03-26 10:06:21 +00:00
Piotr Fusik
96925fa84c
[RISCV] Add vector hasAndNot to enable optimizations (#132438)
Enables transforms that emit the VANDN instruction.

Co-authored-by: Craig Topper <craig.topper@sifive.com>
2025-03-26 10:40:00 +01:00
Discookie
a9a8338797
Reland [clang][dataflow] Fix unsupported types always being equal (#131575)
Relands #129502.

Previously when the framework encountered unsupported values (such as
enum classes), they were always treated as equal when comparing with
`==`, regardless of their actual values being different.
Now the two sides are only equal if there's a Value assigned to them.

Added handling for the special case of `nullptr == nullptr`, to preserve
the behavior of untyped `nullptr` having no value.
2025-03-26 09:34:37 +00:00
Ryotaro Kasuga
29ca03f19a
[Docs] Fix link in LoopTerminology (NFC) (#131138)
The link should refer to the section of 'phi' Instruction in the
LangRef, but it referred to the subsection of 'fcmp' Instruction.
Replace it with appropriate one.
2025-03-26 17:59:38 +09:00
Longsheng Mou
894b27a746
[mlir][MemRefToLLVM] Fix crash with unconvertable memory space (#132323)
This PR adds handling when the `memref.alloca` with unconvertable memory
space to prevent a crash. Fixes #131439.
2025-03-26 16:51:26 +08:00
Alexandros Lamprineas
cd3798d7ef
[FMV][AArch64] Add feature CSSC and detect on linux platform. (#132727)
Also removes priority bits for unused features predres and ls64.

Added to ACLE with https://github.com/ARM-software/acle/pull/390
2025-03-26 08:40:29 +00:00
Longsheng Mou
73f487d31e
[mlir][TosaToLinalg] Fix bugs in PointwiseConverter (#132526) 2025-03-26 08:33:47 +00:00
Martin Storsjö
a2e5932e8b Revert "[SLP] Make getSameOpcode support interchangeable instructions. (#132887)"
This reverts commit 6e66cfeeaec6f09a4454400e45d690457ecdd3de.

This change causes crashes on compiling some inputs, see
https://github.com/llvm/llvm-project/pull/127450#issuecomment-2752833710
and
https://github.com/llvm/llvm-project/pull/127450#issuecomment-2753375326
for details.
2025-03-26 10:24:25 +02:00
Balázs Kéri
322b2fe61e
[clang][analyzer] Move 'alpha.core.FixedAddressDereference' out of alpha (#132404) 2025-03-26 09:24:18 +01:00
Chuanqi Xu
c41926013f [Serialization] Avoid iterating Dense{Map,Set} to break determinism
in ASTWriter

It is bad to iterate Dense{Map,Set} in ASTWriter. Since the order in
Dense{Map, Set} is not stable. It may cause the produced BMI differ
even if we run the compiler twice without modifying any other thing.
2025-03-26 16:01:08 +08:00
Nikolas Klauser
3b2b918813
[libc++] Use __detected_or_t to implement __has_iterator_{category,concept}_convertible_to (#124456)
This simplifies the implementation a bit.
2025-03-26 08:55:47 +01:00
David Green
e2202b944b
[AArch64] Update costs for scalarizing i64->f32 int_to_fp. (#132366)
After #130665 these operations are scalarized to avoid
double-rounding. This updates the cost model to match.

In the future we might be able to use SVE instructions to help, but for
the moment the costs should be higher. Costsize and Latency costs are
not yet expected to be accurate. The vector insert/extract will use the
cost of VectorInsertExtractBaseCost (2 by default).
2025-03-26 07:26:17 +00:00
Timm Baeder
0bc2c5b2a4
Reapply "[clang][bytecode] Implement __builtin_{wcscmp,wcsncmp} (#132… (#132963)
…723)"

This reverts commit 1e2ad6793ac205607e7c809283cf69e1cc36a69a.


Fix the previous commit on big-endian hosts by _not_ falling through to
the `uint8_t` code path.
2025-03-26 08:19:31 +01:00
Ningning Shi(史宁宁)
ab5de9af4c
[NFC][X86][ISel] Remove the unused assert (#133029)
The condition of assert is always true, so just remove it.
OptForMinSize means hasMinSize(), which is
hasFnAttribute(Attribute::MinSize).
hasOptSize() is hasFnAttribute(Attribute::OptimizeForSize) ||
hasMinSize().
So, '!hasMinSize() || hasFnAttribute(Attribute::OptimizeForSize) ||
hasMinSize()' is awalys true.

---------------------------------
llvm/include/llvm/IR/Function.h

```
/// Optimize this function for minimum size (-Oz).
  bool hasMinSize() const { return hasFnAttribute(Attribute::MinSize); }

  /// Optimize this function for size (-Os) or minimum size (-Oz).
  bool hasOptSize() const {
    return hasFnAttribute(Attribute::OptimizeForSize) || hasMinSize();
  }
```
2025-03-26 14:42:27 +08:00