mirrors/llvm-project
0
0
Fork 0
mirror of https://github.com/llvm/llvm-project.git synced 2025-05-17 23:16:05 +00:00
Code Issues Projects Releases Wiki Activity
22,829 Commits 1,258 Branches 288 Tags
Commit Graph

166 Commits

Author SHA1 Message Date
Chris Lattner
7ad77dfc2a split register class handling from explicit physreg handling. 
llvm-svn: 26308
 2006-02-22 00:56:39 +00:00
Chris Lattner
5c79f98f15 Adjust to changes in getRegForInlineAsmConstraint prototype 
llvm-svn: 26306
 2006-02-21 23:12:12 +00:00
Evan Cheng
c3dcf5a4d7 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it 
turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242
 2006-02-16 23:11:42 +00:00
Evan Cheng
42c01c8d39 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
 2006-02-16 08:27:56 +00:00
Evan Cheng
93e4865d4b Remove an unused function parameter. 
llvm-svn: 26221
 2006-02-15 22:12:35 +00:00
Evan Cheng
6781b6e62e Turn a memcpy from string constant into a series of stores of constant values. 
llvm-svn: 26219
 2006-02-15 21:59:04 +00:00
Evan Cheng
e2038bdeee Lower memcpy with small constant size operand into a series of load / store 
ops.

llvm-svn: 26195
 2006-02-15 01:54:51 +00:00
Evan Cheng
0451499b3c Doh again! 
llvm-svn: 26188
 2006-02-14 23:05:54 +00:00
Evan Cheng
db2a7a736a Keep to < 80 cols 
llvm-svn: 26177
 2006-02-14 20:12:38 +00:00
Evan Cheng
038521ef76 Missed a break so memcpy cases fell through to memset. Doh. 
llvm-svn: 26176
 2006-02-14 19:45:56 +00:00
Evan Cheng
d502610604 Fixed a build breakage. 
llvm-svn: 26175
 2006-02-14 09:11:59 +00:00
Evan Cheng
4b40a42653 Rename maxStoresPerMemSet to maxStoresPerMemset, etc. 
llvm-svn: 26174
 2006-02-14 08:38:30 +00:00
Evan Cheng
81fcea8aa2 Expand memset dst, c, size to a series of stores if size falls below the 
target specific theshold, e.g. 16 for x86.

llvm-svn: 26171
 2006-02-14 08:22:34 +00:00
Chris Lattner
1784a9d267 now that libcalls don't suck, we can remove this hack 
llvm-svn: 26164
 2006-02-14 05:39:35 +00:00
Jim Laskey
390c63e9d9 Rename to better reflect usage (current and planned.) 
llvm-svn: 26145
 2006-02-13 12:50:39 +00:00
Jim Laskey
5995d0160c Reorg for integration with gcc4. Old style debug info will not be passed though 
to SelIDAG.

llvm-svn: 26115
 2006-02-11 01:01:30 +00:00
Evan Cheng
f9adce90bf Get rid of some memory leaks identified by Valgrind 
llvm-svn: 25960
 2006-02-04 06:49:00 +00:00
Chris Lattner
3b48431333 Add initial support for immediates. This allows us to compile this: 
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr

llvm-svn: 25955
 2006-02-04 02:26:14 +00:00
Chris Lattner
65ad53feb3 Initial early support for non-register operands, like immediates 
llvm-svn: 25952
 2006-02-04 02:16:44 +00:00
Chris Lattner
f68fd20286 remove some #ifdef'd out code, which should properly be in the dag combiner anyway. 
llvm-svn: 25941
 2006-02-03 20:13:59 +00:00
Chris Lattner
7f5880b1c7 Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------

llvm-svn: 25893
 2006-02-02 00:25:23 +00:00
Chris Lattner
1558fc64f9 Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr

llvm-svn: 25878
 2006-02-01 18:59:47 +00:00
Chris Lattner
3a5ed55187 adjust to changes in InlineAsm interface. Fix a few minor bugs. 
llvm-svn: 25865
 2006-02-01 01:28:23 +00:00
Chris Lattner
2e56e89452 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.

llvm-svn: 25827
 2006-01-31 02:03:41 +00:00
Chris Lattner
98ed05c81d remove method I just added 
llvm-svn: 25728
 2006-01-28 03:43:09 +00:00
Chris Lattner
43b867dd3b add a new callback 
llvm-svn: 25727
 2006-01-28 03:37:03 +00:00
Nate Begeman
595ec734fc Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).

llvm-svn: 25726
 2006-01-28 03:14:31 +00:00
Nate Begeman
8c47c3a3b1 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Chris Lattner
476e67be14 initial selectiondag support for new INLINEASM node. Note that inline asms 
with outputs or inputs are not supported yet. :)

llvm-svn: 25664
 2006-01-26 22:24:51 +00:00
Nate Begeman
e74795cd70 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Evan Cheng
a6eff8a432 If scheduler choice is the default (-sched=default), use target scheduling 
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.

llvm-svn: 25599
 2006-01-25 09:12:57 +00:00
Jim Laskey
b8566fa10a Typo. 
llvm-svn: 25545
 2006-01-23 13:34:04 +00:00
Evan Cheng
31272347d4 Skeleton of the list schedule. 
llvm-svn: 25544
 2006-01-23 08:26:10 +00:00
Evan Cheng
c1e1d9724d Factor out more instruction scheduler code to the base class. 
llvm-svn: 25532
 2006-01-23 07:01:07 +00:00
Chris Lattner
deda32a786 Fix bugs lowering stackrestore, fixing 2004-08-12-InlinerAndAllocas.c on 
PPC.

llvm-svn: 25522
 2006-01-23 05:22:07 +00:00
Chris Lattner
e23928c67f Fix a bug in a recent refactor that caused a bunch of programs to miscompile 
or the compiler to crash.

llvm-svn: 25503
 2006-01-21 19:12:11 +00:00
Evan Cheng
739a6a456e Do some code refactoring on Jim's scheduler in preparation of the new list 
scheduler.

llvm-svn: 25493
 2006-01-21 02:32:06 +00:00
Chris Lattner
222ceabbee If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep 
code, so that the LowerReturn code doesn't have to handle it.

llvm-svn: 25482
 2006-01-20 18:38:32 +00:00
Chris Lattner
e2ee190821 Temporary work around for a libcall insertion bug: If a target doesn't 
support FSIN/FCOS nodes, do not lower sin/cos to them.

llvm-svn: 25425
 2006-01-18 21:50:14 +00:00
Robert Bocchino
03e95af9f7 Support for the insertelement operation. 
llvm-svn: 25405
 2006-01-17 20:06:42 +00:00
Reid Spencer
b4f9a6f110 For PR411: 
This patch is an incremental step towards supporting a flat symbol table.
It de-overloads the intrinsic functions by providing type-specific intrinsics
and arranging for automatically upgrading from the old overloaded name to
the new non-overloaded name. Specifically:
  llvm.isunordered -> llvm.isunordered.f32, llvm.isunordered.f64
  llvm.sqrt -> llvm.sqrt.f32, llvm.sqrt.f64
  llvm.ctpop -> llvm.ctpop.i8, llvm.ctpop.i16, llvm.ctpop.i32, llvm.ctpop.i64
  llvm.ctlz -> llvm.ctlz.i8, llvm.ctlz.i16, llvm.ctlz.i32, llvm.ctlz.i64
  llvm.cttz -> llvm.cttz.i8, llvm.cttz.i16, llvm.cttz.i32, llvm.cttz.i64
New code should not use the overloaded intrinsic names. Warnings will be
emitted if they are used.

llvm-svn: 25366
 2006-01-16 21:12:35 +00:00
Nate Begeman
542c3c17a9 Remove some duplicated code 
llvm-svn: 25313
 2006-01-14 03:18:27 +00:00
Nate Begeman
2fba8a3aaa bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Chris Lattner
b32664583b Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow 
targets to custom expand them as they desire.

llvm-svn: 25273
 2006-01-13 02:50:02 +00:00
Chris Lattner
6c9c250dcd Add "support" for stacksave/stackrestore to the dag isel 
llvm-svn: 25268
 2006-01-13 02:24:42 +00:00
Robert Bocchino
2c966e7617 Added selection DAG support for the extractelement operation. 
llvm-svn: 25179
 2006-01-10 19:04:57 +00:00
Jim Laskey
219d559824 Applied some recommend changes from sabre. The dominate one beginning "let the 
pass manager do it's thing."  Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.

llvm-svn: 25100
 2006-01-04 22:28:25 +00:00
Chris Lattner
44c07ed61a enable the gep isel opt 
llvm-svn: 24910
 2005-12-21 19:36:36 +00:00
Chris Lattner
803a575616 Lower ConstantAggregateZero into zeros 
llvm-svn: 24890
 2005-12-21 02:43:26 +00:00
Jim Laskey
7c462768ed Added source file/line correspondence for dwarf (PowerPC only at this point.) 
llvm-svn: 24748
 2005-12-16 22:45:29 +00:00