17448 Commits

Author SHA1 Message Date
Hood Chatham
80ea31ccd7
[lld][WebAssembly] Add RUNTIME_PATH support to wasm-ld (#129050)
This finishes adding RPATH support for WebAssembly.

See my previous PR which added RPATH support to yaml2obj and obj2yaml:
https://github.com/llvm/llvm-project/pull/126080
See corresponding update to the WebAssembly/tool-conventions repo on
dynamic linking:
https://github.com/WebAssembly/tool-conventions/pull/246
2025-02-28 11:12:52 -08:00
Jacek Caban
14bab65cbf
[LLD][COFF] Support CF guards on ARM64X (#128440)
Both native and EC views share table chunks. Ensure relevant symbols are
set in both symbol tables.
2025-02-27 21:55:16 +01:00
Jacek Caban
94f34c00f2
[LLD][COFF] Use primary symbol table machine in Writer::writeHeader (NFC) (#128442)
Instead of duplicating the logic from `LinkerDriver::setMachine`.
2025-02-27 21:53:10 +01:00
Daniel Thornburgh
7ffeab3121
[LLD][ELF] Generically report "address assignment did not converge" (#128774)
There are considerable number of changes done in the address assignment
fixed point loop, and errors in any of them could cause address
assignment not to converge. However, this is reported to the user as
either "thunk creation not converged" or "relaxation not converged".

We saw a confused bug about this in the wild when spilling failed to
converge. (I'm working on a fix for that.)

We may eventually want a complete reason system when reporting address
assignment taking too many passes, but in the interim it seems prudent
to generalize the error message to "address assignment did not
converge".
2025-02-26 09:10:53 -08:00
Florin Popa
301fe47971
[AArch64][ELF] Section alignment of 4 for AArch64 instruction (#114031)
The integrated assembler sets a minimum alignment for the .text section
of 4. However user defined sections get an alignment of 1. Unlike the
GNU assembler which raises the section alignment to 4 if an AArch64
instruction is used, the integrated assembler leaves the alignment at 1

---------

Co-authored-by: Florin Popa <florin.popa@arm.com>
2025-02-24 09:17:04 +00:00
Jacek Caban
b09dfbd699
[LLD][COFF] Add support for x86_64 archives on ARM64X (#128241)
If the ECSYMBOLS section is missing in the archive, the archive could be
either a native-only ARM64 or x86_64 archive. Check the machine type of
the object containing a symbol to determine which symbol table to use.
2025-02-22 11:20:58 +01:00
Maksim Levental
a66376b0dc
[lld,CMake] Include Version.inc when LLVM_DISTRIBUTION_COMPONENTS contains lld-headers (#127946)
Without this inc file `getLLDVersion` cannot be called; see
https://github.com/llvm/llvm-project/blob/main/lld/include/lld/Common/Version.h#L16.

Fixes incomplete solution introduced by
https://github.com/llvm/llvm-project/pull/127123.
2025-02-21 09:06:33 -08:00
Csanád Hajdú
6e457c2001
[LLD][ELF][AArch64] Add support for SHF_AARCH64_PURECODE ELF section flag (3/3) (#125689)
Add support for the new SHF_AARCH64_PURECODE ELF section flag:
https://github.com/ARM-software/abi-aa/pull/304

The general implementation follows the existing one for ARM targets. The
output section only has the `SHF_AARCH64_PURECODE` flag set if all input
sections have it set.

Related PRs:
* LLVM: https://github.com/llvm/llvm-project/pull/125687
* Clang: https://github.com/llvm/llvm-project/pull/125688
2025-02-21 09:01:38 -08:00
Jacek Caban
8616c87335
[LLD][COFF] Support alternate names in both symbol tables on ARM64X (#127619)
The `.drectve` directive applies only to the namespace in which it is
defined, while the command-line argument applies only to the EC
namespace.
2025-02-21 12:52:28 +01:00
Sam Clegg
74c6111631
[lld][WebAssembly] Skip BSS when combining data segments (#127735)
In most circumstances BSS segments are not required in the output binary
but combineOutputSegments was erroneously including them. This meant
that PIC binaries were including the BSS data as zero in the binary.

Fixes: https://github.com/emscripten-core/emscripten/issues/23683
2025-02-20 14:19:27 -08:00
Fangrui Song
e1d1bb93d2 [ELF,test] Clean up aarch64-relocs.s 2025-02-19 09:38:48 -08:00
Fangrui Song
0ffe270d0e [ELF,test] Remove unneeded -o /dev/null
When the script has executed `cd %t`, it is fine to to use the output
file `a.out`.
(We don't want to rely on lit's default PWD to support lit compatible
runners. Therefore -o /dev/null is used when PWD has not been changed
to a %t derived path.)
2025-02-19 09:15:26 -08:00
Nikita Popov
cc539138ac
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
The standard libcalls for half to float and float to half conversion are
__extendhfsf2 and __truncsfhf2. However, LLVM currently uses
__gnu_h2f_ieee and __gnu_f2h_ieee instead. As far as I can tell, these
libcalls are an ARM-ism and only provided by libgcc on that platform.
compiler-rt always provides both libcalls.

Use the standard libcalls by default, and only use the __gnu libcalls on
ARM.
2025-02-19 10:16:57 +01:00
Fangrui Song
960b80c9f8 [ELF] Improve INPUT_SECTION_FLAGS test 2025-02-18 21:19:14 -08:00
Sam Clegg
b100c5074b
[lld][WebAssembly] Fix warnings in test. NFC (#127714) 2025-02-18 17:57:31 -08:00
Alexander Richardson
7f275e09a7
[ELF][LTO] Add baseline test for invalid relocations against runtime calls
This can happen when using a LTO build of compiler-rt for ARM and the
program uses 64-bit division.
The 64-bit division function in compiler-rt (__aeabi_ldivmod) is written
in assembly and calls the C function __divmoddi4, which works fine in
non-LTO links. However, when building with LTO the call inside
__aeabi_ldivmod is replaced with a jump to address zero, which then
crashes the program.

Building with -pie generates an error instead of a jump to address zero,
and surprisingly just declaring the __aeabi_ldivmod function (but not
calling it) in the input IR also avoids this issue.

Reported as https://github.com/llvm/llvm-project/issues/127284

Co-authored-by: Fangrui Song <i@maskray.me>

Reviewed By: MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/127286
2025-02-18 12:00:21 -08:00
Ellis Hoag
270284dbc2
[lld][MachO] Test with exported_symbol and exported_symbols_list together (#127243) 2025-02-18 08:32:54 -08:00
Jacek Caban
a92bfaa7d9
[LLD][COFF] Support MinGW constructor and destructor lists on ARM64X (#127205)
Split the chunks for EC and native views, inserting headers and tails for both.
2025-02-17 21:34:12 +01:00
Jacek Caban
15944056aa
[LLD][COFF] Split native and EC .CRT chunks on ARM64X (#127203) 2025-02-17 20:03:32 +01:00
Victor Campos
501c77da60
[LLD][ELF][ARM] Fix resolution of R_ARM_THM_JUMP8 and R_ARM_THM_JUMP11 for big endian (#126933)
These relocations apply to 16-bit Thumb instructions, so reading 16 bits
rather than 32 bits ensures the correct bits are masked and written
back. This fixes the incorrect masking and aligns the relocation logic
with the instruction encoding.

Before this patch, 32 bits were read from the ELF object. This did not
align with the instruction size of 16 bits, but the masking incidentally
made it all work nonetheless. However, this was the case only in little
endian.

In big endian mode, the read 32-bit word had to have its bytes reversed.
With this byte reordering, the masking would be applied to the wrong
bits, hence causing the incorrect encoding to be produced as a result of
the relocation resolution.

The added test checks the result for both little and big endian modes.
2025-02-17 10:10:35 +00:00
Maksim Levental
6273877224
[lld] enable installing lld headers and libraries as part of distribution (#127123)
This patch allows `lld-headers` and `lld-libraries` in
`LLVM_DISTRIBUTION_COMPONENTS` to be specified and thus enable piecewise
installation of `lld/**/*.h` headers and/or lld libraries (both in
shared and static builds).
This is similar to use cases such as
`clang;clang-headers;clang-libraries`. Note when `lld-libraries` is
present, `llvm-libraries` must be present as well because various lld
libraries depend on various llvm libraries.
2025-02-16 15:18:09 -05:00
Fangrui Song
c22d84f7bb [ELF] Refine ctx.arg.exportDynamic condition
--export-dynamic should be a no-op when ctx.hasDynsym is false.

* Drop unneeded ctx.hasDynsym checks.
* Static linking with --export-dynamic does not prevent devirtualization.
2025-02-16 12:12:00 -08:00
Zhaoxin Yang
6c54ab548f
[lld][LoongArch] Relax R_LARCH_{PCALA,GOT_PC}_{HI20,LO12} (#123566)
Support relaxation optimization for two types of code sequences.
```
From:
   pcalau12i $a0, %pc_hi20(sym)
       R_LARCH_PCALA_HI20, R_LARCH_RELAX
   addi.w/d $a0, $a0, %pc_lo12(sym)
       R_LARCH_PCALA_LO12, R_LARCH_RELAX
To:
   pcaddi $a0, %pc_lo12(sym)
       R_LARCH_PCREL20_S2
    
From:
   pcalau12i $a0, %got_pc_hi20(sym_got)
       R_LARCH_GOT_PC_HI20, R_LARCH_RELAX
   ld.w/d $a0, $a0, %got_pc_lo12(sym_got)
       R_LARCH_GOT_PC_LO12, R_LARCH_RELAX
To:
   pcaddi $a0, %got_pc_hi20(sym_got)
       R_LARCH_PCREL20_S2
```
Others:
- `loongarch-relax-pc-hi20-lo12-got-symbols.s` is inspired by
`aarch64-adrp-ldr-got-symbols.s`.

Co-authored-by: Xin Wang
[wangxin03@loongson.cn](mailto:wangxin03@loongson.cn)
2025-02-15 09:19:17 +08:00
Ellis Hoag
83632c039d
[lld][BP] Order .Tgm symbols for startup (#126328)
The Global Function Merger
(https://discourse.llvm.org/t/rfc-global-function-merging/82608) pass
optimistically creates merged instances of functions and suffixes their
names with `.Tgm`. Then in the linker, ICF will (hopefully) fold these
`.Tgm` functions. For example, a function `foo` might become a thunk
`foo` that calls a merged function `foo.Tgm`.

Since IRPGO runs before the global merger, we will only have a profile
for `foo`. We want to correlate this profile to both `foo` and `foo.Tgm`
so they can both be ordered to improve startup time.

I built a large binary and found that it increased the number of
functions ordered for startup, as expected.
```
Functions for startup: 12049 -> 12697
Functions for compression: 34733 -> 34707
```

The reason why we don't see a larger improvement is because there are
some cases where the code was accidentally working:
`getRootSymbol("foo.llvm.5555.Tgm")` already returns `foo`.
2025-02-13 12:10:58 -08:00
alx32
4ac79a8c98
[lld-macho] Use Symbols as branch target for safe_thunks ICF (#126835)
## Problem

The `safe_thunks` ICF optimization in `lld-macho` was creating thunks
that pointed to `InputSection`s instead of `Symbol`s. While, generally,
branch relocations can point to symbols or input sections, in this case
we need them to point to symbols as subsequently the branch extension
algorithm expects branches to always point to `Symbol`'s.

## Solution
This patch changes the ICF implementation so that safe thunks point to
`Symbol`'s rather than `InputSection`s.

## Testing
The existing `arm64-thunks.s` test is modified to include
`--icf=safe_thunks` to explicitly verify the interaction between ICF and
branch range extension thunks. Two functions were added that will be
merged together via a thunk. Before this patch, this test would generate
an assert - now this scenario is correctly handled.
2025-02-13 11:07:12 -08:00
Jacek Caban
8252e0ef82
[LLD][COFF] Emit ARM64X relocations for CHPE ExtraRFETable entries (#126713)
In the native view, ExtraEFRTable references the x86 exception table.
The EC view references the ARM exception table, as it did before this
change.
2025-02-13 19:22:57 +01:00
Jacek Caban
c52fbabc93
[LLD][COFF] Set __buildid symbol in both symbol tables on ARM64X (#126777) 2025-02-13 19:10:46 +01:00
Ellis Hoag
79fff6aa32
[lld][BP] Avoid ordering ICF'ed sections (#126327)
ICF runs before BPSectionOrderer. When a section is ICF'ed, it seems
that the original sections are marked as not live, but are still kept
around. Prior to this patch, those ICF'ed sections would be passed to BP
and ordered before being skipped when writing the output. Now, these
sections are no longer passed to BP, saving runtime and possibly
improving BP's output.

In a large binary, I found that the number of sections ordered using BP
decreased, while the number of duplicate sections drastically decreased
as expected.
```
Functions for startup: 50755 -> 50520
Functions for compression: 165734 -> 105328
Duplicate functions: 1827231 -> 55230
```
2025-02-13 08:57:44 -08:00
Jacek Caban
94d956367e
[LLD][MinGW] Add support for wrapped symbols on ARM64X (#126296)
Apply `-wrap` arguments to both symbol tables.
2025-02-10 22:52:11 +01:00
Jacek Caban
fdded8537d [LLD][COFF] Fix a typo in REQUIRES directive (NFC)
Fixes #126300.
2025-02-10 22:09:33 +01:00
Jacek Caban
6536579d80
[LLD][COFF] Add support for -includeoptional on ARM64X (#126300)
Include symbols from both symbol tables.
2025-02-10 22:01:53 +01:00
Peter Rong
839002dd2d
[lld] Remove usage of %T in lld/test (#126133)
`%T` is not unique and deprecated
[[1](https://llvm.org/docs/CommandGuide/lit.html#substitutions)].

This patch replaces all `%T` in `lld/test` with `%t.dir` (`mkdir` if
necessary)

---------

Signed-off-by: Peter Rong <PeterRong@meta.com>
2025-02-10 10:35:44 -08:00
Fangrui Song
0a470a9264
[ELF] --package-metadata: support %[0-9a-fA-F][0-9a-fA-F]
(This application-specific option is probably not appropriate as a
linker option (.o file offers more flexibility and decouples JSON
verification from linkers). However, the option has gained some traction
in Linux distributions, with support in GNU ld, gold, and mold.)

GNU ld has supported percent-encoded bytes and extensions like
`%[comma]` since November 2024.  mold supports just percent-encoded
bytes.  To prepare for potential adoption by Ubuntu, let's support
percent-encoded bytes.

Link: https://sourceware.org/bugzilla/show_bug.cgi?id=32003
Link: https://bugs.launchpad.net/ubuntu/+source/dpkg/+bug/2071468

Pull Request: https://github.com/llvm/llvm-project/pull/126396
2025-02-10 09:21:31 -08:00
Fangrui Song
10ed0e4065 [ELF] Reorder target-specific error messaes 2025-02-08 16:36:46 -08:00
Michael Kruse
5c8c2b3db5
[Flang] Rename libFortranRuntime.a to libflang_rt.runtime.a (#122341)
Following the conclusion of the
[RFC](https://discourse.llvm.org/t/rfc-names-for-flang-rt-libraries/84321),
rename Flang's runtime libraries as follows:

 * libFortranRuntime.(a|so) to libflang_rt.runtime.(a|so)
 * libFortranFloat128Math.a to libflang_rt.quadmath.a
* libCufRuntime_cuda_${CUDAToolkit_VERSION_MAJOR}.(a|so) to
libflang_rt.cuda_${CUDAToolkit_VERSION_MAJOR}.(a|so)

This follows the same naming scheme as Compiler-RT libraries
(`libclang_rt.${component}.(a|so)`). It provides some consistency
between Flang's runtime libraries for current and potential future
library components.
2025-02-08 18:02:54 +01:00
Jacek Caban
abd31b48e3
[LLD][MinGW] Exclude load config symbols from auto-export (#126134) 2025-02-07 15:52:39 +01:00
Jacek Caban
c8b2ba722f
[LLD][COFF] Add test for hybrid patchable thunks on ARM64X (NFC) (#126135) 2025-02-07 15:51:38 +01:00
Michael Kruse
98e118ca43
[Flang] Don't use FortranDecimal for runtime (#121997)
Avoid using the same library for runtime and compiler. `FortranDecimal`
was used in two ways:

1. As an auxiliary library needed for `libFortranRuntime.a`. This patch
adds the two source files of FortranDecimal directly into
FortranRuntime, so `FortranRuntime` is not used anymore.
 
2. As a library used by the Flang compiler. As the only remaining use of
the library, extra CMake code to make it compatible with the runtime can
be removed.

Before this PR, `enable_cuda_compilation` is applied to `FortranDecimal`
which causes everything that links to it, including flang (the
compiler), to depend on libcudart when CUDA support is enabled.

Having two runtime library just makes everything more complicated while
the user ideally should not be concerned with how the runtime is
structured internally. Some logic was copied for FortranDecimal because
of this, such as the ability to be compiled out-of tree
(b75a3c9f31c1ffdc9856aee32991d8129b372ee7) which is undocumented, the
logic to link against the various versions of Microsofts runtime library
(#70833), and avoiding dependency on the C++ runtime
(7783bba22c7add678d796741d30669c73159b3d8).
2025-02-07 11:43:31 +01:00
Jacek Caban
f729477657
[LLD][COFF] Add support for MinGW auto-export on ARM64X (#125862)
Export all symbols from both EC and native symbol tables. If an explicit
export is present in either symbol table, auto-export is disabled for
both.
2025-02-06 22:25:53 +01:00
Fangrui Song
52fc6ffcda [ELF] Refine isExported/isPreemptible condition
Reland 994cea3f0a2d0caf4d66321ad5a06ab330144d89 after bolt tests no
longer rely on -pie --unresolved-symbols=ignore-all with no input DSO
generating PLT entries.

---

Commit f10441ad003236ef3b9e5415a571d2be0c0ce5ce , while dropping a
special case for isUndefWeak and --no-dynamic-linking, made
--export-dynamic ineffective when -pie is used without any input DSO.

This change restores --export-dynamic and unifies -pie and -pie
--no-dynamic-linker when there is no input DSO.

* -pie with no input DSO suppresses undefined symbols in .dynsym.
  Previously this only appied to -pie --no-dynamic-linker.
* As a side effect, -pie with no input DSO suppresses PLT.
2025-02-05 21:16:00 -08:00
Peter Smith
ba476d0b83
[LLD][ELF][AArch64] Discard .ARM.attributes sections (#125838)
LLVM has started to emit AArch64 build attributes sections called
.ARM.attributes. LLD does not yet have support for these so they are
accumulating in the ELF output. As the first part of that support
discard all the .ARM.attributes sections. This can be built upon by the
full implementation in LLD.

The build attributes specification only defines build attributes for
relocatable objects. The intention for LLD is that files of type ET_EXEC
and ET_SHARED will not have a build attributes in the output. A
relocatable link with -r will need a merged build attributes, but until
the merge is implemented it is better to discard.
2025-02-05 14:04:21 -05:00
Jacek Caban
e596387ebe
[LLD][COFF] Use EC symbol table for output DEF file on ARM64X (#125531)
For consistency with input def handling.
2025-02-05 12:16:02 +01:00
Jacek Caban
8cb3d7b418
[LLD][COFF] Emit locally imported EC symbols for ARM64X (#125527) 2025-02-05 10:30:13 +01:00
Fangrui Song
6ab034b828
[ELF] Add BPSectionOrderer options (#125559)
Reland #120514 after 2f6e3df08a8b7cd29273980e47310cf09c6fdbd8 fixed
iteration order issue and libstdc++/libc++ differences.

---

Both options instruct the linker to optimize section layout with the
following goals:

* `--bp-compression-sort=[data|function|both]`: Improve Lempel-Ziv
compression by grouping similar sections together, resulting in a
smaller compressed app size.
* `--bp-startup-sort=function --irpgo-profile=<file>`: Utilize a
temporal profile file to reduce page faults during program startup.

The linker determines the section order by considering three groups:

* Function sections ordered according to the temporal profile
(`--irpgo-profile=`), prioritizing early-accessed and frequently
accessed functions.
* Function sections. Sections containing similar functions are placed
together, maximizing compression opportunities.
* Data sections. Similar data sections are placed together.

Within each group, the sections are ordered using the Balanced
Partitioning algorithm.

The linker constructs a bipartite graph with two sets of vertices:
sections and utility vertices.

* For profile-guided function sections:
  + The number of utility vertices is determined by the symbol order
within the profile file.
  + If `--bp-compression-sort-startup-functions` is specified, extra
utility vertices are allocated to prioritize nearby function similarity.
* For sections ordered for compression: Utility vertices are determined
by analyzing k-mers of the section content and relocations.

The call graph profile is disabled during this optimization.

When `--symbol-ordering-file=` is specified, sections described in that
file are placed earlier.

Co-authored-by: Pengying Xu <xpy66swsry@gmail.com>
2025-02-04 09:12:32 -08:00
Kazu Hirata
8686e677ff
[lld] Migrate away from PointerUnion::dyn_cast (NFC) (#125458)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:

  // FIXME: Replace the uses of is(), get() and dyn_cast() with
  //        isa<T>, cast<T> and the llvm::dyn_cast<T>

Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect referent to be nonnull.
2025-02-03 12:28:14 -08:00
Fangrui Song
2f6e3df08a BPSectionOrderer: stabilize iteration order and node order
Exposed by the test added in the reverted #120514

* Fix libstdc++/libc++ differences due to nth_element. https://github.com/llvm/llvm-project/pull/125450#issuecomment-2631404178
* Fix LLVM_ENABLE_REVERSE_ITERATION=1 differences
* Fix potential issue in `currentSize += D::getSize(*sections[*sectionIdxs.begin()])` where DenseSet was used, though not covered by a test
2025-02-03 10:36:51 -08:00
Hans Wennborg
f3c4b58f4b Revert "[ELF] Add BPSectionOrderer options (#120514)"
The ELF/bp-section-orderer.s test is failing on some buildbots due to
what seems like non-determinism issues, see comments on the original PR
and #125450

Reverting to green the build.

This reverts commit 0154dce8d39d2688b09f4e073fe601099a399365 and
follow-up commits 046dd4b28b9c1a75a96cf63465021ffa9fe1a979 and
c92f20416e6dbbde9790067b80e75ef1ef5d0fa4.
2025-02-03 11:41:23 +01:00
Nikita Popov
b84f7d17f8 Revert "[ELF] Refine isExported/isPreemptible condition"
This reverts commit 994cea3f0a2d0caf4d66321ad5a06ab330144d89.

Try to fix the bolt test failures in pre-merge checks.
2025-02-03 10:01:53 +01:00
Fangrui Song
046dd4b28b [lld] BPSectionOrderer: stabilize iteration order 2025-02-02 21:58:29 -08:00
Fangrui Song
c92f20416e [lld] BPSectionOrderer: stabilize iteration order with MapVector 2025-02-02 21:35:32 -08:00