634 Commits

Author SHA1 Message Date
Benjamin Kramer
ffecc84583 Add support for -march=slm, aka Intel Atom Silvermont.
llvm-svn: 189670
2013-08-30 14:05:34 +00:00
Charles Davis
b5a214e4f3 Add ms_abi and sysv_abi attribute handling.
Based on a patch by Benno Rice!

llvm-svn: 189644
2013-08-30 04:39:01 +00:00
Reid Kleckner
78af0708b7 Delete CC_Default and use the target default CC everywhere
Summary:
Makes functions with implicit calling convention compatible with
function types with a matching explicit calling convention.  This fixes
things like calls to qsort(), which has an explicit __cdecl attribute on
the comparator in Windows headers.

Clang will now infer the calling convention from the declarator.  There
are two cases when the CC must be adjusted during redeclaration:
1. When defining a non-inline static method.
2. When redeclaring a function with an implicit or mismatched
convention.

Fixes PR13457, and allows clang to compile CommandLine.cpp for the
Microsoft C++ ABI.

Excellent test cases provided by Alexander Zinenko!

Reviewers: rsmith

Differential Revision: http://llvm-reviews.chandlerc.com/D1231

llvm-svn: 189412
2013-08-27 23:08:25 +00:00
Tom Stellard
30687219ba R600: Add local address pointer size to DataLayout
llvm-svn: 189302
2013-08-27 00:55:26 +00:00
Rafael Espindola
890498236b Update now that llvm uses the same feature names as the driver.
llvm-svn: 189142
2013-08-23 20:21:37 +00:00
Rafael Espindola
eb26547177 Move -mfpmath handling to -cc1 and implement it for x86.
The original idea was to implement it all on the driver, but to do that the
driver needs to know the sse level and to do that it has to know the default
features of a cpu.

Benjamin Kramer pointed out that if one day we decide to implement support for
' __attribute__ ((__target__ ("arch=core2")))', then the frontend needs to
keep its knowledge of default features of a cpu.

To avoid duplicating which part of clang handles default cpu features,
it is probably better to handle -mfpmath in the frontend.

For ARM this patch is just a small improvement. Instead of a cpu list, we
check if neon is enabled, which allows us to reject things like

-mcpu=cortex-a9 -mfpu=vfp -mfpmath=neon

For X86, since LLVM doesn't support an independent ssefp feature, we just
make sure the selected -mfpmath matches the sse level.

llvm-svn: 188939
2013-08-21 21:59:03 +00:00
Rafael Espindola
8c407dedd3 Remove dead code.
setFeatureEnabled is never called with "32" or "64". The driver never passes it
and mips' getDefaultFeatures sets the Features map directly.

llvm-svn: 188913
2013-08-21 18:13:43 +00:00
Rafael Espindola
4396480358 Move the logic for selecting the last feature in the command line to the driver.
This is a partial revert of r188817 now that the driver handles -target-feature
in a single place.

llvm-svn: 188910
2013-08-21 17:34:32 +00:00
Rafael Espindola
0221d8636e Don't disable SSE4A when disabling AVX.
Thanks for Craig Topper for noticing it.

llvm-svn: 188902
2013-08-21 13:28:02 +00:00
Craig Topper
679b53ac67 Add avx512cd, avx512er, avx512pf feature flags and enable them on KNL CPU.
llvm-svn: 188867
2013-08-21 05:29:10 +00:00
Craig Topper
9c4d17f65c Replace avx-512 with avx512f to match llvm side and what gcc patches appear to be using.
llvm-svn: 188860
2013-08-21 03:59:22 +00:00
Rafael Espindola
db0fcfbfae Centralize the logic for handling -m* options and fix pr16943.
This moves the logic for handling -mfoo -mno-foo from the driver to -cc1. It
also changes -cc1 to apply the options in order, fixing pr16943.

The handling of -mno-mmx -msse is now an explicit special case.

llvm-svn: 188817
2013-08-20 18:57:55 +00:00
Rafael Espindola
a38ce29576 Remove duplicated error checking.
The driver validates its options, so we don't need to redo the work in
"clang -cc1".

llvm-svn: 188806
2013-08-20 15:30:32 +00:00
Rafael Espindola
d9401d664b Remove dead code.
llvm-svn: 188802
2013-08-20 14:18:24 +00:00
Rafael Espindola
e62e279f97 Refactor the x86 feature handling.
This removes the very long chains of
Feature["avx"] = Feature["sse42"] = ... = true;

llvm-svn: 188799
2013-08-20 13:44:29 +00:00
Craig Topper
007b059c33 Change 'avx512' to 'avx-512' to match llvm backend.
llvm-svn: 188762
2013-08-20 07:39:54 +00:00
Craig Topper
449314e1ec Add AVX-512 feature flag and knl cpu to clang.
llvm-svn: 188758
2013-08-20 07:09:39 +00:00
Craig Topper
33b4cde2f2 Revert r188756 because some other changes snuck in with it.
llvm-svn: 188757
2013-08-20 07:07:29 +00:00
Craig Topper
ffb7180e96 Add AVX-512 feature flag and knl cpu to clang.
llvm-svn: 188756
2013-08-20 07:05:05 +00:00
Bob Wilson
834400b484 Bump the value of the __APPLE_CC__ predefined macro up to 6000.
The previous value was set to match some ancient version of Apple's GCC.
The value should be higher than anything used by Apple's GCC, but we don't
intend for this value to be updated in the future. We have other macros to
identify compiler versions. <rdar://problem/14749599>

llvm-svn: 188700
2013-08-19 20:23:37 +00:00
Robert Lytton
0e07649ae5 Add XCore target
llvm-svn: 188258
2013-08-13 09:43:10 +00:00
Jack Carter
44ff1e5673 [Mips] MSA frontend option support
This patch adds -mmsa and -mno-msa to the options supported by 
clang to enable and disable support for MSA.

When MSA is enabled, a predefined macro '__mips_msa' is defined to 1.

Patch by Daniel Sanders

llvm-svn: 188184
2013-08-12 17:20:29 +00:00
Tim Northover
2fe823a6c3 AArch64: initial NEON support
Patch by Ana Pazos

- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise

- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic

- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same

- Intial implementation of instruction class:
Scalar Arithmetic

- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.

- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.

llvm-svn: 187568
2013-08-01 09:23:19 +00:00
Bill Schmidt
778d387684 [PowerPC] Support powerpc64le as a syntax-checking target.
This patch provides basic support for powerpc64le as an LLVM target.
However, use of this target will not actually generate little-endian
code.  Instead, use of the target will cause the correct little-endian
built-in defines to be generated, so that code that tests for
__LITTLE_ENDIAN__, for example, will be correctly parsed for
syntax-only testing.  Code generation will otherwise be the same as
powerpc64 (big-endian), for now.

The patch leaves open the possibility of creating a little-endian
PowerPC64 back end, but there is no immediate intent to create such a
thing.

The new test case variant ensures that correct built-in defines for
little-endian code are generated.

llvm-svn: 187180
2013-07-26 01:36:11 +00:00
Rafael Espindola
9d910f9ac3 Remove the mblaze backend from clang.
Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html

llvm-svn: 187143
2013-07-25 18:42:13 +00:00
Richard Sandiford
4652d893bc [SystemZ] Add -march= command-line option
llvm-svn: 186694
2013-07-19 16:51:51 +00:00
Bill Schmidt
58ae47bf10 [PowerPC] FreeBSD does not require f128 in its data layout string.
Long double is 64 bits on FreeBSD PPC, so the f128 entry is superfluous.

llvm-svn: 185582
2013-07-03 21:03:06 +00:00
Roman Divacky
13b586f298 Dont define __LONG_DOUBLE_128__ unless LongDoubleWidth is really 128bits width.
It's not the case on ie. FreeBSD.

llvm-svn: 185572
2013-07-03 19:45:54 +00:00
Anton Korobeynikov
ef4129084a Fix MSP430 builtin types.
Patch by Job Noorman!

llvm-svn: 185362
2013-07-01 19:42:40 +00:00
Benjamin Kramer
b1276b4cff Driver: Push triple objects around instead of going to std::string all the time.
No functionality change.

llvm-svn: 185261
2013-06-29 16:37:14 +00:00
Joey Gouly
7db275b947 Add support for passing v8fp options via -mfpu.
llvm-svn: 185075
2013-06-27 13:19:54 +00:00
Joey Gouly
d077bc6a20 Add support for passing '-target armv8' through the Driver.
llvm-svn: 184970
2013-06-26 17:19:48 +00:00
Chandler Carruth
6aa92ad762 Fix a couple of PPC predefined macros that I spotted while driving by
this code. These aren't technically standard predefines for the platform
but apparantly lots of folks use them as they show up within LLVM's own
codebase. ;] This may even fix some self host issues w/ the JIT!!!

llvm-svn: 184830
2013-06-25 11:13:47 +00:00
Justin Holewinski
7ceab3a892 [NVPTX] Add NVPTX register constraints
llvm-svn: 184578
2013-06-21 18:51:24 +00:00
Bob Wilson
87b3a189ef size_t on Darwin AAPCS targets is "unsigned long". <rdar://problem/14136459>
Some embedded targets use ARM's AAPCS with iOS header files that define size_t
as unsigned long, which conflicts with the usual AAPCS definition of size_t
as unsigned int.

llvm-svn: 184171
2013-06-18 05:36:04 +00:00
Rafael Espindola
3d4276e3cf Use atomic instructions on Bitrig armv6. Patch by Patrick Wildt.
llvm-svn: 184113
2013-06-17 20:00:15 +00:00
Ed Schouten
60afa2d923 Emit native implementations of atomic operations on FreeBSD/armv6.
Just like on Linux, FreeBSD/armv6 assumes the system supports
ldrex/strex unconditionally. It is also used by the kernel. We can
therefore enable support for it, like we do on Linux.

While there, change one of the unit tests to explicitly test against
armv5 instead of armv7, as it actually tests whether libcalls are
emitted.

llvm-svn: 184040
2013-06-15 09:40:14 +00:00
Bob Wilson
1710d59553 Do not report -Wasm-operand-widths for ARM output operands. <rdar://14050337>
We're getting reports of this warning getting triggered in cases where it
is not adding any value. There is no asm operand modifier that you can use
to silence it, and there's really nothing wrong with having an LDRB, for
example, with a "char" output.

llvm-svn: 183172
2013-06-03 23:57:13 +00:00
Jakob Stoklund Olesen
826df14d72 OpenBSD/sparc64 uses long long for int64_t and intmax_t.
Other operating systems, including FreeBSD and NetBSD, use long.

llvm-svn: 182215
2013-05-19 17:53:37 +00:00
David Fang
072d47b67f fix PR 15726: ptrdiff_t should be int on PowerPC Darwin
llvm-svn: 182029
2013-05-16 17:51:48 +00:00
Jakob Stoklund Olesen
248520bdea Use correct types for SPARC v9.
It's an LP64 platform.

llvm-svn: 181867
2013-05-15 03:22:33 +00:00
Rafael Espindola
92dbc3183f Use atomic instructions on linux thumb v7.
This matches gcc's behaviour. The patch also explicitly parses the version so
that this keeps working when we add support for v8.

llvm-svn: 181750
2013-05-14 00:44:24 +00:00
Rafael Espindola
101d5b956a Use atomic instructions on ARM linux.
This is safe given how the pre-v6 atomic ops funcions in libgcc are
implemented.

This fixes pr15429.

llvm-svn: 181728
2013-05-13 20:09:47 +00:00
Ulrich Weigand
47445073f8 Add SystemZ support
This patch then adds all the usual platform-specific pieces for SystemZ:
driver support, basic target info, register names and constraints,
ABI info and vararg support.  It also adds new tests to verify pre-defined
macros and inline asm, and updates a test for the minimum alignment change.

This version of the patch incorporates feedback from reviews by
Eric Christopher and John McCall.  Thanks to all reviewers!

Patch by Richard Sandiford.

llvm-svn: 181211
2013-05-06 16:26:41 +00:00
Tim Northover
8ec8c4bf89 AArch64: teach Clang about __clear_cache intrinsic
libgcc provides a __clear_cache intrinsic on AArch64, much like it
does on 32-bit ARM.

llvm-svn: 181111
2013-05-04 07:15:13 +00:00
Benjamin Kramer
914d7e06b6 Add support for -march=btver2.
llvm-svn: 181006
2013-05-03 10:47:15 +00:00
Jakob Stoklund Olesen
f759989bcd Add some more required SPARC v9 predefined macros.
Solaris/AuroraUX only need __arch64__, the BSDs need the other variants.

llvm-svn: 180172
2013-04-24 04:36:38 +00:00
Jakob Stoklund Olesen
4dda152d14 Add support for sparcv9 targets.
The SPARC v8 and SPARC v8 architectures are very similar, so use a base
class to share most information between them.

Include operating systems with known SPARC v9 ports.

Also fix two issues with the SPARC v8 data layout string: SPARC v8 is a
big endian target with a 64-bit aligned stack.

llvm-svn: 179596
2013-04-16 15:17:49 +00:00
Simon Atanasyan
607776140b [Mips] Support -mmicromips / -mno-micromips command line options.
llvm-svn: 179489
2013-04-14 14:07:51 +00:00
Simon Atanasyan
1607191e66 [Mips] Follow-up to r179481. Consider "single-float" as a separate
independent of float ABI feature in the MipsTargetInfoBase class.

llvm-svn: 179486
2013-04-14 14:07:30 +00:00