10004 Commits

Author SHA1 Message Date
OCHyams
a0183c205c Fix docs bot after D140989
Commit a93c4239719382e5b17335f3452e9095937ed6b7 broke docs buildbot:
https://lab.llvm.org/buildbot/#/builders/30/builds/34525
2023-04-26 10:52:06 +01:00
David Spickett
611491d73b [llvm][docs] Correct chose to choose in the builder docs 2023-04-26 09:47:11 +00:00
OCHyams
a93c423971 [DebugInfo] Update SourceLevelDebugging.rst to better explain kill locations
Reviewed By: scott.linder, jryans

Differential Revision: https://reviews.llvm.org/D140989
2023-04-26 10:31:54 +01:00
Tobias Hieta
33f509b2f4
[docs] Update HowToReleaseLLVM documentation.
There was a bunch of references to bugzilla and other old
instructions in there. I have updated it to match the current
reality.

Reviewed By: tstellar

Differential Revision: https://reviews.llvm.org/D149131
2023-04-25 18:50:57 +02:00
NAKAMURA Takumi
ab2187d786 TableGen: Introduce !range operator for half-opened interval
`!range(a, b)` generates a list `[a,b)`. `a` is optional and `0` by default.

  - `!range(-1, 4)` generates `[-1, 0, 1, 2, 3]`
  - `!range(4)` generates `[0, 1, 2, 3]`
  - `!range(2, 2)` generates `[]<list<int>>`

`!range(list)` is equivalent to `!range(0, !size(list))`.

Differential Revision: https://reviews.llvm.org/D145871
2023-04-25 22:38:20 +09:00
Aiden Grossman
1245a1ed07 [Docs] Fix minor issues in AdvancedBuilds documentation
This patch modifies the commands under the Bootstrap builds section so
that they include the -DLLVM_ENABLE_PROJECTS flag with the value "clang"
so that the Clang build will actually get picked up. Without this patch
they error out as the CLANG_BOOTSTRAP_PASSTHROUGH variable is processed
in /clang/CMakeLists.txt which isn't picked up without the
LLVM_ENABLE_PROJECTS variable being set appropriately.

This patch also changes any remaining dangling <path to source>
references to <path to source>/llvm to better match the rest of the
file.

Reviewed By: thieta

Differential Revision: https://reviews.llvm.org/D148451
2023-04-24 19:41:47 +00:00
David Spickett
73f4f56c9f [llvm][docs] Update "Adding a Builder" docs
* Move step 8 to later, after worker credentials have
  been added to the buildmaster.
* Added command for starting the worker, in addition
  to creating the worker. The latter only sets up the
  directories.
* Noted that in step 6, it is expected that you get a
  refused connection.
* Stated that the connection should be tried once,
  and the worker then stopped.

We could mention that repeated connections with invalid
credentials will result in an IP ban, but it's probably
detail people don't need here.

If it did happen, then you would not know until you tried
the later steps. At which point you are already in contact
with Galina, who is the person who would help you with that
issue in any case.

Reviewed By: gkistanova

Differential Revision: https://reviews.llvm.org/D148913
2023-04-24 10:58:35 +01:00
Craig Topper
aa8b704d97 [RISCV][Docs] Tweak the note about zicsr and zifencei since we now support version 2.1 of the base I specification.
Differential Revision: https://reviews.llvm.org/D148948
2023-04-21 12:40:58 -07:00
Alex Bradbury
3e4000034a [doc][RISCV] Add missed release note about vector crypto extension update
I meant to fold this into cb7dffdc9a83f400410657431bda14e79f6e0176 but
failed to do so.
2023-04-20 18:30:53 +01:00
Eric Gouriou
cb7dffdc9a [RISCV] Zvk (vector crypto) specification update to 0.5.1 (Zvbb/Zvbc/Zvkt/Zvkng/Zvksg)
Update the Zvk support from 0.3.x to 0.5.1, tracking the extension as
documented in
<https://github.com/riscv/riscv-crypto/releases/download/v20230407/riscv-crypto-spec-vector.pdf>.

- Zvkb is split into Zvbb and Zvbc
- Zvbc (vector carryless multiply) requires 64 bit elements (Zve64x)
- Use the extension descriptions from the specification for Zvbb/Zvbc
- Zvkt is introduced (no instructions, but adds an attribute and macro)
- Zvkn and Zvks both imply Zvkt
- Zvkng and Zvksg are introduced, adding Zvkg (GMAC) to Zvkn and Zvks
- In Zvbb, add vrev.v, vclz.v, vctz.v, vcpop.v, vwsll.{vv,vx,vi}

Differential Revision: https://reviews.llvm.org/D148483
2023-04-20 18:25:19 +01:00
Nikita Popov
029120c46a [LangRef] Update list of supported constant expressions (NFC)
For binary ops explicitly list all supported ops, as it's no
longer all of them.
2023-04-20 14:33:37 +02:00
Scott Linder
a4fb7f60e2 [HeterogeneousDWARF] Update encodings in AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
Repurpose the DW_OP_LLVM_aspace_implicit_pointer encoding (0xe9) as the
encoding for a new operation DW_OP_LLVM_user which prefixes all other
new operations.

Differential Revision: https://reviews.llvm.org/D147265
2023-04-19 20:40:21 +00:00
Hiroshi Yamauchi
36a3600785 [docs] Remove a duplicate or unnecessary 'to' in a sentence.
Differential Revision: https://reviews.llvm.org/D148657
2023-04-19 10:15:11 -07:00
terrydang
3a44c576b1 [docs] Fix the CMAKE_BUILD_TYPE option in the cmake command in GettingStarted.rst
The cmake command contained a duplicate CMAKE_BUILD_TYPE option in the
section "Compiling the LLVM Suite Source Code".
2023-04-19 09:46:29 +01:00
Alex Bradbury
0386546b08 [docs][RISCV] Use anonymous references in RISCVUsage to avoid warnings
2a5661c8415876be3fbd56ce90c2031e89ba0ef3 added a new external link with
the link text "0.2 draft specification". Surprisingly, as multiple links
have this same text but different targets this causes a warning, which
causes a failure on the llvm-sphinx-docs builder (which treats warnings
as errors). As suggested in
<https://github.com/sphinx-doc/sphinx/issues/3921>, this commit moves to
using anonymous references for the links in the experimental extensions
section.
2023-04-19 06:43:40 +01:00
Alex Bradbury
2a5661c841 [RISCV] Bump Zfa version to 0.2 and correct RISCVUsage description
As of
1f03818281
in the riscv-isa-manual, Zfa is at version 0.2. Reviewing the commit
history for
zfa.tex
<https://github.com/riscv/riscv-isa-manual/commits/master/src/zfa.tex>
there are no relevant changes since 0.1. As such, we can simply
increment the version number.

This change also removes the claim in RISCVUsage that we implement a
"subset of" Zfa, as I believe this is no longer true. That sentence
previously incorrectly claimed we didn't implement fli.{h,s,d} (I
[corrected this a couple of weeks
ago](https://reviews.llvm.org/rG3d969191b277)) but I think should have
removed the "subset of" wording too.

As was noted during the review, we never added Zfa to the release notes.
This is corrected in this patch.

Differential Revision: https://reviews.llvm.org/D148634
2023-04-19 06:27:35 +01:00
Zain Jaffal
bdb173d0dd [llvm-remarkutil] Add an option to display DebugLoc when collecting counts for remarks.
Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D148374
2023-04-18 13:48:42 +01:00
John-Earnshaw
6b65ad5c17 [Docs] Added RTTI, Run-time Type Information
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D148538
2023-04-17 10:11:20 -07:00
aabhinavg
21b68422c8 Fix the indentation error.
Differential Revision: https://reviews.llvm.org/D148535
2023-04-17 21:14:32 +05:30
aabhinavg
e0f3110b85 [docs][LangRef] Added minor update inside the frem. Fix : #61653
Added minor update inside the `frem`. Fix : #61653

Differential Revision: https://reviews.llvm.org/D146900
2023-04-17 20:38:29 +05:30
pvanhout
ae77aceba5 [Analysis] Remove DA & LegacyDA
UniformityAnalysis offers all of the same features and much more, there is no reason left to use the legacy DAs.
See RFC: https://discourse.llvm.org/t/rfc-deprecate-divergenceanalysis-legacydivergenceanalysis/69538

- Remove LegacyDivergenceAnalysis.h/.cpp
- Remove DivergenceAnalysis.h/.cpp + Unit tests
- Remove SyncDependenceAnalysis - it was not a real registered analysis and was only used by DAs
- Remove/adjust references to the passes in the docs where applicable
- Remove TTI hook associated with those passes.
- Move tests to UniformityAnalysis folder.
  - Remove RUN lines for the DA, leave only the UA ones.
- Some tests had to be adjusted/removed depending on how they used the legacy DAs.

Reviewed By: foad, sameerds

Differential Revision: https://reviews.llvm.org/D148116
2023-04-17 09:01:22 +02:00
Mark de Wever
44d38022ab Revert "Revert "Revert "[CMake] Bumps minimum version to 3.20.0."""
This reverts commit 1ef4c3c859728008cf707cad8d67f45ae5070ae1.

Two buildbots still haven't been updated.
2023-04-15 20:12:24 +02:00
Mark de Wever
1ef4c3c859 Revert "Revert "[CMake] Bumps minimum version to 3.20.0.""
This reverts commit 92523a35a827539db8557bbc3ecab7f9ea3f6ade.

Reland to see whether CIs are updated.
2023-04-15 13:12:04 +02:00
Kevin P. Neal
b02bd531d6 [FPEnv][LangRef] Update doc for strictfp attribute
Based on the direction of IR Verifier changes in D146845, this documentation
needs to be updated.

Differential Revision: https://reviews.llvm.org/D148138
2023-04-14 11:16:15 -04:00
Nikita Popov
62ef97e063 [llvm-c] Remove PassRegistry and initialization APIs
Remove C APIs for interacting with PassRegistry and pass
initialization. These are legacy PM concepts, and are no longer
relevant for the new pass manager.

Calls to these initialization functions can simply be dropped.

Differential Revision: https://reviews.llvm.org/D145043
2023-04-14 12:12:48 +02:00
Kristof Beyls
6b19efe252 [docs] Clarify that CoC docs are under a CC-BY license.
Differential Revision: https://reviews.llvm.org/D148121
2023-04-14 11:08:30 +02:00
Nikita Popov
e4251fc6bb [LangRef][Local] dereferenceable metadata violation is UB
I believe !dereferencable violation is immediate undefined behavior,
but this was not explicitly spelled out in LangRef. We already
assume that !dereferenceable is implicitly !noundef and cannot
return poison in isGuaranteedNotToBeUndefOrPoison().

The reason why we made dereferenceable implicitly noundef is that
the purpose of this metadata is to allow speculation, and that
would not be legal on a potential poison pointer.

Differential Revision: https://reviews.llvm.org/D148202
2023-04-14 10:54:01 +02:00
Ellis Hoag
4bddef4117 [InstrProf][Temporal] Add weight field to traces
As discussed in [0], add a `weight` field to temporal profiling traces found in profiles. This allows users to use the `--weighted-input=` flag in the `llvm-profdata merge` command to weight traces from different scenarios differently.

Note that this is a breaking change, but since [1] landed very recently and there is no way to "use" this trace data, there should be no users of this feature. We believe it is acceptable to land this change without bumping the profile format version.

[0] https://reviews.llvm.org/D147812#4259507
[1] https://reviews.llvm.org/D147287

Reviewed By: snehasish

Differential Revision: https://reviews.llvm.org/D148150
2023-04-13 10:37:05 -07:00
Jun Zhang
2ecbe7ca76
[Docs] Point to the correct bug tracker
Signed-off-by: Jun Zhang <jun@junz.org>
2023-04-13 21:36:20 +08:00
David Spickett
e07a421dd5 [lldb] Show register fields using bitfield struct types
This change uses the information from target.xml sent by
the GDB stub to produce C types that we can use to print
register fields.

lldb-server *does not* produce this information yet. This will
only work with GDB stubs that do. gdbserver or qemu
are 2 I know of. Testing is added that uses a mocked lldb-server.
```
(lldb) register read cpsr x0 fpcr fpsr x1
    cpsr = 0x60001000
         = (N = 0, Z = 1, C = 1, V = 0, TCO = 0, DIT = 0, UAO = 0, PAN = 0, SS = 0, IL = 0, SSBS = 1, BTYPE = 0, D = 0, A = 0, I = 0, F = 0, nRW = 0, EL = 0, SP = 0)
```

Only "register read" will display fields, and only when
we are not printing a register block.

For example, cpsr is a 32 bit register. Using the target's scratch type
system we construct a type:
```
struct __attribute__((__packed__)) cpsr {
  uint32_t N : 1;
  uint32_t Z : 1;
  ...
  uint32_t EL : 2;
  uint32_t SP : 1;
};
```

If this register had unallocated bits in it, those would
have been filled in by RegisterFlags as anonymous fields.
A new option "SetChildPrintingDecider" is added so we
can disable printing those.

Important things about this type:
* It is packed so that sizeof(struct cpsr) == sizeof(the real register).
  (this will hold for all flags types we create)
* Each field has the same storage type, which is the same as the type
  of the raw register value. This prevents fields being spilt over
  into more storage units, as is allowed by most ABIs.
* Each bitfield size matches that of its register field.
* The most significant field is first.

The last point is required because the most significant bit (MSB)
being on the left/top of a print out matches what you'd expect to
see in an architecture manual. In addition, having lldb print a
different field order on big/little endian hosts is not acceptable.

As a consequence, if the target is little endian we have to
reverse the order of the fields in the value. The value of each field
remains the same. For example 0b01 doesn't become 0b10, it just shifts
up or down.

This is needed because clang's type system assumes that for a struct
like the one above, the least significant bit (LSB) will be first
for a little endian target. We need the MSB to be first.

Finally, if lldb's host is a different endian to the target we have
to byte swap the host endian value to match the endian of the target's
typesystem.

| Host Endian | Target Endian | Field Order Swap | Byte Order Swap |
|-------------|---------------|------------------|-----------------|
| Little      | Little        | Yes              | No              |
| Big         | Little        | Yes              | Yes             |
| Little      | Big           | No               | Yes             |
| Big         | Big           | No               | No              |

Testing was done as follows:
* Little -> Little
  * LE AArch64 native debug.
* Big -> Little
  * s390x lldb running under QEMU, connected to LE AArch64 target.
* Little -> Big
  * LE AArch64 lldb connected to QEMU's GDB stub, which is running
    an s390x program.
* Big -> Big
 * s390x lldb running under QEMU, connected to another QEMU's GDB
   stub, which is running an s390x program.

As we are not allowed to link core code to plugins directly,
I have added a new plugin RegisterTypeBuilder. There is one implementation
of this, RegisterTypeBuilderClang, which uses TypeSystemClang to build
the CompilerType from the register fields.

Reviewed By: jasonmolenda

Differential Revision: https://reviews.llvm.org/D145580
2023-04-13 13:04:34 +00:00
Bjorn Pettersson
c00b526f04 [opt] Remove the ExternalFunctionsPassedConstants pass
This commit is removing the last pieces of AnalysisWrapper.cpp
(including the ExternalFunctionsPassedConstants pass, aka
print-externalfnconstants).

The pass only existed for the legacy PM, and it was not regression
tested. And since the pass did not force the use of the legacy pass
manager there was no simply way to run the pass nowadays, at least
not by using opt.

Differential Revision: https://reviews.llvm.org/D148081
2023-04-13 10:12:00 +02:00
Fangrui Song
9683d2a5e6 [docs] Fix --filter typo in SymbolizerMarkupFormat.rst 2023-04-12 18:08:58 -07:00
Paul Kirth
aa1d2693c2 [CodeGen][RISCV] Change Shadow Call Stack Register to X3
ShadowCallStack implementation uses s2 register on RISC-V, but that
choice is problematic for reasons described in:

https://lists.riscv.org/g/sig-toolchains/message/544,
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/370, and
https://github.com/google/android-riscv64/issues/72

The concern over the register choice was also brought up in
https://reviews.llvm.org/D84414.

https://reviews.llvm.org/D84414#2228666 said:

```
  "If the register choice is the only concern about this work, then I think
  we can probably land it as-is and fixup the register choice if we see
  major drawbacks later. Yes, it's an ABI issue, but on the other hand the
  shadow call stack is not a standard ABI anyway.""
```

Since we have now found a sufficient reason to fixup the register
choice, we should go ahead and update the implementation. We propose
using x3(gp) which is now the platform register in the RISC-V ABI.

Reviewed By: asb, hiraditya, mcgrathr, craig.topper

Differential Revision: https://reviews.llvm.org/D146463
2023-04-12 21:06:22 +00:00
Ellis Hoag
244be0b0de [InstrProf] Temporal Profiling
As described in [0], this extends IRPGO to support //Temporal Profiling//.

When `-pgo-temporal-instrumentation` is used we add the `llvm.instrprof.timestamp()` intrinsic to the entry of functions which in turn gets lowered to a call to the compiler-rt function `INSTR_PROF_PROFILE_SET_TIMESTAMP()`. A new field in the `llvm_prf_cnts` section stores each function's timestamp. Then in `llvm-profdata merge` we convert these function timestamps into a //trace// and add it to the indexed profile.

Since these traces could significantly increase the profile size, we've added `-max-temporal-profile-trace-length` and `-temporal-profile-trace-reservoir-size` to limit the length of a trace and the number of traces in a profile, respectively.

In a future diff we plan to use these traces to construct an optimized function order to reduce the number of page faults during startup.

Special thanks to Julian Mestre for helping with reservoir sampling.

[0] https://discourse.llvm.org/t/rfc-temporal-profiling-extension-for-irpgo/68068

Reviewed By: snehasish

Differential Revision: https://reviews.llvm.org/D147287
2023-04-11 08:30:52 -07:00
Diana Picus
d9bf8aba23 [AMDGPU] Add MMOs for GFX11 Streamout Instructions
The GFX11 NGG Streamout Instructions perform atomic operations on
dedicated registers. At the moment, they lack machine memory operands,
which causes the si-memory-legalizer pass to treat them conservatively
and introduce several unnecessary waits and cache invalidations.

This patch introduces a new address space to represent these special
registers and teaches instruction selection to add memory operands with
this new address space to DS_ADD/SUB_GS_REG_RTN.

Since this address space is meant to be compiler-internal, we move it
up a bit from the other address spaces and give it the number 128.
According to the LLVM Language Reference, address space numbers can go
all the way up to 2^24, but I'm not sure how well this is supported in
practice [1], so using a smaller number seems safer.

[1] 0107513fe7/llvm/utils/TableGen/IntrinsicEmitter.cpp (L401)

Differential Revision: https://reviews.llvm.org/D146031
2023-04-11 11:11:32 +02:00
Aiden Grossman
c19bc611bd [Docs][llvm-exegesis] Add documentation for --use-dummy-perf-counters
This patch adds in documentation for the --use-dummy-perf-counters
option (introduced in D146301).

Reviewed By: kpdev42

Differential Revision: https://reviews.llvm.org/D147842
2023-04-10 19:09:35 +00:00
Nelson Chu
0b9a620b83 [RISCV] Support assembler and dis-assembler for VCIX extension.
Spec: https://sifive.cdn.prismic.io/sifive/c3829e36-8552-41f0-a841-79945784241b_vcix-spec-software.pdf

Differential Revision: https://reviews.llvm.org/D144530
2023-04-09 20:41:01 -07:00
Aiden Grossman
b4ba5c7984 [Docs][llvm-remarkutil] Fix dangling reference in documentation
D147710 introduced a new annotation-count subcommand to llvm-remarkutil
and added in documentation. However, the reference added under the
subcommands list never actually pointed to anything. This patch adds a
marker for the reference to point to so that the link works and the
sphinx build finishes without any errors.
2023-04-08 07:50:06 +00:00
Zain Jaffal
436758f7b0 [llvm-remarkutil] Add missing new line for llvm/docs/CommandGuide/llvm-remarkutil.rst 2023-04-07 23:45:45 +01:00
Zain Jaffal
db01cf7b7c Recommit "Add an option to print out annotation remark count."
Add missing new line for `llvm/docs/CommandGuide/llvm-remarkutil.rst`

This reverts commit 0f7fcb4c670fbef2c25b835fdfdd29598c6c13ae.
2023-04-07 23:42:39 +01:00
Zain Jaffal
0f7fcb4c67 Revert "Add an option to print out annotation remark count."
This reverts commit 7cc80ef5fa359b68ee85033f98b1bef1f37fb21c.
2023-04-07 23:42:24 +01:00
Zain Jaffal
7cc80ef5fa Add an option to print out annotation remark count.
This adds a `annotation-count` option to llvm-remarkutil.

```
llvm-remarkutil annotation-count -remark=REMARK
```
This will print out the remark count for a pass that uses annotation remarks.

Differential Revision: https://reviews.llvm.org/D147710
2023-04-07 23:33:29 +01:00
Michael Buch
8b0033e58a [ReleaseNotes] DebugInfo: preferred_name attribute changes
Describes changes made in D145803.

Differential Revision: https://reviews.llvm.org/D147695
2023-04-07 01:37:37 +01:00
aabhinavg
40847375d8 [Docs][typo] Done the required fix for the #61690
Differential Revision: https://reviews.llvm.org/D146898
2023-04-06 22:22:33 +05:30
Kristof Beyls
eaa106cf1c [docs] Also mention Discord on Contributing.rst page
Differential Revision: https://reviews.llvm.org/D145480
2023-04-06 08:20:53 +02:00
Aaron Ballman
ceacb32524 Fix LLVM sphinx build
This addresses issues found by:
https://lab.llvm.org/buildbot/#/builders/30/builds/33698
2023-04-05 13:25:07 -04:00
Roy Sundahl
5f17ba1a38 [sanitizers] Simplify Explainer about dyld and weak overrides on Darwin. (NFC)
Presenting more than one way to satisfy the single-weak-ref requirement leads to
confusing messaging for the end user. Use the introduction of a single unused
weak variable as the preferred solution. This differential modifies D146745.

rdar://103453678

Reviewed By: yln, thetruestblue

Differential Revision: https://reviews.llvm.org/D147526
2023-04-05 10:04:29 -07:00
Alex Bradbury
3d969191b2 [docs][RISCV] Remove outdated note about zfa implementation status
MC layer and codegen support for fli.{h,s,d} has since been implemented.
2023-04-05 14:53:14 +01:00
Archibald Elliott
0104305bc8 [NFC][AArch64] Late 2022 A-Profile Extension Release Notes 2023-04-04 11:39:41 +01:00
Philip Reames
d7b2003761 [RISCV][docs] Document which revision of the specification we implement
This is intended to document the decision made in recent discussion, and ratified at the last risc-v sync up call two weeks ago.

The wording here turned out to be a bit tricky. I ended up using the word "revision" as the specification internally defines several versioning schemes, and RVI assigns particular meaning to the words "specification version" that I really didn't want to get into. If anyone has suggestions on how to improve this, please don't hesitate to chime in.

Differential Revision: https://reviews.llvm.org/D147183
2023-04-03 13:54:32 -07:00