879 Commits

Author SHA1 Message Date
Weiming Zhao
fb5c21a70b PR18465: [Thumbv8] add predefined macros
currently, for thumbv8, two predefined macros are missing:
 define __THUMB_INTERWORK__ 1
 define __THUMB_INTERWORK__ 1

This patch adds them for thumbv8.

llvm-svn: 199819
2014-01-22 18:42:13 +00:00
Bradley Smith
0f28f0cfc1 [ARM] Add ACLE enum/wchar size predefines
llvm-svn: 199642
2014-01-20 10:52:00 +00:00
Jakob Stoklund Olesen
497332c05f SPARCv9 implements long double as an IEEE quad.
llvm-svn: 199399
2014-01-16 16:43:19 +00:00
Tim Northover
157d911b42 MachO: use *-*-*-macho for MachO embedded targets.
Previously we had bodged together some hacks mapping MachO embedded
targets (i.e. mainly ARM v6M and v7M) to the "*-*-darwin-eabi" triple.
This is incorrect in both details (they don't run Darwin and they're
not EABI in any real sense).

This commit appropriates the existing "MachO" environment for the
purpose instead.

llvm-svn: 199367
2014-01-16 08:48:16 +00:00
Bob Wilson
b767d15d1e Remove support for armv7f slice. <rdar://problem/12478440>
This was never used for anything so we should just get rid of it.

llvm-svn: 199336
2014-01-15 21:43:40 +00:00
Jan Wen Voung
1f9c4ee464 Ensure i686-nacl long long is aligned 8 bytes (like malign-double)
Set NaCl OSTargetInfo to have LongLongAlign = 64. Otherwise, it will
pick up the setting of 32 from X86_32TargetInfo.

llvm-svn: 199335
2014-01-15 21:42:41 +00:00
Hans Wennborg
c9bd88e681 Remove the -cxx-abi command-line flag.
This makes the C++ ABI depend entirely on the target: MS ABI for -win32 triples,
Itanium otherwise. It's no longer possible to do weird combinations.

To be able to run a test with a specific ABI without constraining it to a
specific triple, new substitutions are added to lit: %itanium_abi_triple and
%ms_abi_triple can be used to get the current target triple adjusted to the
desired ABI. For example, if the test suite is running with the i686-pc-win32
target, %itanium_abi_triple will expand to i686-pc-mingw32.

Differential Revision: http://llvm-reviews.chandlerc.com/D2545

llvm-svn: 199250
2014-01-14 19:35:09 +00:00
Joerg Sonnenberger
9853439b5b Hook up NetBSD/aarch64.
llvm-svn: 199124
2014-01-13 18:25:15 +00:00
Rafael Espindola
26d0f7ce7d Use 'w' instead of 'c' to represent the win32 mangling.
This change was requested to avoid confusion if we ever support non windows
coff systems.

llvm-svn: 198939
2014-01-10 13:42:17 +00:00
Rafael Espindola
c418ae93a8 Update for llvm's DataLayout including mangling information.
llvm-svn: 198439
2014-01-03 19:22:05 +00:00
Rafael Espindola
29db13a753 Reformat the description strings. No functionality change.
llvm-svn: 198430
2014-01-03 18:13:17 +00:00
Rafael Espindola
961728064e Remove the now unused 's' specifications.
llvm-svn: 198308
2014-01-02 14:06:59 +00:00
Rafael Espindola
d8da90b008 Pass the aapcs and apcs features down to llvm.
No functionality change, but unblocks asserting that llvm's and clang's
datalayout strings are the same.

llvm-svn: 198306
2014-01-02 13:57:18 +00:00
Rafael Espindola
9ec8d08eb1 Small simplification: p0 is the same as p.
llvm-svn: 197700
2013-12-19 16:54:10 +00:00
Matt Arsenault
8ba4882c4b Update SI datalayout for 32-bit private pointers
llvm-svn: 197660
2013-12-19 05:33:14 +00:00
Rafael Espindola
dc265edb3b On spacv8 f128 is only aligned to 64 bits.
LLVM already got this right.

Found on "Figure 3-1: Scalar Types" on http://sparc.com/standards/psABI3rd.pdf.

llvm-svn: 197651
2013-12-19 03:03:04 +00:00
Rafael Espindola
1c09b264e3 Fix the DataLayout string produced by clang for NaCl.
Reviewed by Derek Schuff.

llvm-svn: 197628
2013-12-18 23:41:04 +00:00
Rafael Espindola
afa854c15e Make setABIAPCS and setABIAAPCS easier to reason about.
These functions now always set the same variables in the same order and they
don't overlap with thep constructor.

llvm-svn: 197604
2013-12-18 20:24:51 +00:00
Rafael Espindola
d6c2b720ae Split setABI in two helpers. No functionality change.
llvm-svn: 197603
2013-12-18 19:47:32 +00:00
Rafael Espindola
0ea96eba43 Add -f64:32:64 to the darwin ppc32 DataLayout.
A f64 inside a struct can be 32 bit aligned on darwin.

llvm-svn: 197577
2013-12-18 15:16:50 +00:00
Rafael Espindola
4960968509 Print the 'p' specification before the 'i' specification.
No functionality change.

llvm-svn: 197548
2013-12-18 04:14:53 +00:00
Rafael Espindola
c2e60f52ae Add a 's' specifications to AArch64.
This has no functionality change as clang adds explicit alignment info for
byval arguments. The only difference is that now the clang produced
DataLayout string for AArch64 is identical to the LLVM produced one.

llvm-svn: 197538
2013-12-17 23:30:58 +00:00
Rafael Espindola
f034b6e4c2 Remove -f128:128 from the DataLayout strings. It is the default.
llvm-svn: 197504
2013-12-17 16:07:35 +00:00
Rafael Espindola
12256302cf The PS3 is a ppc64 and has 64 bit registers. Update DataLayout accordingly.
llvm-svn: 197502
2013-12-17 15:40:00 +00:00
Rafael Espindola
26c67b7879 Remove -f16:16:32 from the XCore DataLayout string.
This makes it identical to the string llvm produces.

llvm-svn: 197500
2013-12-17 14:34:42 +00:00
Rafael Espindola
8ddf8bce91 Reorder these DataLayout entries to match the order LLVM uses.
This completes the cleanup/refactoring of DataLayout on the clang side. Next
is figuring out the differences between the llvm and clang produced strings

llvm-svn: 197442
2013-12-17 00:04:48 +00:00
Rafael Espindola
2da3532aba The preferred alignment defaults to the ABI one. Omit it if it is the same.
llvm-svn: 197440
2013-12-16 23:27:41 +00:00
Rafael Espindola
91b0cbf3fc Remove another default I missed before.
llvm-svn: 197437
2013-12-16 23:03:23 +00:00
Rafael Espindola
04c685b5e4 Clang DataLayout string cleanup: don't print other defaults.
I missed these in previous commits.

llvm-svn: 197435
2013-12-16 22:50:41 +00:00
Rafael Espindola
7f53473de7 Remove dead data.
The f80:128:128 was followed by a f80:32:32 and so never used. Looks like this
was there since r91746.

llvm-svn: 197433
2013-12-16 22:15:35 +00:00
Rafael Espindola
47debc0136 Clang DataLayout string cleanup: don't print the pointer defaults.
llvm-svn: 197430
2013-12-16 21:59:14 +00:00
Rafael Espindola
61a69257a4 Clang DataLayout string cleanup: don't print the aggregate defaults.
llvm-svn: 197429
2013-12-16 21:51:30 +00:00
Rafael Espindola
8a91f2fd85 Clang DataLayout string cleanup: don't print the vector defaults.
llvm-svn: 197427
2013-12-16 21:38:22 +00:00
Rafael Espindola
20b0d92767 Clang DataLayout string cleanup: don't print the FP defaults.
llvm-svn: 197422
2013-12-16 20:34:33 +00:00
Rafael Espindola
32083d503b Clang DataLayout string cleanup: don't print the integer defaults.
llvm-svn: 197421
2013-12-16 20:21:07 +00:00
Rafael Espindola
bf34990ed9 Delete dead code.
This is always overwritten by the one in NaClTargetInfo.

llvm-svn: 197346
2013-12-15 17:21:28 +00:00
Rafael Espindola
49806f4dbe Delete dead code.
llvm-svn: 197270
2013-12-13 20:27:54 +00:00
Rafael Espindola
f62bcc0d9c Use a: and s: instead of a0: and s0: in the DataLayout strings.
They are equivalent and the size of 'a' and 's' is unused.

llvm-svn: 197256
2013-12-13 18:40:15 +00:00
Tim Northover
8f24b178f3 ARM: teach Sema that "r" can match 64-bit values
We already support using "r" on 64-bit values (a GPRPair is
allocated), but Sema doesn't know this yet so issues a warning. This
should fix it.

llvm-svn: 196724
2013-12-08 15:24:55 +00:00
Ana Pazos
dd6068d400 Added support for mcpu krait
- krait processor currently modeled with the same features as A9.
- Krait processor additionally has VFP4 (fused multiply add/sub)
and hardware division features enabled.
- krait has currently the same Schedule model as A9
- krait cpu flag is not recognized by the GNU assembler yet,
it is replaced with march=armv7-a to avoid a lower march
from being used.

llvm-svn: 196618
2013-12-06 22:43:17 +00:00
Joerg Sonnenberger
fbd51bef13 Assume ARMv6 for NetBSD for now for strex/ldrex.
llvm-svn: 196115
2013-12-02 16:12:05 +00:00
Joerg Sonnenberger
7c7fcec329 NetBSD uses long derived size_t / ssize_t in all ARM ABIs.
llvm-svn: 196114
2013-12-02 16:09:34 +00:00
Joerg Sonnenberger
84c7ca8851 NetBSD uses signed wchar_t on ARM platforms.
llvm-svn: 195970
2013-11-30 00:38:16 +00:00
Richard Barton
3b82ed3948 Add support for Cortex-A12.
Patch by Oliver Stannard!

llvm-svn: 195449
2013-11-22 11:53:28 +00:00
Tim Northover
5bb34ca4df ARM: define & use __ARM_NEON on ARM32 (as per ACLE)
There seem to be quite a few references to the old macro __ARM_NEON__ on the
internet, so I don't think it's a good idea to remove it entirely (at least
yet), but the canonical name does not have the trailing underscores so we
should use that ourselves.

llvm-svn: 195353
2013-11-21 12:36:34 +00:00
Jim Grosbach
e2bfac497d ARM: embedded v7 'darwin' doesn't get min-version defines.
Make sure armv7 doesn't get the iOS deployment version definitions when
it's being used for non-iOS.

rdar://15497681

llvm-svn: 195149
2013-11-19 20:18:39 +00:00
Jiangning Liu
c8b0a1ad95 Clean up predefined macros for AArch64 to follow ACLE 2.0.
llvm-svn: 195068
2013-11-19 01:33:17 +00:00
Tom Stellard
5558304ba2 R600: Add processor type for Hawaii
llvm-svn: 194751
2013-11-14 23:45:53 +00:00
Daniel Sanders
8b59af15ed [mips][msa] Enable inlinse assembly for MSA.
Like GCC, this re-uses the 'f' constraint and a new 'w' print-modifier:
  asm ("ldi.w %w0, 1", "=f"(result));

Unlike GCC, the 'w' print-modifer is not _required_ to produce the intended
output. This is a consequence of differences in the internal handling of
the registers in each compiler. To be source-compatible between the
compilers, users must use the 'w' print-modifier.

MSA registers (including control registers) are supported in clobber lists.

llvm-svn: 194476
2013-11-12 12:56:01 +00:00
Robert Lytton
cc4246614f XCore target Type defines.
Change SizeType, PtrDiffType, IntPtrType, WCharType, WIntType
to follow the XMOS llvm-gcc front end's settings.

llvm-svn: 194461
2013-11-12 10:09:30 +00:00