7 Commits

Author SHA1 Message Date
Rafael Espindola
185c5c2bdf add the memri memory operand
this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103
2006-07-11 11:36:48 +00:00
Rafael Espindola
e40a7e2aa2 create the raddr addressing mode that matches any register and the frame index
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot

llvm-svn: 29079
2006-07-10 01:41:35 +00:00
Rafael Espindola
f6f5aff038 handle the "mov reg1, reg2" case in isMoveInstr
llvm-svn: 28945
2006-06-27 21:52:45 +00:00
Rafael Espindola
a88966fd5e initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll

llvm-svn: 28854
2006-06-18 00:08:07 +00:00
Rafael Espindola
b15597b59a implement movri
add a stub LowerFORMAL_ARGUMENTS

llvm-svn: 28388
2006-05-18 21:45:49 +00:00
Evan Cheng
305c49579c getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
llvm-svn: 28378
2006-05-18 00:12:58 +00:00
Rafael Espindola
ffdc24b847 added a skeleton of the ARM backend
llvm-svn: 28301
2006-05-14 22:18:28 +00:00