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81 Commits

Author SHA1 Message Date
Evan Cheng
b99726d7a0 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. 
llvm-svn: 37116
 2007-05-16 20:45:24 +00:00
Reid Spencer
e67d0c226d For PR1297: 
Implement code generation for overloaded intrinsic functions. The basic
difference is that "actual" argument types must be provided when
constructing intrinsic names and types. Also, for recognition, only the
prefix is examined. If it matches, the suffix is assumed to match. The
suffix is checked by the Verifier, however.

llvm-svn: 35539
 2007-04-01 07:20:02 +00:00
Bill Wendling
98d2104c6f Add support for the v1i64 type. This makes better code for this: 
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

llvm-svn: 35351
 2007-03-26 07:53:08 +00:00
Evan Cheng
9d7d130835 Recognize target instruction flag 'isReMaterializable'. 
llvm-svn: 35159
 2007-03-19 06:20:37 +00:00
Chris Lattner
cbebe4600f reapply 
llvm-svn: 34697
 2007-02-27 22:08:27 +00:00
Evan Cheng
116ec30e4f Backing out 
CodeGenTarget.cpp updated: 1.82 -> 1.83
Record.cpp updated: 1.55 -> 1.56
Record.h updated: 1.59 -> 1.60
TableGen.cpp updated: 1.47 -> 1.48
It's missing CallingConvEmitter.h

llvm-svn: 34693
 2007-02-27 21:44:08 +00:00
Chris Lattner
fa024e1ad1 initial support for calling convention generation, still unfinished. 
llvm-svn: 34682
 2007-02-27 20:43:37 +00:00
Jim Laskey
214c582002 Files missing from LABEL check in. 
llvm-svn: 33539
 2007-01-26 17:29:20 +00:00
Bill Wendling
9bfb1e1f29 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Evan Cheng
8e94078483 Match TargetInstrInfo changes. 
llvm-svn: 32107
 2006-12-01 22:57:41 +00:00
Chris Lattner
78a403f90e Remove the isTwoAddress property from the CodeGenInstruction class. It should 
not be used for anything other than backwards compat constraint handling.

Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter.  Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.

llvm-svn: 31769
 2006-11-15 23:23:02 +00:00
Chris Lattner
c94f214d22 ADd support for adding constraints to suboperands 
llvm-svn: 31748
 2006-11-15 02:38:17 +00:00
Chris Lattner
ba7b3673f9 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't 
have to be a subpart of a complex operand.

llvm-svn: 31618
 2006-11-10 02:01:40 +00:00
Chris Lattner
5d14eac21d emit TIED_TO correctly 
llvm-svn: 31484
 2006-11-07 01:27:55 +00:00
Chris Lattner
33f5a51020 simplify the way operand flags and constraints are handled, making it easier 
to extend.

llvm-svn: 31481
 2006-11-06 23:49:51 +00:00
Chris Lattner
8a9c91de33 recognize ppc's blr instruction as predicated 
llvm-svn: 31480
 2006-11-06 21:44:54 +00:00
Evan Cheng
3cb5bf721c Clean up some code. 
llvm-svn: 31451
 2006-11-04 09:40:23 +00:00
Chris Lattner
7982de167f eliminate need for the NumMIOperands field in Operand. 
llvm-svn: 31432
 2006-11-03 23:45:17 +00:00
Evan Cheng
3557a39494 Tied-to constraint must be op_with_larger_idx = op_with_smaller_idx or else throw an exception. 
llvm-svn: 31361
 2006-11-01 23:03:11 +00:00
Evan Cheng
ac79c7c4c0 Add operand constraints to TargetInstrInfo. 
llvm-svn: 31333
 2006-11-01 00:27:05 +00:00
Evan Cheng
2022c79d7f Added properties such as SDNPHasChain to ComplexPattern. 
llvm-svn: 30890
 2006-10-11 21:02:01 +00:00
Evan Cheng
5d038cf802 Allow more use of iPTR in patterns. 
llvm-svn: 28790
 2006-06-15 00:16:37 +00:00
Evan Cheng
fe72285033 Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore. 
llvm-svn: 28376
 2006-05-18 00:08:46 +00:00
Evan Cheng
318a68e1ee Typo 
llvm-svn: 28366
 2006-05-17 20:55:51 +00:00
Evan Cheng
f5ef47fe74 Remove PointerType from target definition. Use abstract type MVT::iPTR to 
represent pointer type.

llvm-svn: 28363
 2006-05-17 20:37:59 +00:00
Evan Cheng
d985d66781 Allow patterns to refer to physical registers that belong to multiple 
register classes.

llvm-svn: 28323
 2006-05-16 07:05:30 +00:00
Chris Lattner
989b16e488 Fix a typo: Instr* -> Intr* 
llvm-svn: 27568
 2006-04-10 22:02:59 +00:00
Chris Lattner
8a2ae8b766 Only compute intrinsic valuetypes when in a target .td file. 
llvm-svn: 27197
 2006-03-28 00:15:00 +00:00
Chris Lattner
ac2512a261 revert this, it breaks things. 
llvm-svn: 27196
 2006-03-28 00:03:08 +00:00
Chris Lattner
c92f688ef3 Add support for decoding iPTR to the right pointer type. 
llvm-svn: 27188
 2006-03-27 22:48:18 +00:00
Chris Lattner
bbba823706 Make sure to initialize the TheDef field! 
llvm-svn: 27078
 2006-03-24 20:25:01 +00:00
Chris Lattner
2c58141fd9 Move CodeGenIntrinsic implementation to CodeGenTarget.cpp with the rest of 
the CodeGen* implementations.

Parse the MVT::ValueType for each operand of the intrinsics.

llvm-svn: 27075
 2006-03-24 19:49:31 +00:00
Evan Cheng
f9d75843f3 getEnumName() missed v8i8, v4i16, and v2i32 types 
llvm-svn: 26869
 2006-03-19 07:57:34 +00:00
Evan Cheng
53a2d60bca New vector type v2f32. 
llvm-svn: 26437
 2006-03-01 01:10:52 +00:00
Evan Cheng
43070b7541 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit 
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).

llvm-svn: 26294
 2006-02-20 22:34:53 +00:00
Chris Lattner
543fe4b6aa PHI and INLINEASM are now builtin instructions provided by Target.td 
llvm-svn: 25673
 2006-01-27 01:45:06 +00:00
Evan Cheng
4b0623e141 * Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and 
SNDPOutFlag to DAG nodes. These properties do not belong to target specific
instructions.
* Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's
optional. Used by ret / call, etc.

llvm-svn: 25154
 2006-01-09 18:27:06 +00:00
Evan Cheng
14c53b45f5 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Evan Cheng
72aaf8e374 * Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG 
support which is fragile.
* Fixed a number of bugs.

llvm-svn: 24996
 2005-12-23 22:11:47 +00:00
Evan Cheng
e22f9181f7 Support for read / write from explicit registers with FlagVT type. 
llvm-svn: 24753
 2005-12-17 01:19:28 +00:00
Evan Cheng
c9a620060b * Added an explicit type field to ComplexPattern. 
* Renamed MatchingNodes to RootNodes.

llvm-svn: 24636
 2005-12-08 02:14:08 +00:00
Evan Cheng
9b9567bfb5 Added support for ComplexPattern. These are patterns that require C++ pattern 
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.

llvm-svn: 24634
 2005-12-08 02:00:36 +00:00
Evan Cheng
f02bb9af8b * Commit the fix (by Chris) for a tblgen type inferencing bug. 
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.

llvm-svn: 24587
 2005-12-04 08:18:16 +00:00
Nate Begeman
006bb04f3a Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Nate Begeman
faad542d24 Nuke CodeGenInstruction's ValueType member, it is no longer used. 
llvm-svn: 24556
 2005-12-01 00:12:04 +00:00
Nate Begeman
4d0251ad55 Add the new vector types to tablegen 
llvm-svn: 24514
 2005-11-29 06:19:38 +00:00
Chris Lattner
f2807be3da Initialize this variable on all paths, fixing a crasher in windows. Thanks 
to JeffC for pointing this out.

llvm-svn: 24426
 2005-11-19 07:48:33 +00:00
Chris Lattner
6bc0304c91 Teach tblgen about instruction operands that have multiple MachineInstr 
operands, digging into them to find register values (used on X86).  Patch
by Evan Cheng!

llvm-svn: 24424
 2005-11-19 07:05:57 +00:00
Chris Lattner
7ad0bed89f Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately 
reflect what it is.
Convert some more code over to use it.

llvm-svn: 24072
 2005-10-28 22:49:02 +00:00
Chris Lattner
90c5b9c83c Do not let getLegalValueTypes return a list with duplicates in it 
llvm-svn: 23723
 2005-10-14 03:54:49 +00:00