181 Commits

Author SHA1 Message Date
Bob Wilson
298cdac99c Run the pre-register allocation tail duplication pass by default. Remove
the -pre-regalloc-taildup command-line option, and add a new
-disable-early-taildup option.

llvm-svn: 93597
2010-01-16 00:29:50 +00:00
Nate Begeman
d232150b83 Hook up llc's -filetype=obj to use MCStreamer if an MCCodeEmitter is available.
Remove most of old Mach-O Writer support, it has been replaced by MCMachOStreamer

Further refactoring to completely remove MachOWriter and drive the object file
writer with the AsmPrinter MCInst/MCSection logic is forthcoming.

llvm-svn: 93527
2010-01-15 18:51:18 +00:00
Jim Grosbach
9ae81816bc Add comment explaining the necessity of r93456
llvm-svn: 93459
2010-01-14 21:38:31 +00:00
Jim Grosbach
0868567fc3 Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
catch info can get misplaced when a selector ends up more than one block
removed from the parent invoke(s). This could happen when a landing pad is
shared by multiple invokes and is also a target of a normal edge from
elsewhere.

llvm-svn: 93456
2010-01-14 21:22:16 +00:00
Evan Cheng
b5499d09d1 Re-enable extension optimization pass.
llvm-svn: 93313
2010-01-13 08:45:40 +00:00
Evan Cheng
d7d8f6d000 Disable opt-ext pass to unbreak the build for now.
llvm-svn: 93286
2010-01-13 01:51:43 +00:00
Evan Cheng
7a4bac3000 Remove debug option I accidentally left in.
llvm-svn: 93285
2010-01-13 01:43:20 +00:00
Evan Cheng
30bebff456 Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.

llvm-svn: 93278
2010-01-13 00:30:23 +00:00
Jakob Stoklund Olesen
29c7234eb7 Allow double defs after tail duplication.
llvm-svn: 92874
2010-01-06 23:52:46 +00:00
David Greene
ca15eaccbb Change errs() to dbgs().
llvm-svn: 92524
2010-01-04 22:33:16 +00:00
Eric Christopher
a91c0f48e6 Fix setting and default setting of code model for jit. Do this
by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.

Should fix PR 5773.

llvm-svn: 91824
2009-12-21 08:15:29 +00:00
Evan Cheng
ece104a0e1 Remove debugging code.
llvm-svn: 91604
2009-12-17 18:03:12 +00:00
Evan Cheng
090ac0865a Revert 91280-91283, 91286-91289, 91291, 91293, 91295-91296. It apparently introduced a non-deterministic behavior in the optimizer somewhere.
llvm-svn: 91598
2009-12-17 09:39:49 +00:00
Evan Cheng
6154dbd5ee Add a pre-regalloc tail duplication pass.
llvm-svn: 90567
2009-12-04 09:42:45 +00:00
Bob Wilson
9594db5693 Rename new TailDuplicationPass to avoid name conflict with the old one.
llvm-svn: 89968
2009-11-26 21:38:41 +00:00
Bob Wilson
2d4ff12da9 Split tail duplication into a separate pass. This is needed to avoid
running tail duplication when doing branch folding for if-conversion, and
we also want to be able to run tail duplication earlier to fix some
reg alloc problems.  Move the CanFallThrough function from BranchFolding
to MachineBasicBlock so that it can be shared by TailDuplication.

llvm-svn: 89904
2009-11-26 00:32:21 +00:00
Devang Patel
21c2e100ba Remove DebugLabelFolder pass. It is not used by dwarf writer anymore.
llvm-svn: 89790
2009-11-24 19:37:07 +00:00
Dan Gohman
f4fe57ad90 Add an experimental option to run gep-splitting and no-load GVN
just before codegen.

llvm-svn: 89439
2009-11-20 02:03:44 +00:00
Evan Cheng
66549b2818 Now that code placement optimization pass is run for JIT, make sure it's before pre-emit passes.
llvm-svn: 86092
2009-11-05 01:16:59 +00:00
Eric Christopher
9196f0c0e8 Add some options to disable various code gen optimizations.
llvm-svn: 86044
2009-11-04 19:57:50 +00:00
Dan Gohman
18dc1c5c9e Factor out more code into addCommonCodeGenPasses. The JIT wasn't
previously running CodePlacementOpt. Also print headers before
each dump in -print-machineinstrs mode, so that it's clear which
dump is which.

llvm-svn: 85681
2009-10-31 20:17:39 +00:00
Dan Gohman
fb7f0e57b6 Remove CodeGenLICM. It's largely obsoleted by MachineLICM's new ability
to unfold loop-invariant loads.

llvm-svn: 85657
2009-10-31 14:35:41 +00:00
Bill Wendling
3505c94923 Don't put in these EH changes.
llvm-svn: 85460
2009-10-29 00:37:35 +00:00
Bill Wendling
a8eceedb82 Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.
--- Reverse-merging r85338 into '.':
U    lib/CodeGen/SimpleRegisterCoalescing.cpp
U    lib/CodeGen/SimpleRegisterCoalescing.h

llvm-svn: 85454
2009-10-29 00:22:16 +00:00
Bob Wilson
97b9312663 Revert r85346 change to control tail merging by CodeGenOpt::Level.
I'm going to redo this using the OptimizeForSize function attribute.

llvm-svn: 85426
2009-10-28 20:46:46 +00:00
Bob Wilson
9693f9d465 Record CodeGen optimization level in the BranchFolding pass so that we can
use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

llvm-svn: 85346
2009-10-27 23:49:38 +00:00
Evan Cheng
007ceb4603 Change createPostRAScheduler so it can be turned off at llc -O1.
llvm-svn: 84273
2009-10-16 21:06:15 +00:00
Evan Cheng
f305ead1cc Add a target hook to add pre- post-regalloc scheduling passes.
llvm-svn: 83144
2009-09-30 08:49:50 +00:00
David Goodwin
17199b56b0 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.
llvm-svn: 83122
2009-09-30 00:10:16 +00:00
Evan Cheng
3872b3c13e Flip -disable-post-RA-scheduler to -post-RA-scheduler.
llvm-svn: 82803
2009-09-25 21:38:11 +00:00
Dan Gohman
0f64d71d99 Add a new pass for doing late hoisting of floating-point and vector
constants out of loops. These aren't covered by the regular LICM
pass, because in LLVM IR constants don't require separate
instructions. They're not always covered by the MachineLICM pass
either, because it doesn't know how to unfold folded constant-pool
loads. This is somewhat experimental at this point, and off by
default.

llvm-svn: 82076
2009-09-16 20:25:11 +00:00
Dan Gohman
b4720905ff -fast is now -O0. -fast-isel is no longer experimental.
llvm-svn: 80104
2009-08-26 15:57:57 +00:00
Chris Lattner
565449d79e remove std::ostream versions of printing stuff for MBB and MF,
upgrading a few things to use raw_ostream

llvm-svn: 79811
2009-08-23 03:13:20 +00:00
Chris Lattner
7b26fce23e Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
llvm-svn: 79763
2009-08-22 20:48:53 +00:00
Jim Grosbach
486be66dbd Move the sjlj exception handling conversions to a back-end pass where they
more properly belong. This allows removing the front-end conditionalized
SJLJ code, and cleans up the generated IR considerably. All of the
infrastructure code (calling _Unwind_SjLj_Register/Unregister, etc) is
added by the SjLjEHPrepare pass.

llvm-svn: 79250
2009-08-17 16:41:22 +00:00
Jakob Stoklund Olesen
766352fbd2 Allow double defs in the machine code verifier after the addPreRegAlloc passes.
llvm-svn: 79095
2009-08-15 13:10:15 +00:00
Daniel Dunbar
9abdc6cc3c TargetRegistry: Change AsmPrinter constructor to be typed as returning an
AsmPrinter instance (instead of just a FunctionPass)

llvm-svn: 78962
2009-08-13 23:48:47 +00:00
Daniel Dunbar
95f58463e5 TargetRegistry: Reorganize AsmPrinter construction so that clients pass in the
TargetAsmInfo. This eliminates a dependency on TargetMachine.h from
TargetRegistry.h, which technically was a layering violation.
 - Clients probably can only sensibly pass in the same TargetAsmInfo as the
   TargetMachine has, but there are only limited clients of this API.

llvm-svn: 78928
2009-08-13 19:38:51 +00:00
Chris Lattner
9a6cf91261 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
2009-08-12 07:22:17 +00:00
Dan Gohman
7c50c9bd63 Tidy #includes.
llvm-svn: 78677
2009-08-11 16:02:12 +00:00
Jim Grosbach
693e36a3e8 SjLj based exception handling unwinding support. This patch is nasty, brutish
and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.

llvm-svn: 78625
2009-08-11 00:09:57 +00:00
Evan Cheng
ea2b82b8fc Disable stack coloring with register for now. It's not able to set kill markers.
llvm-svn: 78179
2009-08-05 07:26:17 +00:00
Dan Gohman
5ea74d55ce Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.

llvm-svn: 77691
2009-07-31 18:16:33 +00:00
Daniel Dunbar
5434756585 Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
failures when building assorted projects with clang.

--- Reverse-merging r77654 into '.':
U    include/llvm/CodeGen/Passes.h
U    include/llvm/CodeGen/MachineFunctionPass.h
U    include/llvm/CodeGen/MachineFunction.h
U    include/llvm/CodeGen/LazyLiveness.h
U    include/llvm/CodeGen/SelectionDAGISel.h
D    include/llvm/CodeGen/MachineFunctionAnalysis.h
U    include/llvm/Function.h
U    lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U    lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/MachineVerifier.cpp
U    lib/CodeGen/MachineFunction.cpp
U    lib/CodeGen/PrologEpilogInserter.cpp
U    lib/CodeGen/MachineLoopInfo.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D    lib/CodeGen/MachineFunctionAnalysis.cpp
D    lib/CodeGen/MachineFunctionPass.cpp
U    lib/CodeGen/LiveVariables.cpp

llvm-svn: 77661
2009-07-31 03:02:41 +00:00
Dan Gohman
bcb44baa57 Manage MachineFunctions with an analysis Pass instead of the Annotable
mechanism. To support this, make MachineFunctionPass a little more
complete.

llvm-svn: 77654
2009-07-31 01:52:50 +00:00
Daniel Dunbar
06941b3f7c We don't need to use llvm_report_error, this interface can deal with errors
(although we don't get a very good error message).

llvm-svn: 75864
2009-07-15 23:54:01 +00:00
Daniel Dunbar
f060b4d977 Add missing includes.
llvm-svn: 75862
2009-07-15 23:48:37 +00:00
Daniel Dunbar
d97db682a3 Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.

llvm-svn: 75859
2009-07-15 23:34:19 +00:00
Daniel Dunbar
c901392ba4 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.

llvm-svn: 75848
2009-07-15 22:33:19 +00:00
David Greene
a31f96cf2b Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.

llvm-svn: 75670
2009-07-14 20:18:05 +00:00