187 Commits

Author SHA1 Message Date
Chris Lattner
ef8901722e add an assert so that PR2356 explodes instead of running off an
array.  Improve some minor comments, refactor some helpers in
AsmOperandInfo.  No functionality change for valid code.

llvm-svn: 57686
2008-10-17 16:21:11 +00:00
Evan Cheng
3b0f5e4d61 - Add target lowering hooks that specify which setcc conditions are illegal,
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.

llvm-svn: 57542
2008-10-15 02:05:31 +00:00
Evan Cheng
07d53b1d33 Rename LoadX to LoadExt.
llvm-svn: 57526
2008-10-14 21:26:46 +00:00
Matthijs Kooijman
43686a6665 * Make TargetLowering not crash when TargetMachine::getTargetAsmInfo() returns
null. This assumes that any target that does not have AsmInfo, does not
   support "LocAndDot".

llvm-svn: 57438
2008-10-13 12:41:46 +00:00
Dan Gohman
6e0548336a Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.

llvm-svn: 56700
2008-09-26 21:54:37 +00:00
Evan Cheng
e0add20c1b Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
llvm-svn: 56526
2008-09-24 00:05:32 +00:00
Dale Johannesen
7a74e71489 Make log, log2, log10, exp, exp2 use Expand by
default.

llvm-svn: 56471
2008-09-22 21:57:32 +00:00
Dan Gohman
effb894453 Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
2008-09-12 16:56:44 +00:00
Dale Johannesen
da2d80688b Add intrinsics for log, log2, log10, exp, exp2.
No functional change (and no FE change to generate them).

llvm-svn: 55753
2008-09-04 00:47:13 +00:00
Gabor Greif
f304a7aa4d erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
llvm-svn: 55504
2008-08-28 21:40:38 +00:00
Dan Gohman
2af34bd309 Add libcalls for the new rounding opcodes.
llvm-svn: 55133
2008-08-21 18:38:14 +00:00
Bruno Cardoso Lopes
de5161fdf2 Add the remaining fp_round libcalls:
FPROUND_F80_F32, FPROUND_PPCF128_F32, 
FPROUND_F80_F64, FPROUND_PPCF128_F64

Support for soften float fp_round operands is added, Mips 
needs this to round f64->f32.

Also added support to soften float FABS result, Mips doesn't 
support double fabs results while in 'single float only' mode.

llvm-svn: 54484
2008-08-07 19:01:24 +00:00
Dan Gohman
2ce6f2ad5e Rename SDOperand to SDValue.
llvm-svn: 54128
2008-07-27 21:46:04 +00:00
Duncan Sands
77a3d05f1e Factorize some code for determining which libcall to use.
llvm-svn: 53713
2008-07-17 02:36:29 +00:00
Duncan Sands
3e7d0fa3ca It is pointless to turn a UINT_TO_FP into an
SINT_TO_FP libcall plus additional operations:
it might as well be a direct UINT_TO_FP libcall.
So only turn it into an SINT_TO_FP if the target
has special handling for SINT_TO_FP.

llvm-svn: 53461
2008-07-11 17:00:14 +00:00
Duncan Sands
37b7322b35 Add two missing SINT_TO_FP libcalls.
llvm-svn: 53460
2008-07-11 16:57:02 +00:00
Duncan Sands
927a3648d5 Add support for 128 bit shifts and 32 bit shifts
on 16 bit machines.

llvm-svn: 53458
2008-07-11 16:52:29 +00:00
Duncan Sands
abdcac66dc Add support for 128 bit multiplicative operations.
Lack of these caused a bootstrap failure with Fortran
on x86-64 with LegalizeTypes turned on.  While there,
be nice to 16 bit machines and support expansion of
i32 too.

llvm-svn: 53408
2008-07-10 15:35:05 +00:00
Duncan Sands
5e6d1402c2 Add a mysteriously missing libcall, FPTOSINT_F80_I32.
Be nice to 16 bit machines by supporting FP_TO_XINT
expansion for these.

llvm-svn: 53407
2008-07-10 15:33:02 +00:00
Duncan Sands
33ff5c8d0d Add support for expanding PPC 128 bit floats.
For this it is convenient to permit floats to
be used with EXTRACT_ELEMENT, so I tweaked
things to allow that.  I also added libcalls
for ppcf128 to i32 forms of FP_TO_XINT, since
they exist in libgcc and this case can certainly
occur (and does occur in the testsuite) - before
the i64 libcall was being used.  Also, the
XINT_TO_FP result seemed to be wrong when
the argument is an i128: the wrong fudge
factor was added (the i32 and i64 cases were
handled directly, but the i128 code fell
through to some generic softening code which
seemed to think it was i64 to f32!).  So I
fixed it by adding a fudge factor that I
found in my breakfast cereal.

llvm-svn: 52739
2008-06-25 20:24:48 +00:00
Dan Gohman
e38cc01244 Teach isGAPlusOffset to respect a GlobalAddressSDNode's offset
value, which is something that apparently isn't used much.

llvm-svn: 52158
2008-06-09 22:05:52 +00:00
Duncan Sands
67d0f332d5 Various tweaks related to apint codegen. No functionality
change for non-funky-sized integers.

llvm-svn: 52151
2008-06-09 15:48:25 +00:00
Duncan Sands
11dd424539 Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits.  Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.

llvm-svn: 52098
2008-06-08 20:54:56 +00:00
Duncan Sands
13237ac3b9 Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044
2008-06-06 12:08:01 +00:00
Evan Cheng
b980f6fb3d Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
llvm-svn: 51008
2008-05-12 23:04:07 +00:00
Evan Cheng
2609d5e779 Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.
llvm-svn: 50991
2008-05-12 19:56:52 +00:00
Dan Gohman
38dc08f36f Instead of enumerating each opcode that isn't handled that
ComputeMaskedBits handles, just use a 'default:'. This avoids
TargetLowering's list getting out of date with SelectionDAG's.

llvm-svn: 50693
2008-05-06 00:53:29 +00:00
Mon P Wang
3e58393c3d Added addition atomic instrinsics and, or, xor, min, and max.
llvm-svn: 50663
2008-05-05 19:05:59 +00:00
Chris Lattner
58b9ece38d typo
llvm-svn: 50316
2008-04-27 01:49:46 +00:00
Chris Lattner
2237973438 Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible.  This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:

void test () {
  asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}

Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.

Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??

Incidentally, this was the todo in 
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll

Please do NOT pull this into Tak.

llvm-svn: 50315
2008-04-27 00:37:18 +00:00
Chris Lattner
4793515a9c Move a bunch of inline asm code out of line.
llvm-svn: 50313
2008-04-27 00:09:47 +00:00
Chris Lattner
724539c001 A few inline asm cleanups:
- Make targetlowering.h fit in 80 cols.
  - Make LowerAsmOperandForConstraint const.
  - Make lowerXConstraint -> LowerXConstraint
  - Make LowerXConstraint return a const char* instead of taking a string byref.

llvm-svn: 50312
2008-04-26 23:02:14 +00:00
Dan Gohman
544ab2c50b Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.

llvm-svn: 49572
2008-04-12 04:36:06 +00:00
Torok Edwin
613d7afe64 Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.

llvm-svn: 49280
2008-04-06 21:23:02 +00:00
Dan Gohman
b72127ac4c More APInt-ification.
llvm-svn: 48344
2008-03-13 22:13:53 +00:00
Dan Gohman
44b4c07cd1 Use the correct value for InSignBit.
llvm-svn: 48245
2008-03-11 21:29:43 +00:00
Dan Gohman
f4300950f1 Implement more support for fp-to-i128 and i128-to-fp conversions.
llvm-svn: 48189
2008-03-10 23:03:31 +00:00
Evan Cheng
ae2c56d93e Default ISD::PREFETCH to expand.
llvm-svn: 48169
2008-03-10 19:38:10 +00:00
Scott Michel
a6729e8666 Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145
2008-03-10 15:42:14 +00:00
Dan Gohman
d9d874b0cd Codegen support for i128 SINT_TO_FP.
llvm-svn: 47928
2008-03-05 01:08:17 +00:00
Dan Gohman
0e238dc813 Yet more APInt-ification.
llvm-svn: 47867
2008-03-03 22:37:52 +00:00
Dan Gohman
2fa65b7997 More APInt-ification.
llvm-svn: 47866
2008-03-03 22:22:56 +00:00
Dale Johannesen
cbde4c2206 Interface of getByValTypeAlignment differed between
generic & x86 versions; change generic to follow x86
and improve comments.  Add PPC version (not right
for non-Darwin.)

llvm-svn: 47734
2008-02-28 22:31:51 +00:00
Evan Cheng
c799065cc3 Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
Dan Gohman
ae2b6fbb8e Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.
Change several cases in SimplifyDemandedMask that don't ever do any
simplifying to reuse the logic in ComputeMaskedBits instead of
duplicating it.

llvm-svn: 47648
2008-02-27 00:25:32 +00:00
Bill Wendling
c24ea4fb41 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!

llvm-svn: 47625
2008-02-26 21:11:01 +00:00
Evan Cheng
ccc0c996a4 Refactor inline asm constraint matching code out of SDIsel into TargetLowering.
llvm-svn: 47587
2008-02-26 02:33:44 +00:00
Dan Gohman
1f372edd97 Convert MaskedValueIsZero and all its users to use APInt. Also add
a SignBitIsZero function to simplify a common use case.

llvm-svn: 47561
2008-02-25 21:11:39 +00:00
Duncan Sands
4c95dbd69f In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned".  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.

llvm-svn: 47122
2008-02-14 17:28:50 +00:00
Nate Begeman
53e1b3f9d5 Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
   if it is legal.

This allows ConstantFP to be handled like Constant, allowing for 
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants!  Hooray.

llvm-svn: 47121
2008-02-14 08:57:00 +00:00