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1631 Commits

Author SHA1 Message Date
Chris Lattner
d7e3b6c442 Significant refactoring of the inline asm stuff, to support future changes. 
No functionality change.

llvm-svn: 36544
 2007-04-28 20:49:53 +00:00
Chris Lattner
1deacd61f4 memory inputs to an inline asm are required to have an address available. 
If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.

This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll

llvm-svn: 36536
 2007-04-28 06:42:38 +00:00
Chris Lattner
d102ed0ac6 Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll and 
CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll

llvm-svn: 36534
 2007-04-28 06:08:13 +00:00
Chris Lattner
4df3e8093b Fix this to match change to InlineAsm class. 
llvm-svn: 36524
 2007-04-28 04:05:59 +00:00
Chris Lattner
1cbe208cda Fix incorrect legalization of EHSELECTOR. This fixes 
CodeGen/Generic/2007-04-14-EHSelectorCrash.ll and PR1326

llvm-svn: 36510
 2007-04-27 17:12:52 +00:00
Evan Cheng
bf535fc8bd Expand UINT_TO_FP in turns of SINT_TO_FP when UINTTOFP_* libcalls are not available. 
llvm-svn: 36501
 2007-04-27 07:33:31 +00:00
Chris Lattner
784fe9dbbb improve EH global handling, patch by Duncan Sands. 
llvm-svn: 36499
 2007-04-27 01:20:11 +00:00
Chris Lattner
8131ab7c0f enable Anton's shift/and switch lowering stuff! It now passes ppc bootstrap 
successfully! woohoo...

llvm-svn: 36496
 2007-04-26 21:09:43 +00:00
Anton Korobeynikov
d7ae7f1659 Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32 
llvm-svn: 36490
 2007-04-26 20:44:04 +00:00
Dan Gohman
e131e3ac02 Fix a typo in a comment. 
llvm-svn: 36485
 2007-04-26 19:40:56 +00:00
Evan Cheng
15f269afa3 This was lefted out. Fixed sumarray-dbl. 
llvm-svn: 36445
 2007-04-25 18:33:21 +00:00
Chris Lattner
cb0ed0cfbd allow support for 64-bit stack objects 
llvm-svn: 36420
 2007-04-25 04:08:28 +00:00
Chris Lattner
01a26c74ae Be more careful about folding op(x, undef) when we have vector operands. 
This fixes CodeGen/X86/2007-04-24-VectorCrash.ll

llvm-svn: 36413
 2007-04-25 00:00:45 +00:00
Bill Wendling
47917b697f Assertion when using a 1-element vector for an add operation. Get the 
real vector type in this case.

llvm-svn: 36402
 2007-04-24 21:13:23 +00:00
Scott Michel
4cfa616cee Use '-1U' where '-1UL' is obvious overkill, eliminating gcc warnings about 
tests always being true in the process.

llvm-svn: 36387
 2007-04-24 01:24:20 +00:00
Christopher Lamb
8af6d5896f PR400 phase 2. Propagate attributed load/store information through DAGs. 
llvm-svn: 36356
 2007-04-22 23:15:30 +00:00
Lauro Ramos Venancio
4e91908f17 X86 TLS: Implement review feedback. 
llvm-svn: 36318
 2007-04-21 20:56:26 +00:00
Reid Spencer
0c1349e6bc Revert Christopher Lamb's load/store alignment changes. 
llvm-svn: 36309
 2007-04-21 18:36:27 +00:00
Christopher Lamb
bff50208c8 add support for alignment attributes on load/store instructions 
llvm-svn: 36301
 2007-04-21 08:16:25 +00:00
Lauro Ramos Venancio
94314be0e0 Allow the lowering of ISD::GLOBAL_OFFSET_TABLE. 
llvm-svn: 36290
 2007-04-20 23:02:39 +00:00
Lauro Ramos Venancio
2518889872 Implement "general dynamic", "initial exec" and "local exec" TLS models for 
X86 32 bits.

llvm-svn: 36283
 2007-04-20 21:38:10 +00:00
Chris Lattner
f03c90bee6 allow SRL to simplify its operands, as it doesn't demand all bits as input. 
llvm-svn: 36245
 2007-04-18 03:06:49 +00:00
Chris Lattner
bf14f20632 When replacing a node in SimplifyDemandedBits, if the old node used any 
single-use nodes, they will be dead soon.  Make sure to remove them before
processing other nodes.  This implements CodeGen/X86/shl_elim.ll

llvm-svn: 36244
 2007-04-18 03:05:22 +00:00
Chris Lattner
15c1b820cc fix a pasto 
llvm-svn: 36242
 2007-04-18 03:01:40 +00:00
Chris Lattner
4aff52bf3d Fix a bug in my previous patch, grabbing the shift amount width from the 
wrong operand.

llvm-svn: 36223
 2007-04-17 22:53:02 +00:00
Chris Lattner
9a861a8550 Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. 
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        srwi r2, r3, 1
        extsh r3, r2
        blr

on PPC, instead of:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

GCC produces:
_baz:
        srwi r10,r4,24
        insrwi r10,r3,24,0
        srawi r9,r3,24
        srawi r3,r10,9
        extsh r3,r3
        blr

This implements CodeGen/PowerPC/shl_elim.ll

llvm-svn: 36221
 2007-04-17 21:14:16 +00:00
Chris Lattner
9ad5915559 SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits 
a chance to hack on it.  This compiles:

int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

instead of:

_baz:
        srwi r2, r4, 24
        rlwimi r2, r3, 8, 0, 23
        srwi r2, r2, 9
        extsh r3, r2
        blr

This implements CodeGen/PowerPC/sign_ext_inreg1.ll

llvm-svn: 36212
 2007-04-17 19:03:21 +00:00
Anton Korobeynikov
fb80151c42 Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Chris Lattner
6bd7b7b30b disable switch lowering using shift/and. It still breaks ppc bootstrap for 
some reason.  :(  Will investigate.

llvm-svn: 36011
 2007-04-14 19:39:41 +00:00
Anton Korobeynikov
8a1a84f96e Fix PR1325: Case range optimization was performed in the case it 
shouldn't. Also fix some "latent" bug on 64-bit platforms

llvm-svn: 35990
 2007-04-14 13:25:55 +00:00
Chris Lattner
7196f09edc disable shift/and lowering to work around PR1325 for now. 
llvm-svn: 35985
 2007-04-14 02:26:56 +00:00
Anton Korobeynikov
e288040abf Fix PR1323 : we haven't updated phi nodes in good manner :) 
llvm-svn: 35963
 2007-04-13 06:53:51 +00:00
Chris Lattner
5111499136 the result of an inline asm copy can be an arbitrary VT that the register 
class supports.  In the case of vectors, this means we often get the wrong
type (e.g. we get v4f32 instead of v8i16).  Make sure to convert the vector
result to the right type.  This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll

llvm-svn: 35944
 2007-04-12 06:00:20 +00:00
Chris Lattner
a77cb3ce68 fold noop vbitconvert instructions 
llvm-svn: 35943
 2007-04-12 05:58:43 +00:00
Chris Lattner
784a68a702 Fix weirdness handling single element vectors. 
llvm-svn: 35941
 2007-04-12 04:44:28 +00:00
Reid Spencer
c6251a7dfd For PR1284: 
Implement the "part_set" intrinsic.

llvm-svn: 35938
 2007-04-12 02:48:46 +00:00
Chris Lattner
18e4ac4107 fix an infinite loop compiling ldecod, notice by JeffC. 
llvm-svn: 35910
 2007-04-11 16:51:53 +00:00
Chris Lattner
a083ffcad7 Fix this harder. 
llvm-svn: 35888
 2007-04-11 06:50:51 +00:00
Chris Lattner
c5f85d3738 don't create shifts by zero, fix some problems with my previous patch 
llvm-svn: 35887
 2007-04-11 06:43:25 +00:00
Chris Lattner
65786b078c Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often 
allows other simplifications.  For example, this compiles:
int isnegative(unsigned int X) {
   return !(X < 2147483648U);
}

Into this code:

x86:
        movl 4(%esp), %eax
        shrl $31, %eax
        ret
arm:
        mov r0, r0, lsr #31
        bx lr
thumb:
        lsr r0, r0, #31
        bx lr

instead of:

x86:
        cmpl $0, 4(%esp)
        sets %al
        movzbl %al, %eax
        ret

arm:
        mov r3, #0
        cmp r0, #0
        movlt r3, #1
        mov r0, r3
        bx lr

thumb:
        mov r2, #1
        mov r1, #0
        cmp r0, #0
        blt LBB1_2      @entry
LBB1_1: @entry
        cpy r2, r1
LBB1_2: @entry
        cpy r0, r2
        bx lr

Testcase here: test/CodeGen/Generic/ispositive.ll

llvm-svn: 35883
 2007-04-11 05:32:27 +00:00
Chris Lattner
41189c63cc Codegen integer abs more efficiently using the trick from the PPC CWG. This 
improves codegen on many architectures.  Tests committed as CodeGen/*/iabs.ll

X86 Old:			X86 New:
_test:				_test:
   movl 4(%esp), %ecx		   movl 4(%esp), %eax
   movl %ecx, %eax		   movl %eax, %ecx
   negl %eax			   sarl $31, %ecx
   testl %ecx, %ecx		   addl %ecx, %eax
   cmovns %ecx, %eax		   xorl %ecx, %eax
   ret				   ret

PPC Old:			PPC New:
_test:				_test:
   cmpwi cr0, r3, -1		   srawi r2, r3, 31
   neg r2, r3			   add r3, r3, r2
   bgt cr0, LBB1_2 ;		   xor r3, r3, r2
LBB1_1: ;			   blr
   mr r3, r2
LBB1_2: ;
   blr

ARM Old:			ARM New:
_test:				_test:
   rsb r3, r0, #0		   add r3, r0, r0, asr #31
   cmp r0, #0			   eor r0, r3, r0, asr #31
   movge r3, r0			   bx lr
   mov r0, r3
   bx lr

Thumb Old:			Thumb New:
_test:				_test:
   neg r2, r0			   asr r2, r0, #31
   cmp r0, #0			   add r0, r0, r2
   bge LBB1_2			   eor r0, r2
LBB1_1: @			   bx lr
   cpy r0, r2
LBB1_2: @
   bx lr


Sparc Old:			Sparc New:
test:				test:
   save -96, %o6, %o6		   save -96, %o6, %o6
   sethi 0, %l0			   sra %i0, 31, %l0
   sub %l0, %i0, %l0		   add %i0, %l0, %l1
   subcc %i0, -1, %l1		   xor %l1, %l0, %i0
   bg .BB1_2			   restore %g0, %g0, %g0
   nop				   retl
.BB1_1:				   nop
   or %g0, %l0, %i0
.BB1_2:
   restore %g0, %g0, %g0
   retl
   nop

It also helps alpha/ia64 :)

llvm-svn: 35881
 2007-04-11 05:11:38 +00:00
Reid Spencer
a472f66dd0 For PR1146: 
Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.

llvm-svn: 35877
 2007-04-11 02:44:20 +00:00
Chris Lattner
f269d84ca0 apparently some people commit without building the tree, or they forget to 
commit a LOT of files.

llvm-svn: 35858
 2007-04-10 03:20:39 +00:00
Jeff Cohen
e0bbbd3774 No longer needed. 
llvm-svn: 35850
 2007-04-09 23:42:32 +00:00
Chris Lattner
35f0417ec1 remove dead target hooks. 
llvm-svn: 35847
 2007-04-09 23:34:08 +00:00
Chris Lattner
39f65335d5 remove some dead target hooks, subsumed by isLegalAddressingMode 
llvm-svn: 35840
 2007-04-09 22:27:04 +00:00
Anton Korobeynikov
da964a2852 Use integer log for metric calculation 
llvm-svn: 35834
 2007-04-09 21:57:03 +00:00
Jeff Cohen
0475f3b4e9 Unbreak VC++ build. 
llvm-svn: 35817
 2007-04-09 14:32:59 +00:00
Anton Korobeynikov
506eaf7915 Next stage into switch lowering refactoring 
1. Fix some bugs in the jump table lowering threshold
2. Implement much better metric for optimal pivot selection
3. Tune thresholds for different lowering methods
4. Implement shift-and trick for lowering small (<machine word
length) cases with few destinations. Good testcase will follow.

llvm-svn: 35816
 2007-04-09 12:31:58 +00:00
Reid Spencer
71b79e3d99 For PR1146: 
Adapt handling of parameter attributes to use the new ParamAttrsList class.

llvm-svn: 35814
 2007-04-09 06:17:21 +00:00