731 Commits

Author SHA1 Message Date
Dan Gohman
dd920bf3f0 Don't forget the newline in debug output.
llvm-svn: 56613
2008-09-25 17:17:27 +00:00
Dan Gohman
32a733e2c7 FastISel support for debug info.
llvm-svn: 56610
2008-09-25 17:05:24 +00:00
Dan Gohman
b8e69f1755 Enable DeadMachineInstructionElim when Fast-ISel is enabled.
llvm-svn: 56604
2008-09-25 01:14:49 +00:00
Dale Johannesen
c36660d756 Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539
2008-09-24 01:07:17 +00:00
Devang Patel
ba3fa6c6e1 s/ParameterAttributes/Attributes/g
llvm-svn: 56513
2008-09-23 23:03:40 +00:00
Dan Gohman
918fe08a56 Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info.

llvm-svn: 56508
2008-09-23 21:53:34 +00:00
Dale Johannesen
f8610ebebc Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
2008-09-17 21:13:11 +00:00
Dan Gohman
050d7835c6 Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
are not enabled. Instead just omit the tail call flag when calls are
created.

llvm-svn: 56235
2008-09-16 01:42:28 +00:00
Dan Gohman
d3fe174c53 Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
2008-09-13 01:54:27 +00:00
Dan Gohman
effb894453 Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
2008-09-12 16:56:44 +00:00
Dan Gohman
39d82f902a Add X86FastISel support for static allocas, and refences
to static allocas. As part of this change, refactor the
address mode code for laods and stores.

llvm-svn: 56066
2008-09-10 20:11:02 +00:00
Dan Gohman
222018da7b Add a break statement that I accidentally deleted when
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.

llvm-svn: 56057
2008-09-10 15:52:34 +00:00
Dan Gohman
b4c0295b8e Change -fast-isel-no-abort to -fast-isel-abort, which now defaults
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.

llvm-svn: 56029
2008-09-09 23:05:00 +00:00
Dan Gohman
91491b51e2 Add a new option, -fast-isel-verbose, that can be used with
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.

llvm-svn: 56021
2008-09-09 22:06:46 +00:00
Dan Gohman
b6aef419b4 Remove the code that protected FastISel from aborting in
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.

llvm-svn: 55977
2008-09-09 02:40:04 +00:00
Dan Gohman
a333f3ccb8 Fix a few I's that were meant to be renamed to BI's.
llvm-svn: 55942
2008-09-08 20:37:59 +00:00
Evan Cheng
24776b554d Avoid redefinition and nnbreak windows build.
llvm-svn: 55911
2008-09-08 16:01:27 +00:00
Dan Gohman
f17a2f3602 Move the code that inserts copies for function livein registers
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.

llvm-svn: 55863
2008-09-05 22:59:21 +00:00
Dan Gohman
a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t.
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Dan Gohman
7bda51f5a4 Create HandlePHINodesInSuccessorBlocksFast, a version of
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.

llvm-svn: 55746
2008-09-03 23:12:08 +00:00
Dan Gohman
575fad337c Split the SelectionDAG-building code, including the FunctionLoweringInfo
and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.

llvm-svn: 55701
2008-09-03 16:12:24 +00:00
Evan Cheng
31ddd09f4a If TargetSelectInstruction returns true, move to next instruction.
llvm-svn: 55692
2008-09-03 06:43:41 +00:00
Dan Gohman
115267fdc6 Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,
even in FastISel mode in the case where FastISel successfully 
selects all the instructions. 

llvm-svn: 55641
2008-09-02 20:17:56 +00:00
Dan Gohman
d58f3e36d0 Add a target callback for FastISel.
llvm-svn: 55512
2008-08-28 23:21:34 +00:00
Gabor Greif
f304a7aa4d erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
llvm-svn: 55504
2008-08-28 21:40:38 +00:00
Dan Gohman
17da671922 Move CaseBlock, JumpTable, and BitTestBlock to be members of
SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.

llvm-svn: 55497
2008-08-28 20:38:18 +00:00
Dan Gohman
360c57f683 Fix a FastISel bug where the instructions from lowering the arguments
were being emitted after the first instructions of the entry block.

llvm-svn: 55496
2008-08-28 20:28:56 +00:00
Rafael Espindola
6c8a99a778 Reduce the size of the Parts vector.
llvm-svn: 55483
2008-08-28 18:29:58 +00:00
Rafael Espindola
029c1c8460 Correctly resize the Parts array.
llvm-svn: 55471
2008-08-28 14:24:45 +00:00
Dale Johannesen
41be0d4445 Split the ATOMIC NodeType's to include the size, e.g.
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.

This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad.  This is the alternative.

llvm-svn: 55457
2008-08-28 02:44:49 +00:00
Dan Gohman
e1a9a780a5 Reorganize the lifetimes of the major objects SelectionDAGISel
works with.

SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.

This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.

This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.

llvm-svn: 55450
2008-08-27 23:52:12 +00:00
Gabor Greif
abfdf928d8 disallow direct access to SDValue::ResNo, provide a getter instead
llvm-svn: 55394
2008-08-26 22:36:50 +00:00
Chris Lattner
54ef9f5831 typo fix.
llvm-svn: 55355
2008-08-26 06:07:47 +00:00
Dan Gohman
48a3623591 Make MBBMap a DenseMap instead of a std::map.
llvm-svn: 55220
2008-08-23 02:44:46 +00:00
Dan Gohman
eb0cee91f6 Move the point at which FastISel taps into the SelectionDAGISel
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.

Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.

To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.

llvm-svn: 55219
2008-08-23 02:25:05 +00:00
Dan Gohman
95d1056831 Avoid creating shift-by-zero SDNodes in the common case of
i8* getelementptr. DAGCombine eliminates these, but this is
a fairly common case.

llvm-svn: 55214
2008-08-23 01:06:51 +00:00
Dan Gohman
2db3f8a095 Reapply r55191 and r55192.
llvm-svn: 55205
2008-08-22 21:28:19 +00:00
Bill Wendling
fc4f64eed0 Reverting r55190, r55191, and r55192. They broke the build with this error message:
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1

llvm-svn: 55200
2008-08-22 20:51:05 +00:00
Dan Gohman
87ff7058e7 Support non-fallthrough unconditional branches in FastISel.
llvm-svn: 55191
2008-08-22 19:21:41 +00:00
Evan Cheng
864fcc198d First cut, un-optimized (and untested) fast isel lowering of GetElementPtrInst.
llvm-svn: 55085
2008-08-20 22:45:34 +00:00
Dan Gohman
02c84b8910 Simplify FastISel's constructor argument list, make the FastISel
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.

llvm-svn: 55076
2008-08-20 21:05:57 +00:00
Dan Gohman
43d1c7c607 Dump the instruction that foiled ISel even when -debug is not used.
llvm-svn: 55075
2008-08-20 20:47:32 +00:00
Evan Cheng
7b9cd58596 Kill off SimpleBBISel, it's replaced by FastISel.
llvm-svn: 55067
2008-08-20 17:50:32 +00:00
Dan Gohman
837c13a029 Disable DAGCombine's alignment inference in "fast" codegen mode.
llvm-svn: 55059
2008-08-20 16:30:28 +00:00
Dan Gohman
f6aa60ff71 Use BitVector instead of std::vector<unsigned char>.
llvm-svn: 55054
2008-08-20 14:58:41 +00:00
Dan Gohman
98265cae87 Fix a leak in the FastISel code that Chris pointed out.
llvm-svn: 55031
2008-08-20 00:56:17 +00:00
Dan Gohman
847ebb90b8 Add support for running SelectionDAG if FastISel fails. This is under
a command-line option, so that the default behavior is an abort, which
is useful for exposing code that isn't supported yet.

llvm-svn: 55028
2008-08-20 00:47:54 +00:00
Dan Gohman
697284fe0a Add code to call FastISel, and a command-line option to enable it.
llvm-svn: 55015
2008-08-19 22:33:34 +00:00
Gordon Henriksen
d930f913e6 Rename some GC classes so that their roll will hopefully be clearer.
In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:

  Collector               -> GCStrategy
  CollectorMetadata       -> GCFunctionInfo
  CollectorModuleMetadata -> GCModuleInfo
  CollectorRegistry       -> GCRegistry
  Function::getCollector  -> getGC (setGC, hasGC, clearGC)

Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.

llvm-svn: 54899
2008-08-17 18:44:35 +00:00
Gordon Henriksen
bcef14d2e4 Factor GC metadata table assembly generation out of Collector in preparation for splitting AsmPrinter into its own library.
llvm-svn: 54881
2008-08-17 12:56:54 +00:00