731 Commits

Author SHA1 Message Date
Chris Lattner
0c56a548ed Don't sink argument loads into loops or other bad places. This disables folding of argument loads with instructions that are not in the entry block.
llvm-svn: 20228
2005-02-17 19:40:32 +00:00
Chris Lattner
ffcb0ae329 Adjust to changes in SelectionDAG interface.
llvm-svn: 19779
2005-01-23 04:36:26 +00:00
Chris Lattner
eccb73d57f Get this to work for 64-bit systems.
llvm-svn: 19763
2005-01-22 23:04:37 +00:00
Chris Lattner
96c26751ec Support targets that do not use i8 shift amounts.
llvm-svn: 19707
2005-01-19 22:31:21 +00:00
Chris Lattner
9f2c4a5200 Teach legalize to promote copy(from|to)reg, instead of making the isel pass
do it.  This results in better code on X86 for floats (because if strict
precision is not required, we can elide some more expensive double -> float
conversions like the old isel did), and allows other targets to emit
CopyFromRegs that are not legal for arguments.

llvm-svn: 19668
2005-01-18 17:54:55 +00:00
Chris Lattner
b07e2d2084 Allow setcc operations to have nonbool types.
llvm-svn: 19656
2005-01-18 02:52:03 +00:00
Chris Lattner
4d9651c760 Non-volatile loads can be freely reordered against each other. This fixes
X86/reg-pressure.ll again, and allows us to do nice things in other cases.
For example, we now codegen this sort of thing:

int %loadload(int *%X, int* %Y) {
  %Z = load int* %Y
  %Y = load int* %X      ;; load between %Z and store
  %Q = add int %Z, 1
  store int %Q, int* %Y
  ret int %Y
}

Into this:

loadload:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%EAX]
        mov %ECX, DWORD PTR [%ESP + 8]
        inc DWORD PTR [%ECX]
        ret

where we weren't able to form the 'inc [mem]' before.  This also lets the
instruction selector emit loads in any order it wants to, which can be good
for register pressure as well.

llvm-svn: 19644
2005-01-17 22:19:26 +00:00
Chris Lattner
4108bb01cf Don't call SelectionDAG.getRoot() directly, go through a forwarding method.
llvm-svn: 19642
2005-01-17 19:43:36 +00:00
Chris Lattner
e3c2cf4854 Implement a target independent optimization to codegen arguments only into
the basic block that uses them if possible.  This is a big win on X86, as it
lets us fold the argument loads into instructions and reduce register pressure
(by not loading all of the arguments in the entry block).

For this (contrived to show the optimization) testcase:

int %argtest(int %A, int %B) {
        %X = sub int 12345, %A
        br label %L
L:
        %Y = add int %X, %B
        ret int %Y
}

we used to produce:

argtest:
        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, 12345
        sub %EAX, %ECX
        mov %EDX, DWORD PTR [%ESP + 8]
.LBBargtest_1:  # L
        add %EAX, %EDX
        ret


now we produce:

argtest:
        mov %EAX, 12345
        sub %EAX, DWORD PTR [%ESP + 4]
.LBBargtest_1:  # L
        add %EAX, DWORD PTR [%ESP + 8]
        ret

This also fixes the FIXME in the code.

BTW, this occurs in real code.  164.gzip shrinks from 8623 to 8608 lines of
.s file.  The stack frame in huft_build shrinks from 1644->1628 bytes,
inflate_codes shrinks from 116->108 bytes, and inflate_block from 2620->2612,
due to fewer spills.

Take that alkis. :-)

llvm-svn: 19639
2005-01-17 17:55:19 +00:00
Chris Lattner
16f64df93a Refactor code into a new method.
llvm-svn: 19635
2005-01-17 17:15:02 +00:00
Chris Lattner
897cd7dc0a add method stub
llvm-svn: 19612
2005-01-16 07:28:41 +00:00
Chris Lattner
209f585033 Add support for promoted registers being live across blocks.
llvm-svn: 19595
2005-01-16 02:23:07 +00:00
Chris Lattner
d58384fca6 Use the new TLI method to get this.
llvm-svn: 19582
2005-01-16 01:11:19 +00:00
Chris Lattner
a8d34fb8c6 Add support for targets that require promotions.
llvm-svn: 19579
2005-01-16 00:37:38 +00:00
Chris Lattner
1001c6e2cd Add new SIGN_EXTEND_INREG, ZERO_EXTEND_INREG, and FP_ROUND_INREG operators.
llvm-svn: 19568
2005-01-15 06:17:04 +00:00
Chris Lattner
3b8e719d1d Adjust to CopyFromReg changes, implement deletion of truncating/extending
stores/loads.

llvm-svn: 19562
2005-01-14 22:38:01 +00:00
Chris Lattner
e727af06c8 Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode.
llvm-svn: 19535
2005-01-13 20:50:02 +00:00
Chris Lattner
2451684678 Don't forget the existing root.
llvm-svn: 19531
2005-01-13 19:53:14 +00:00
Chris Lattner
718b5c2f82 Codegen independent ops as being independent.
llvm-svn: 19528
2005-01-13 17:59:43 +00:00
Chris Lattner
e05a461f1d Add an option to view the selection dags as they are generated.
llvm-svn: 19498
2005-01-12 03:41:21 +00:00
Chris Lattner
613f79fcbb add an assertion, avoid creating copyfromreg/copytoreg pairs that are the
same for PHI nodes.

llvm-svn: 19484
2005-01-11 22:03:46 +00:00
Chris Lattner
875def9b71 Turn memset/memcpy/memmove into the corresponding operations.
llvm-svn: 19463
2005-01-11 05:56:49 +00:00
Chris Lattner
a2c5d9168c Handle static alloca arguments to PHI nodes.
llvm-svn: 19409
2005-01-09 01:16:24 +00:00
Chris Lattner
58cfd7945d Use new interfaces to correctly lower varargs and return/frame address intrinsics.
llvm-svn: 19407
2005-01-09 00:00:49 +00:00
Chris Lattner
18d2b34637 Add support for llvm.setjmp and longjmp. Only 3 SingleSource/UnitTests fail now.
llvm-svn: 19404
2005-01-08 22:48:57 +00:00
Chris Lattner
d006195517 Silence VS warnings.
llvm-svn: 19384
2005-01-08 19:52:31 +00:00
Chris Lattner
1f45cd7418 Adjust to changes in LowerCAllTo interfaces
llvm-svn: 19374
2005-01-08 19:26:18 +00:00
Chris Lattner
2a6db3c351 Add support for FP->INT conversions and back.
llvm-svn: 19369
2005-01-08 08:08:56 +00:00
Chris Lattner
19a83990e1 Implement support for long GEP indices on 32-bit archs and support for
int GEP indices on 64-bit archs.

llvm-svn: 19354
2005-01-07 21:56:57 +00:00
Chris Lattner
8ea875fb05 Fix handling of dead PHI nodes.
llvm-svn: 19349
2005-01-07 21:34:19 +00:00
Chris Lattner
7a60d91953 Initial implementation of the SelectionDAGISel class. This contains most
of the code for lowering from LLVM code to a SelectionDAG.

llvm-svn: 19331
2005-01-07 07:47:53 +00:00