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613 Commits

Author SHA1 Message Date
Benjamin Kramer
e3b442d20c Factor the repetitive cpu macro definition into a helper function. 
llvm-svn: 147847
 2012-01-10 11:50:09 +00:00
Craig Topper
23b9219765 Merge AVX/AVX2 into the SSE level. 
llvm-svn: 147771
 2012-01-09 09:19:09 +00:00
Joerg Sonnenberger
1623714010 __FLT_EVAL_METHOD__ should be 1 on NetBSD/i386, since it defaults to 
"double" rounding.

llvm-svn: 147669
 2012-01-06 18:32:26 +00:00
Benjamin Kramer
6dced3b468 Penryn doesn't support sse4.2, don't enable it in the first place. 
While the code took care of disabling the sse42 flag it didn't know
about popcnt. This broke -march=native on penryn.

llvm-svn: 147531
 2012-01-04 14:36:57 +00:00
Craig Topper
ffdb46ceef Add FMA4 feature flag. Intrinsics coming soon. Also make sse4a feature flag imply sse3. Matches gcc behavior. 
llvm-svn: 147370
 2011-12-30 07:33:42 +00:00
Craig Topper
1de8348db7 Add popcnt feature flag to match gcc. This flag is implied when sse42 is enabled, but can be disabled separately. Move popcnt intrinsics to popcntintrin.h to match gcc. 
llvm-svn: 147340
 2011-12-29 16:10:46 +00:00
Benjamin Kramer
cf5014771d Add a target hook for FLT_EVAL_METHOD and use it to set the value on x86 with sse disabled. 
x87 math evaluates everything with 80 bits precision, so we have to set FLT_EVAL_METHOD
to "2".

llvm-svn: 147311
 2011-12-28 15:47:06 +00:00
Craig Topper
22967d4a61 Add BMI, BMI2, and LZCNT feature flags to enable adding intrinsics. 
llvm-svn: 147262
 2011-12-25 05:06:45 +00:00
Eli Friedman
803acb3ff2 Add support for bitcasts to vector type in Evaluate. 
llvm-svn: 147137
 2011-12-22 03:51:45 +00:00
Nick Lewycky
f243e0df95 Bump suitable alignment on darwin ppc 32/64 and x86-32 to 16 bytes. I don't 
actually know about the other OSes on X86-32 besides Linux...

llvm-svn: 147034
 2011-12-21 04:25:47 +00:00
Fariborz Jahanian
103ae5c48f objc-arc: bridge casts in non-objc-arc mode are ignord. 
But, warn too. // rdar://10597832

llvm-svn: 146904
 2011-12-19 21:06:15 +00:00
Craig Topper
865fff5d4c Add -mavx2 and -mno-avx2 command line support. Also add core-avx2 processor type. 
llvm-svn: 146835
 2011-12-17 19:55:21 +00:00
Nick Lewycky
f59e129c3b Add the value of "suitably aligned" from the C++11 standard to Basic/TargetInfo. 
This is equal to alignof(std::max_align_t) on the platform and equal to the
alignment provided by malloc. (Platform owners please double-check your
platform's value.)

llvm-svn: 146762
 2011-12-16 22:34:14 +00:00
Nick Lewycky
c0a61734df Fix 80-column violation and whitespace. No functionality change. 
llvm-svn: 146761
 2011-12-16 22:32:39 +00:00
Eli Friedman
3715d1f435 gcov-style profiling support for OpenBSD. Patch by Jonathan Gray. 
llvm-svn: 146631
 2011-12-15 02:15:56 +00:00
Tony Linthicum
76329bf83f Hexagon backend support 
llvm-svn: 146413
 2011-12-12 21:14:55 +00:00
Eli Friedman
83de51301a Misc Minix-specific changes to clang: 
. move compiler-rt to a separate directory so the -L argument only includes compiler-rt (thanks joerg)
. build all clang subdirs
. switches the Minix platform to ELF
. normalizes toolchain invocation

Patch by Ben Gras.

llvm-svn: 146206
 2011-12-08 23:54:21 +00:00
Eric Christopher
af6431077c Add support for AVX registers to clang inline asm. Add a small testcase 
and update the Sema testcase with a register that we won't hit for a while
I hope.

Fixes rdar://10510405

llvm-svn: 145671
 2011-12-02 02:12:16 +00:00
Eli Friedman
bfd5addf4c When we're passing a vector with an illegal type through memory on x86-64, use byval so we're sure the backend does the right thing. Fixes va_arg with illegal vectors and an obscure ABI mismatch with __m64 vectors. 
llvm-svn: 145652
 2011-12-02 00:11:43 +00:00
Benjamin Kramer
6bd51593ca Add support for AMD's bulldozer. 
llvm-svn: 145606
 2011-12-01 18:23:59 +00:00
Rafael Espindola
a6416a7c73 Make our handling of MMX x SSE closer to what gcc does: 
* Enabling sse enables mmx.
* Disabling (-mno-mmx) mmx, doesn't disable sse (we got this right already).
* The order in not important. -msse -mno-mmx is the same as -mno-mmx -msse.

llvm-svn: 145194
 2011-11-27 20:00:43 +00:00
James Molloy
c445be4b4b AAPCS compliance - 32-bit wchar_t should be unsigned for both aapcs and aapcs-linux. 
Original behaviour of defining wchar_t as signed int has been kept for apcs-gnu as I don't have any spec for this to validate against.

llvm-svn: 145102
 2011-11-23 13:35:08 +00:00
Douglas Gregor
7240a95282 Define some built-ins macros on mips32 platform, from Simon Atanasyan! 
llvm-svn: 144189
 2011-11-09 15:17:16 +00:00
Akira Hatanaka
8cc2e865bc Move definitions of SizeType and PtrDiffType to Mips32TargetInfoBase. 
llvm-svn: 143775
 2011-11-05 01:48:34 +00:00
Douglas Gregor
07216d174e Fix various minor issues find via unreachable code warnings, from 
Ahmed Charles!

llvm-svn: 143569
 2011-11-02 20:52:01 +00:00
Anders Carlsson
2f1a6c3f01 In x86_64, when calling an Objective-C method that returns a _Complex long double, make sure to use the objc_msgSend_fp2ret function which ensures that the return value will be {0, 0} if the receiver is nil. 
llvm-svn: 143350
 2011-10-31 16:27:11 +00:00
Roman Divacky
ce253d89a2 Add support for sse4a and enable it for amdfam10 cpu. 
llvm-svn: 143312
 2011-10-30 13:47:56 +00:00
Roman Divacky
43eb6f8aeb Add support for amdfam10 cpu. 
llvm-svn: 143305
 2011-10-30 07:48:46 +00:00
Dan Gohman
93127aecb9 Remove the Blackfin backend. 
llvm-svn: 142881
 2011-10-25 00:06:12 +00:00
Dan Gohman
53bb0ff685 Remove the SystemZ backend. 
llvm-svn: 142879
 2011-10-24 23:48:52 +00:00
Akira Hatanaka
c12a271b55 Make changes necessary for N32/64 ABI conformance. 
- Size of long double is 16 bytes for both N32 and N64.
- Size of pointers and long is 8 bytes for N64.

llvm-svn: 142705
 2011-10-22 00:07:27 +00:00
Benjamin Kramer
80ca407610 Use llvm::Triple's methods to parse FreeBSD version numbers. 
Who could've thought that FreeBSD would ever reach version 10!
Patch from Dimitry Andric.

llvm-svn: 142349
 2011-10-18 10:10:08 +00:00
Benjamin Kramer
a518b22d6b Place static initializers on linux into the ".text.startup" section, so the linker can group them together for performance. 
This only has an effect with fairly new binutils (2.21.51 or later). Other ELF targets probably want this as well, but on BSDs binutils is usually old so it doesn't matter.

llvm-svn: 142076
 2011-10-15 17:53:33 +00:00
Eli Friedman
4b72fddd99 Misc fixes for atomics. Biggest fix is doing alignment correctly for _Atomic types. 
llvm-svn: 142002
 2011-10-14 20:59:01 +00:00
Anton Korobeynikov
804dd056b3 Add target info for Linux on PPC & Sparc. 
Patch by Hal Finkel!

llvm-svn: 141772
 2011-10-12 09:30:58 +00:00
David Meyer
bfdbb25af2 Allow regparm attribute for PNaCl target 
llvm-svn: 141638
 2011-10-11 03:12:01 +00:00
Lang Hames
4f4aa1a03a Fixed natural stack alignment for Linux x86-32. Thanks Eli. 
llvm-svn: 141617
 2011-10-11 00:52:51 +00:00
Lang Hames
60b2b2ee0d Update target data strings for ARM and X86 to include the natural stack 
alignment parameter "S<size>" that was introduced in r141599.

llvm-svn: 141601
 2011-10-10 23:44:43 +00:00
Eli Friedman
1f19100451 Add address spaces for TCE target. Patch by Pekka Jääskeläinen. 
llvm-svn: 141390
 2011-10-07 19:51:42 +00:00
Justin Holewinski
794c205e52 PTX: Add some basic support for OpenCL address spaces 
llvm-svn: 141008
 2011-10-03 17:28:37 +00:00
Chandler Carruth
3270e2619e Fix a typo spotted by Jonathan Sauer. 
llvm-svn: 140708
 2011-09-28 18:17:30 +00:00
Chandler Carruth
7d8241cf4f Attempt to silence the GCC -Wreturn-type warning... 
llvm-svn: 140693
 2011-09-28 10:49:06 +00:00
Chandler Carruth
cd99bad4ac Generate tests for all of the x86 SIMD instruction feature set 
predefines based on the output of GCC as well as the CPU predefines.

Invert tests for __AVX__, Clang's AVX feature is hard coded off still.

Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's
documentation, and ICC's documentation (such as I could dig up).

Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and
nothing (resp.).

llvm-svn: 140692
 2011-09-28 10:36:46 +00:00
Chandler Carruth
5d0feef373 Fix a think-o on my part that got enshrined in a FIXME by setting up the 
__tune_...__ define as well.

llvm-svn: 140690
 2011-09-28 09:54:11 +00:00
Chandler Carruth
3f7ed950fd Move some of the defines down to more natural locations, consolidating 
the target identifying macros at the top, including subtarget macros.

llvm-svn: 140689
 2011-09-28 09:54:07 +00:00
Chandler Carruth
6e20c2bd35 Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. 
Add 64-bit preprocessor macro tests.

llvm-svn: 140688
 2011-09-28 09:45:08 +00:00
Chandler Carruth
df5f48ac99 Simplify the control flow for predefined macro selection by using 
fallthrough now that we're working with a switch. Also remove a dubious
"feature" regarding k6 processors and 3dnow and leave a fixme... Not
that anyone is likely to care about correct tuning for k6 processors
with and w/o 3dnow...

llvm-svn: 140687
 2011-09-28 09:45:05 +00:00
Chandler Carruth
212334f7ab Switch the X86TargetInfo object from a string representation of the 
selected CPU model to the enumeration. This parses the string
representation once using a StringSwitch on SetCPU. It returns an error
for strings which are not recognized (yay!). Finally it replaces
ridiculous if-chains with switches that cover all enumerators.

The last change required adding several missing entries to the features
function. These were obvious on inspection. Yay for a pattern that gives
warnings when we miss one.

No new test cases yet, as I want to get the 64-bit errors working first.
I'll then start fleshing out the testing more. Currently I'm primarily
testing on Linux, but I'm hoping check whether there are interesting
differences on darwin before long...

llvm-svn: 140685
 2011-09-28 08:55:37 +00:00
Chandler Carruth
3ac7aeaacb Introduce an enumeration for the x86 CPUs recognized by Clang. I've 
tried to give these nice doxyments, but if I've gotten any of my history
wrong, please chime in.

llvm-svn: 140684
 2011-09-28 08:55:34 +00:00
Chandler Carruth
8bdcf9ea12 Clean up a bit of the uses of CPU in the TargetInfo classes. This makes 
it an error if a CPU is provided for a target that doesn't implement
logic handling CPU settings, to match the ABI settings. It also removes
the CPU parameter from the getDefaultFeatures method. This parameter was
always filled in with the same value as setCPU was called with, and at
this point every single target implementation that referenced the CPU
within this function has needed to store the CPU via setCPU anyways in
order to implement other interface points.

llvm-svn: 140683
 2011-09-28 05:56:05 +00:00