198 Commits

Author SHA1 Message Date
Kevin Gleason
e911f90a40
[mlir] Add support for broader range of input files in generate-test-checks.py (#134327)
A few additions:

- Lines with `{{`: These can show up if serializing non-MLIR info into
string attrs `my.attr = {{proto}, {...}}`. String escape the opening
`{{`, given that check lines are generated this has no effect on
`{{.*}}` etc in generated lines.
- File split line: Normally these are skipped because of their indent
level, but if using `--starts_from_scope=0` to generate checks for the
`module {...} {` line, and since MLIR opt tools emit file split lines by
default, some `CHECK: // -----` lines were emit.
- (edit removed this, fixed by
https://github.com/llvm/llvm-project/pull/134364) AttrAliases: I'm not
sure if I'm missing something for the attribute parser to work
correctly, but I was getting many `#[[?]]` for all dialect attrs. Only
use the attr aliasing if there's a match.
2025-04-11 13:00:47 -05:00
tdanyluk
76d2e0881e
[mlir] fix references of attributes which are not defined earlier (#134364)
If an attribute is not defined earlier in the same file, but just
referenced from its dialect directly, then currently not the correct
check is being emited.

What would it emit for #toy.shape<[1, 2, 3]>:
Earlier:
// CHECK: #[['?']]<[1, 2, 3]>
Now:
// CHECK: #toy.shape<[1, 2, 3]>
2025-04-08 17:34:20 +02:00
Krzysztof Drewniak
d7c53a91c2
[mlir] Decouple enum generation from attributes, adding EnumInfo and EnumCase (#132148)
This commit pulls apart the inherent attribute dependence of classes
like EnumAttrInfo and EnumAttrCase, factoring them out into simpler
EnumCase and EnumInfo variants. This allows specifying the cases of an
enum without needing to make the cases, or the EnumInfo itself, a
subclass of SignlessIntegerAttrBase.

The existing classes are retained as subclasses of the new ones, both
for backwards compatibility and to allow attribute-specific information.

In addition, the new BitEnum class changes its default printer/parser
behavior: cases when multiple keywords appear, like having both nuw and
nsw in overflow flags, will no longer be quoted by the operator<<, and
the FieldParser instance will now expect multiple keywords. All
instances of BitEnumAttr retain the old behavior.
2025-03-27 19:40:06 -05:00
Slava Zakharin
cc675c635b
[utils] Use stricter SSA regexp for CHECK-SAME. (#128083)
When CHECK-SAME checks are split across multiple lines,
the '.*' regexp for the SSA variable name may cause problems, e.g.:
```
// CHECK_LABEL: func.func @whatever(
// CHECK-SAME: %[[VAL_0:.*]]: i32,
// CHECK-SAME: %[[VAL_1:.*]]: i32,
// CHECK-SAME: %[[VAL_2:.*]]: i64)
```

This will not work for `func.func @whatever(%0: i32, %1: i32, %2: i64)`,
because VAL_0 will match to `0: i32, %1`.
2025-02-20 21:18:12 -08:00
Jan Leyonberg
8806311bb7
[MLIR][Math] Add erfc to math dialect (#126439)
This patch adds the erfc op to the math dialect. It also does lowering
of the math.erfc op to libm calls. There is also a f32 polynomial
approximation for the function based on

https://stackoverflow.com/questions/35966695/vectorizable-implementation-of-complementary-error-function-erfcf
This is in turn based on
M. M. Shepherd and J. G. Laframboise, "Chebyshev Approximation of
(1+2x)exp(x^2)erfc x in 0 <= x < INF", Mathematics of Computation, Vol.
36, No. 153, January 1981, pp. 249-253.
The code has a ULP error less than 3, which was tested, and MLIR test
values were verified against the C implementation.
2025-02-18 10:51:37 -05:00
mgcsysinfcat
589bef333e
[emacs][lsp][tblgen] add tblgen-lsp-server support for emacs lsp-mode (#76337)
Co-authored-by: mgcsysinfcat <p779yqwdf@mozmail.com>
Co-authored-by: Ronan Keryell <ronan.keryell@amd.com>
2025-01-28 20:26:14 +01:00
Jack Frankland
e4708260c7
[vim] Improve iskeyword for MLIR (#121750)
Define keywords for the MLIR syntax. This allows better recognition of
semantic constructs such as SSA value identification e.g. `%foo` which
gives improved motion handling when using 'word based' such as `w, e`.

This is based on the work done for the LLVM IR in
8c46413f343d0a5b8db48d958890b9038f03b70d.

Signed-off-by: Jack Frankland <jack.frankland@arm.com>
2025-01-15 10:01:36 +00:00
Oleksandr "Alex" Zinenko
c7d237085b
[mlir] add a simple pygments lexer (#120942)
This enables syntax highlighting of MLIR using the Pygments package in
Python, which is in turn usable from LaTeX via the minted package.
2024-12-30 17:27:53 +01:00
Caio Oliveira
6e75eec866
[mlir][spirv] Remove code for de-duplicating symbols in SPIR-V grammar (#111778)
SPIR-V grammar was updated in upstream to have an "aliases" field
instead of duplicating symbols with same values. See
https://github.com/KhronosGroup/SPIRV-Headers/pull/447 for details.
2024-10-30 18:40:08 -04:00
Caio Oliveira
67c485798a
[mlir][spirv] Ignore extra comma for category_args in gen_spirv_dialect.py (#111776)
In the code being parsed, the comma separates following traits from the
category args. If there's no category args, it is still present.
2024-10-30 18:39:32 -04:00
Caio Oliveira
64bcb27d97
[mlir][spirv] Make gen_spirv_dialect.py more precise when finding inst_category (#111777)
Use a word boundary, current code was currently failing when parsing the
definition of because it would also match
`CooperativeMatrixOp` from a later mention of
`SPIRV_KHR_CooperativeMatrixOperandsAttr`.
2024-10-11 12:35:40 -04:00
Caio Oliveira
6c398abb75
[NFC][mlir][spirv] Fix syntax warnings in gen_spirv_dialect.py (#111775)
In the context of regular expressions, Python (used to) gracefully
ignore the escape behavior of `\` in some contexts, e.g. for
representing the regular expression `\w+`. However in newer versions of
Python this now gives a warning in the form

```
SyntaxWarning: invalid escape sequence '\w'
```

Fix by explicitly using raw strings instead.
2024-10-10 21:08:18 -04:00
Sergey Kozub
3f9cabae00
[MLIR] Add f8E8M0FNU type (#111028)
This PR adds `f8E8M0FNU` type to MLIR.

`f8E8M0FNU` type is proposed in [OpenCompute MX
Specification](https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf).
It defines a 8-bit floating point number with bit layout S0E8M0. Unlike
IEEE-754 types, there are no infinity, denormals, zeros or negative
values.

```c
f8E8M0FNU
- Exponent bias: 127
- Maximum stored exponent value: 254 (binary 1111'1110)
- Maximum unbiased exponent value: 254 - 127 = 127
- Minimum stored exponent value: 0 (binary 0000'0000)
- Minimum unbiased exponent value: 0 − 127 = -127
- Doesn't have zero
- Doesn't have infinity
- NaN is encoded as binary 1111'1111

Additional details:
- Zeros cannot be represented
- Negative values cannot be represented
- Mantissa is always 1
```

Related PRs:
- [PR-107127](https://github.com/llvm/llvm-project/pull/107127)
[APFloat] Add APFloat support for E8M0 type
- [PR-105573](https://github.com/llvm/llvm-project/pull/105573) [MLIR]
Add f6E3M2FN type - was used as a template for this PR
- [PR-107999](https://github.com/llvm/llvm-project/pull/107999) [MLIR]
Add f6E2M3FN type
- [PR-108877](https://github.com/llvm/llvm-project/pull/108877) [MLIR]
Add f4E2M1FN type
2024-10-04 09:23:12 +02:00
Sergey Kozub
2c58063435
[MLIR] Add f4E2M1FN type (#108877)
This PR adds `f4E2M1FN` type to mlir.

`f4E2M1FN` type is proposed in [OpenCompute MX
Specification](https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf).
It defines a 4-bit floating point number with bit layout S1E2M1. Unlike
IEEE-754 types, there are no infinity or NaN values.

```c
f4E2M1FN
- Exponent bias: 1
- Maximum stored exponent value: 3 (binary 11)
- Maximum unbiased exponent value: 3 - 1 = 2
- Minimum stored exponent value: 1 (binary 01)
- Minimum unbiased exponent value: 1 − 1 = 0
- Has Positive and Negative zero
- Doesn't have infinity
- Doesn't have NaNs

Additional details:
- Zeros (+/-): S.00.0
- Max normal number: S.11.1 = ±2^(2) x (1 + 0.5) = ±6.0
- Min normal number: S.01.0 = ±2^(0) = ±1.0
- Min subnormal number: S.00.1 = ±2^(0) x 0.5 = ±0.5
```

Related PRs:
- [PR-95392](https://github.com/llvm/llvm-project/pull/95392) [APFloat]
Add APFloat support for FP4 data type
- [PR-105573](https://github.com/llvm/llvm-project/pull/105573) [MLIR]
Add f6E3M2FN type - was used as a template for this PR
- [PR-107999](https://github.com/llvm/llvm-project/pull/107999) [MLIR]
Add f6E2M3FN type
2024-09-24 08:22:48 +02:00
Sergey Kozub
73d83f20c9
[MLIR] Add f6E2M3FN type (#107999)
This PR adds `f6E2M3FN` type to mlir.

`f6E2M3FN` type is proposed in [OpenCompute MX
Specification](https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf).
It defines a 6-bit floating point number with bit layout S1E2M3. Unlike
IEEE-754 types, there are no infinity or NaN values.

```c
f6E2M3FN
- Exponent bias: 1
- Maximum stored exponent value: 3 (binary 11)
- Maximum unbiased exponent value: 3 - 1 = 2
- Minimum stored exponent value: 1 (binary 01)
- Minimum unbiased exponent value: 1 − 1 = 0
- Has Positive and Negative zero
- Doesn't have infinity
- Doesn't have NaNs

Additional details:
- Zeros (+/-): S.00.000
- Max normal number: S.11.111 = ±2^(2) x (1 + 0.875) = ±7.5
- Min normal number: S.01.000 = ±2^(0) = ±1.0
- Max subnormal number: S.00.111 = ±2^(0) x 0.875 = ±0.875
- Min subnormal number: S.00.001 = ±2^(0) x 0.125 = ±0.125
```

Related PRs:
- [PR-94735](https://github.com/llvm/llvm-project/pull/94735) [APFloat]
Add APFloat support for FP6 data types
- [PR-105573](https://github.com/llvm/llvm-project/pull/105573) [MLIR]
Add f6E3M2FN type - was used as a template for this PR
2024-09-16 21:09:27 +02:00
Sergey Kozub
918222ba43
[MLIR] Add f6E3M2FN type (#105573)
This PR adds `f6E3M2FN` type to mlir.

`f6E3M2FN` type is proposed in [OpenCompute MX
Specification](https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf).
It defines a 6-bit floating point number with bit layout S1E3M2. Unlike
IEEE-754 types, there are no infinity or NaN values.

```c
f6E3M2FN
- Exponent bias: 3
- Maximum stored exponent value: 7 (binary 111)
- Maximum unbiased exponent value: 7 - 3 = 4
- Minimum stored exponent value: 1 (binary 001)
- Minimum unbiased exponent value: 1 − 3 = −2
- Has Positive and Negative zero
- Doesn't have infinity
- Doesn't have NaNs

Additional details:
- Zeros (+/-): S.000.00
- Max normal number: S.111.11 = ±2^(4) x (1 + 0.75) = ±28
- Min normal number: S.001.00 = ±2^(-2) = ±0.25
- Max subnormal number: S.000.11 = ±2^(-2) x 0.75 = ±0.1875
- Min subnormal number: S.000.01 = ±2^(-2) x 0.25 = ±0.0625
```

Related PRs:
- [PR-94735](https://github.com/llvm/llvm-project/pull/94735) [APFloat]
Add APFloat support for FP6 data types
- [PR-97118](https://github.com/llvm/llvm-project/pull/97118) [MLIR] Add
f8E4M3 type - was used as a template for this PR
2024-09-10 10:41:05 +02:00
jjalowie
86db2154bc
[vscode-mlir] Added per-LSP-server executable arguments (#79671)
Each LSP server type (mlir-lsp-server, pdll-lsp-server and
tblgen-lsp-server) should have a different "additional_server_args"
entry in the config for passing arguments to the server such as
`--log=verbose`.
2024-08-14 12:31:14 -06:00
Alexander Pivovarov
eef1d7e377
[MLIR] Add f8E3M4 IEEE 754 type (#101230)
This PR adds `f8E3M4` type to mlir.

`f8E3M4` type  follows IEEE 754 convention

```c
f8E3M4 (IEEE 754)
- Exponent bias: 3
- Maximum stored exponent value: 6 (binary 110)
- Maximum unbiased exponent value: 6 - 3 = 3
- Minimum stored exponent value: 1 (binary 001)
- Minimum unbiased exponent value: 1 − 3 = −2
- Precision specifies the total number of bits used for the significand (mantissa), 
    including implicit leading integer bit = 4 + 1 = 5
- Follows IEEE 754 conventions for representation of special values
- Has Positive and Negative zero
- Has Positive and Negative infinity
- Has NaNs

Additional details:
- Max exp (unbiased): 3
- Min exp (unbiased): -2
- Infinities (+/-): S.111.0000
- Zeros (+/-): S.000.0000
- NaNs: S.111.{0,1}⁴ except S.111.0000
- Max normal number: S.110.1111 = +/-2^(6-3) x (1 + 15/16) = +/-2^3 x 31 x 2^(-4) = +/-15.5
- Min normal number: S.001.0000 = +/-2^(1-3) x (1 + 0) = +/-2^(-2)
- Max subnormal number: S.000.1111 = +/-2^(-2) x 15/16 = +/-2^(-2) x 15 x 2^(-4) = +/-15 x 2^(-6)
- Min subnormal number: S.000.0001 = +/-2^(-2) x 1/16 =  +/-2^(-2) x 2^(-4) = +/-2^(-6)
```

Related PRs:
- [PR-99698](https://github.com/llvm/llvm-project/pull/99698) [APFloat]
Add support for f8E3M4 IEEE 754 type
- [PR-97118](https://github.com/llvm/llvm-project/pull/97118) [MLIR] Add
f8E4M3 IEEE 754 type
2024-08-02 00:22:11 -07:00
Andrea 🦈
bc6834f5c7
[mlir][spirv] Fix tablegen generator script's stripping of prefixes (#101378)
This script looks for existing definitions with the `SPIRV_` prefix, so
that it can preserve them when updating the file. When the commit
2d628330482e49d36744cb8f3fb5047cfeae6c56 changed the prefix from `SPV_`,
the number of characters to strip from matched names was not updated,
which broke this feature. This commit fixes remaining cases that weren't
fixed by 339c87a8a086347bd8b5aae8b5bc43fc1c155cc1.

The relationship of this script to the files it is meant to maintain is
still bitrotten in other ways.
2024-07-31 22:07:54 -04:00
Alexander Pivovarov
019136e30f
[MLIR] Add f8E4M3 IEEE 754 type (#97118)
This PR adds `f8E4M3` type to mlir.

`f8E4M3` type  follows IEEE 754 convention

```c
f8E4M3 (IEEE 754)
- Exponent bias: 7
- Maximum stored exponent value: 14 (binary 1110)
- Maximum unbiased exponent value: 14 - 7 = 7
- Minimum stored exponent value: 1 (binary 0001)
- Minimum unbiased exponent value: 1 − 7 = −6
- Precision specifies the total number of bits used for the significand (mantisa), 
    including implicit leading integer bit = 3 + 1 = 4
- Follows IEEE 754 conventions for representation of special values
- Has Positive and Negative zero
- Has Positive and Negative infinity
- Has NaNs

Additional details:
- Max exp (unbiased): 7
- Min exp (unbiased): -6
- Infinities (+/-): S.1111.000
- Zeros (+/-): S.0000.000
- NaNs: S.1111.{001, 010, 011, 100, 101, 110, 111}
- Max normal number: S.1110.111 = +/-2^(7) x (1 + 0.875) = +/-240
- Min normal number: S.0001.000 = +/-2^(-6)
- Max subnormal number: S.0000.111 = +/-2^(-6) x 0.875 = +/-2^(-9) x 7
- Min subnormal number: S.0000.001 = +/-2^(-6) x 0.125 = +/-2^(-9)
```

Related PRs:
- [PR-97179](https://github.com/llvm/llvm-project/pull/97179) [APFloat]
Add support for f8E4M3 IEEE 754 type
2024-07-22 23:20:28 -07:00
Stella Stamenova
dfe55a11cb
[vscode-mlir] Bump the version of braces to 3.0.3 (#96137)
Version 3.0.2 of braces has a security vulnerability.
2024-06-20 12:40:46 -07:00
Ivan Butygin
ca051dfe9f
[mlir][utils] Add script to verify canonicalizations against Alive2 (#91867)
This script takes IR before and after canonicalization, translates it
into llvm IR and converts it to format suitable for Alive2
https://alive2.llvm.org/ce/

This is primarily for arith canonicalizations verification, but
technically it can be adapted for any dialect translatable to llvm.

Usage `python verify_canon.py canonicalize.mlir -f func1 func2 ...`

Example output: https://alive2.llvm.org/ce/z/KhQs4J

Initial discussion:
https://github.com/llvm/llvm-project/pull/91646#pullrequestreview-2049342826
2024-05-13 17:24:22 +03:00
darkfeline
5b4abae763
[emacs] Fix Emacs library formatting (#76110)
This makes it easier to ship/install these using the builtin Emacs
package format (in particular, a Version is required).
2024-01-10 13:14:21 +01:00
Daniil Dudkin
8a6e54c9b3
[mlir][arith] Rename operations: maxfmaximumf, minfminimumf (#65800)
This patch is part of a larger initiative aimed at fixing floating-point `max` and `min` operations in MLIR: https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671.

This commit addresses Task 1.2 of the mentioned RFC. By renaming these operations, we align their names with LLVM intrinsics that have corresponding semantics.
2023-09-11 22:02:19 -07:00
Walter Erquinigo
9d1063642c
[NFC] Set a variable in the mlir data formatter (#65554)
The formatter fails when num_children is invoked and self.impl_type is
not set.
2023-09-06 20:13:39 -04:00
Benjamin Maxwell
dbf798fa64 [mlir] Fix generating checks for multiple funcs in generate-test-checks
This regressed in D154458 due to the added tracking of used variable
names that now also has to be cleared alongside the counter.

Reviewed By: rafaelubalmw, c-rhodes, awarzynski

Differential Revision: https://reviews.llvm.org/D156547
2023-08-03 15:55:03 +00:00
Rafael Ubal Tena
dea01f5e00 New features and bug fix in MLIR test generation tool
- Option `--variable_names <names>` allows the user to pass names for FileCheck
  regexps representing variables. Variable names are separated by commas, and
  empty names can be used to generate specific variable names automatically.
  For example, `--variable-names arg_0,arg_1,,,result` will produce regexp names
  `ARG_0`, `ARG_1`, `VAR_0`, `VAR_1`, `RESULT`, `VAR_2`, `VAR_3`, ...

- Option '--attribute_names <names>' can be used to generate global regexp names
  to represent attributes. Useful for affine maps. Same behavior as
  '--variable_names'.

- Bug fixed for scope detection of SSA variables in ops with nested regions that
  return SSA values (e.g., 'linalg.generic'). Originally, returned SSA values were
  inserted in the nested scope.

This version of the tool has been used to generate unit tests for the following
patch: https://reviews.llvm.org/D153291

For example, the main body of the test named 'test_select_2d_one_dynamic' was
generated using the following command:

```
$ mlir-opt -pass-pipeline='builtin.module(func.func(tosa-to-linalg))' test_select_2d_one_dynamic.tosa.mlir | generate-test-checks.py --attribute_names map0,map1,map2 --variable_names arg0,arg1,arg2,const1,arg0_dim1,arg1_dim1,,arg2_dim1,max_dim1,,,arg0_broadcast,,,,,,,arg1_broadcast,,,,,,,arg2_broadcast,,,,,,result
```

Reviewed By: eric-k256

Differential Revision: https://reviews.llvm.org/D154458
2023-07-07 18:15:11 +00:00
Jeremy Furtek
6685fd8239 [mlir] Add support for TF32 as a Builtin FloatType
This diff adds support for TF32 as a Builtin floating point type. This
supplements the recent addition of the TF32 semantic to the LLVM APFloat class
by extending usage to MLIR.

https://reviews.llvm.org/D151923

More information on the TF32 type can be found here:

https://blogs.nvidia.com/blog/2020/05/14/tensorfloat-32-precision-format/

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D153705
2023-07-06 08:56:07 -07:00
Yuanfang Chen
e4246d90d0 [vscode-mlir] bump vsce version to 2.19.0
For https://bugs.chromium.org/p/llvm/issues/detail?id=46

Differential Revision: https://reviews.llvm.org/D153473
2023-06-22 09:25:31 -07:00
Ramkumar Ramachandra
10f8be19e7 tree-sitter-mlir: add a more complete grammar
Contribute a grammar, along with associated tests, from the upstream
project maintained at https://github.com/artagnon/tree-sitter-mlir. The
new grammar includes several fixes, and successfully parses 60-80% of
MLIR tests in the Arith, Math, ControlFlow, SCF, Tensor, Affine, and
Linalg dialects.

Differential Revision: https://reviews.llvm.org/D144408
2023-06-05 19:11:06 +01:00
Philipp Stephani
fdbfdbdf42 Add customization group for MLIR.
Otherwise the customization options don’t appear in any group.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D148920
2023-06-05 15:34:47 +02:00
Tobias Hieta
f9008e6366
[NFC][Py Reformat] Reformat python files in mlir subdir
This is an ongoing series of commits that are reformatting our
Python code.

Reformatting is done with `black`.

If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.

If you run into any problems, post to discourse about it and
we will try to help.

RFC Thread below:

https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style

Differential Revision: https://reviews.llvm.org/D150782
2023-05-26 08:05:40 +02:00
Mehdi Amini
1020150e7a Add a GDB/LLDB interface for interactive debugging of MLIR Actions
This includes a small runtime acting as callback for the ExecutionEngine
and a C API that makes it possible to control from the debugger.

A python script for LLDB is included that hook a new `mlir` subcommand
and allows to set breakpoints and inspect the current action, the context
and the stack.

Differential Revision: https://reviews.llvm.org/D144817
2023-04-24 14:34:15 -07:00
David Majnemer
2f086f265b [APFloat] Add E4M3B11FNUZ
X. Sun et al. (https://dl.acm.org/doi/10.5555/3454287.3454728) published
a paper showing that an FP format with 4 bits of exponent, 3 bits of
significand and an exponent bias of 11 would work quite well for ML
applications.

Google hardware supports a variant of this format where 0x80 is used to
represent NaN, as in the Float8E4M3FNUZ format. Just like the
Float8E4M3FNUZ format, this format does not support -0 and values which
would map to it will become +0.

This format is proposed for inclusion in OpenXLA's StableHLO dialect: https://github.com/openxla/stablehlo/pull/1308

As part of inclusion in that dialect, APFloat needs to know how to
handle this format.

Differential Revision: https://reviews.llvm.org/D146441
2023-03-24 20:06:40 +00:00
Jake Hall
96267b6b88 [mlir] Add Float8E5M2FNUZ and Float8E4M3FNUZ types to MLIR
Float8E5M2FNUZ and Float8E4M3FNUZ have been added to APFloat in D141863.
This change adds these types as MLIR builtin types alongside Float8E5M2
and Float8E4M3FN (added in D133823 and D138075).

Reviewed By: krzysz00

Differential Revision: https://reviews.llvm.org/D143744
2023-02-13 18:26:27 +00:00
Tobias Hieta
fff762d674
Revert "[CMake] Remove custom ccache CMake logic"
This reverts commit 0fad18c44a14b909a1aa47165021273d4c10a665.

We need bots to be updated first.
2023-02-13 08:57:19 +01:00
Tobias Hieta
0fad18c44a
[CMake] Remove custom ccache CMake logic
CMake supports CMAKE_CXX_COMPILER_LAUNCHER since CMake 3.4
so this custom CMake logic we had in LLVM can now be removed.

The only downside with this is that we can't set ccache
options from LLVM CMake, but it's arguable that this doesn't
belong in LLVM but should be done in a script calling the
build.

This was discussed in the forums here:

https://discourse.llvm.org/t/tips-for-incremental-building/67289/4?u=tobiashieta

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D143468
2023-02-13 08:42:38 +01:00
Lei Zhang
84ce59a0e4 [mlir][spirv] Fix MLIR code snippet marker in TD files
Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D141316
2023-01-09 12:58:37 -08:00
River Riddle
62fec084d6 [mlir] Add LLDB visualizers for MLIR constructs
This commit adds a significant amount of visualizers attempting
to cover the majority of our visualization needs. It covers:

* Operations/OperationName/Ops/OpInterfaces
* Attributes/Types/Attr|TypeInterfaces/NamedAttribute
* Blocks/Regions
* Various range types (e.g. ValueRange/TypeRange)
* Values/BlockArguments/OpResults

This does require an NFC change to interfaces to rename
the concept field to avoid clash with the base class. It
also requires exposing a few method to the debugger
to help resolve information that is non-trivial to reconstruct.
These methods are re-exported using a debug_Blah naming
scheme to avoid messing with hot methods.

Note that this makes use of the new callback feature in lldb-16
(currently trunk) that allows for providing visualizers based on
a dynamic callback, instead of just the typename. It requires
a very new lldb, but allows for providing good default visualization
for all attributes/operations/types out of the box.

Differential Revision: https://reviews.llvm.org/D139602
2022-12-11 22:45:34 -08:00
Jakub Kuderski
03e6bf5f56 [mlir][spirv] Define spirv.*Dot integer dot product ops
This covers `SDot`, `SUDot`, and `UDot`. The `*AccSat` version will be
added in a follow-up revision.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D139242
2022-12-06 20:17:41 -05:00
Ivan Butygin
339c87a8a0 [mlir][spirv] Add group ops
Also, gen_spirv_dialect script was broken was broken due to SPV->SPIRV renamings.

Differential Revision: https://reviews.llvm.org/D138756
2022-11-29 15:03:31 +01:00
Mehdi Amini
377af86847 MLIR: Add --fix-error to clang-tidy script 2022-11-18 06:22:32 +00:00
River Riddle
c1e27d2989 [vscode-mlir] Bump to version 0.0.11
Since version 0.10 we've:

* Added support for viewing/editing bytecode files
2022-09-28 02:50:24 -07:00
Jakub Kuderski
2d62833048 Reland "[mlir][spirv] Change td def/class prefix from SPV to SPIRV"
This reverts commit ce82530cd03d884a2c9fa48e1f9eb931064b2553.

Undo accidental Vulkan/SPIR-V name changes.
Tested with `ninja check-mlir check-mlir-mlir-spirv-cpu-runner check-mlir-mlir-vulkan-runner`.
2022-09-26 14:45:52 -04:00
Jakub Kuderski
ce82530cd0 Revert "[mlir][spirv] Change td def/class prefix from SPV to SPIRV"
This reverts commit a2052b8794cb5abac131cd62f68505eebcfaffcb.

This commit renamed some Vulkan identifiers that shouldn't have been
renamed, e.g., `SPV_KHR_storage_buffer_storage_class`.
2022-09-26 12:40:35 -04:00
Jakub Kuderski
a2052b8794 [mlir][spirv] Change td def/class prefix from SPV to SPIRV
Tested with `check-mlir` and `check-mlir-integration`.

Fixes: https://github.com/llvm/llvm-project/issues/56863

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134649
2022-09-26 11:42:49 -04:00
Jacques Pienaar
55e4417bb9 [mlir][emacs] Enable loading bytecode files as text
Use auto-compression-mode to read bytecode files in human readable
manner.

Differential Revision: https://reviews.llvm.org/D133879
2022-09-16 15:08:55 -07:00
River Riddle
82b6549654 [mlir:vscode] Add support for loading big bytecode files
VSCode doesn't let our extension manage files >50mb. This commit
adds a proper diagnostic in this case, and also gives the user an option
to open as a temporary .mlir file instead.

Differential Revision: https://reviews.llvm.org/D133242
2022-09-06 14:49:16 -07:00
Jakub Kuderski
b8bea837f3 [mlir][spirv] Refactor vendor op definitions
Use dedicated vendor op classes/categories. This is so that we can later
change the mnemonics of all vendor ops by changing the base class: `SPV_VendorOp`.

Issue: https://github.com/llvm/llvm-project/issues/56863
2022-09-06 13:35:08 -04:00
River Riddle
f7b8a70e7a [mlir:vscode] Add support for viewing and editing a bytecode file as .mlir
This commit adds support for interacting with a (valid) bytecode file in the same
way as .mlir. This allows editing, using all of the traditional LSP features, etc. but
still using bytecode as the on-disk serialization format. Loading a bytecode file this
way will fail if the bytecode is invalid, and saving will fail if the edited .mlir is invalid.

Differential Revision: https://reviews.llvm.org/D132970
2022-09-02 18:16:05 -07:00