mirrors/llvm-project
0
0
Fork 0
mirror of https://github.com/llvm/llvm-project.git synced 2025-05-15 15:46:06 +00:00
Code Issues Projects Releases Wiki Activity
79,143 Commits 1,258 Branches 288 Tags
Commit Graph

258 Commits

Author SHA1 Message Date
Owen Anderson
d37ddf5b5b Convert VirtRegMap to a MachineFunctionPass. 
llvm-svn: 66870
 2009-03-13 05:55:11 +00:00
Owen Anderson
aabe06d92a Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change. 
llvm-svn: 66720
 2009-03-11 22:31:21 +00:00
Evan Cheng
c544cb0eca Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 
llvm-svn: 62600
 2009-01-20 19:12:24 +00:00
Evan Cheng
8f79775a66 Make linear scan's trivial coalescer slightly more aggressive. 
llvm-svn: 62547
 2009-01-20 00:16:18 +00:00
Dan Gohman
906152a20f Tidy up #includes, deleting a bunch of unnecessary #includes. 
llvm-svn: 61715
 2009-01-05 17:59:02 +00:00
Evan Cheng
ce3ccc1ea0 - More pre-split fixes: spill slot live interval computation bug; restore point bug. 
- If a def is spilt, remember its spill index to allow its reuse.

llvm-svn: 58375
 2008-10-29 08:39:34 +00:00
Evan Cheng
938e201528 - Rewrite code that update register live interval that's split. 
- Create and update spill slot live intervals.
- Lots of bug fixes.

llvm-svn: 58367
 2008-10-29 05:06:14 +00:00
Evan Cheng
d0d0317b9a Committing a good chunk of the pre-register allocation live interval splitting pass. It's handling simple cases and appear to do good things. Next: avoid splitting an interval multiple times; renumber registers when possible; record stack slot live intervals for coloring; rematerialize defs when possible. 
llvm-svn: 58044
 2008-10-23 20:43:13 +00:00
Dan Gohman
9c4b7d5c4f Fix command-line option printing to print two spaces where needed, 
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.

llvm-svn: 57521
 2008-10-14 20:25:08 +00:00
Owen Anderson
1d338fc6a4 Add an option to enable StrongPHIElimination, for ease of testing. 
llvm-svn: 57259
 2008-10-07 20:22:28 +00:00
Evan Cheng
9156bd2f48 Re-apply 56835 along with header file changes. 
llvm-svn: 56848
 2008-09-30 15:44:16 +00:00
Duncan Sands
2b9adce1d0 Revert commit 56835 since it breaks the build. 
"If a re-materializable instruction has a register
operand, the spiller will change the register operand's
spill weight to HUGE_VAL to avoid it being spilled.
However, if the operand is already in the queue ready
to be spilled, avoid re-materializing it".

llvm-svn: 56837
 2008-09-30 10:00:30 +00:00
Evan Cheng
9469049f7d If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. 
llvm-svn: 56835
 2008-09-30 06:36:58 +00:00
Dale Johannesen
c36660d756 Next round of earlyclobber handling. Approach the 
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539
 2008-09-24 01:07:17 +00:00
Dale Johannesen
9af7b3daec Teach coalescer about earlyclobber bits. 
Check bits for preferred register.

llvm-svn: 56384
 2008-09-20 02:03:04 +00:00
Evan Cheng
c042000649 Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. 
llvm-svn: 56381
 2008-09-20 01:28:05 +00:00
Dale Johannesen
436aae627d Make earlyclobber stuff work when virtual regs 
have previously been assigned conflicting physreg.

llvm-svn: 56364
 2008-09-19 18:52:31 +00:00
Dale Johannesen
e519bd4183 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis 
and redo as linked list walk.  Logic moved into RA.
Per review feedback.

llvm-svn: 56326
 2008-09-19 01:02:35 +00:00
Evan Cheng
3d9416cf24 Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. 
llvm-svn: 56314
 2008-09-18 22:38:47 +00:00
Dale Johannesen
f8610ebebc Add a bit to mark operands of asm's that conflict 
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
 2008-09-17 21:13:11 +00:00
Evan Cheng
53b728c27c Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. 
llvm-svn: 56006
 2008-09-09 20:22:01 +00:00
Dan Gohman
a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Owen Anderson
d669b9b671 Convert several std::vectors over to SmallVector, and use reserve() as appropriate for cases where std::vector is still used. 
llvm-svn: 54820
 2008-08-15 18:49:41 +00:00
Owen Anderson
99e911fb16 Get rid of a use of std::map. 
llvm-svn: 54770
 2008-08-13 23:36:23 +00:00
Owen Anderson
51f689a652 Make the allocation of LiveIntervals explicit, rather than holding them in the r2iMap_ by value. This will prevent references to them from being invalidated 
if the map is changed.

llvm-svn: 54763
 2008-08-13 21:49:13 +00:00
Owen Anderson
7c800ad977 Fix a compile-time regression introduced by my heuristic-changing patch. I forgot 
to multiply the instruction count by a constant factor in a few places, which
caused the register allocator to require many more iterations.

llvm-svn: 53959
 2008-07-23 19:47:27 +00:00
Owen Anderson
029182f3a3 Change the heuristics used in the coalescer, register allocator, and within 
live intervals itself to use an instruction count approximation that is 
not affected by inserting empty indices.

llvm-svn: 53937
 2008-07-22 22:46:49 +00:00
Dan Gohman
9cc3f68ab1 A brief survey of priority_queue usage in the tree turned this up 
as a questionable case, but the code isn't actually needed.

llvm-svn: 52657
 2008-06-23 23:51:16 +00:00
Evan Cheng
efc67e78d7 Enhanced heuristic to determine the *best* register to spill. Instead of picking the register with the lowest spill weight. Consider (up to) 2 additional registers with spill weights that are close to the lowest spill weight. The one with fewest defs and uses that conflicts with the current interval (weighted by loop depth) is the spill candidate. 
This is not always a win, but there are much more wins than loses and wins tend to be more noticeable.

llvm-svn: 52554
 2008-06-20 21:45:16 +00:00
Evan Cheng
6d7a144453 Refine stack slot interval weight computation. 
llvm-svn: 52040
 2008-06-06 07:54:39 +00:00
Evan Cheng
12a0222a01 Add a stack slot coloring pass. Not yet enabled. 
llvm-svn: 51934
 2008-06-04 09:18:41 +00:00
Evan Cheng
305d268ac3 Do not add empty live intervals to handled_. They should never be undone for backtracking. 
llvm-svn: 49544
 2008-04-11 17:55:47 +00:00
Evan Cheng
6d07b625aa Special handling of zero-sized live intervals. 
llvm-svn: 49167
 2008-04-03 16:40:27 +00:00
Evan Cheng
6e225173c5 Add an assertion to catch register of illegal class. 
llvm-svn: 48751
 2008-03-24 23:28:21 +00:00
Evan Cheng
e21a68bca7 Undo tweak. It had no obvious benefit. 
llvm-svn: 48341
 2008-03-13 17:42:48 +00:00
Evan Cheng
e88a625ecd When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. 
llvm-svn: 48218
 2008-03-11 07:19:34 +00:00
Evan Cheng
850e143cbf Temporarily revert 48175. 
llvm-svn: 48204
 2008-03-11 00:27:34 +00:00
Evan Cheng
7abdb438a1 If the register allocator ran out of registers, just abort for now. 
llvm-svn: 48175
 2008-03-10 21:27:20 +00:00
Chris Lattner
d6bd311506 Use a smallvector for inactiveCounts and initialize it lazily 
instead of init'ing it maximally to zeros on entry.  getFreePhysReg
is pretty hot and only a few elements are typically used.  This speeds
up linscan by 5% on 176.gcc.

llvm-svn: 47631
 2008-02-26 22:08:41 +00:00
Bill Wendling
d7a258d325 Rename PrintableName to Name. 
llvm-svn: 47629
 2008-02-26 21:47:57 +00:00
Bill Wendling
c24ea4fb41 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Anton Korobeynikov
18991d78fa Fix newly-introduced 4.3 warnings 
llvm-svn: 47375
 2008-02-20 12:07:57 +00:00
Dan Gohman
3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Bill Wendling
0c209430b4 Don't recalculate the loop info and loop dominators analyses if they're 
preserved.

llvm-svn: 45596
 2008-01-04 20:54:55 +00:00
Chris Lattner
a10fff51d9 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Evan Cheng
303417d242 Switch over to MachineLoopInfo. 
llvm-svn: 44838
 2007-12-11 02:09:15 +00:00
Evan Cheng
8e22379303 Live interval splitting: 
When a live interval is being spilled, rather than creating short, non-spillable
intervals for every def / use, split the interval at BB boundaries. That is, for
every BB where the live interval is defined or used, create a new interval that
covers all the defs and uses in the BB.

This is designed to eliminate one common problem: multiple reloads of the same
value in a single basic block. Note, it does *not* decrease the number of spills
since no copies are inserted so the split intervals are *connected* through
spill and reloads (or rematerialization). The newly created intervals can be
spilled again, in that case, since it does not span multiple basic blocks, it's
spilled in the usual manner. However, it can reuse the same stack slot as the
previously split interval.

This is currently controlled by -split-intervals-at-bb.

llvm-svn: 44198
 2007-11-17 00:40:40 +00:00
Bill Wendling
b3712f8146 Adding debug output during coalescing. 
llvm-svn: 44154
 2007-11-15 02:06:30 +00:00
Bill Wendling
8269925b1e Need to increment the iterator. 
llvm-svn: 44153
 2007-11-15 00:40:48 +00:00